SU760160A1 - DEVICE FOR TRANSFER OF INFORMATION 1 - Google Patents

Description

The invention relates to communication technology and can be used in automation, remote control and computing, in particular, to transfer information between processors and RAM in computing systems.

A device for two-way transmission of information is known, each receiving and transmitting node of which contains an information source, amplifiers of transmitted and received signals, a complex resistance, two-wire line ^ 1 ^.

Since there are no parallel-to-serial converters in such a system, information is transmitted by a parallel code, which requires significant cable costs and is a disadvantage of this system.

A device for transmitting information, containing on the transmitting side a parallel-serial converter, a recording control unit, a counter, a trigger, an And element and a transmitter, is known; the first output of the recording control unit is connected to the first input in parallel-po2

sequential converter, the second output of the recording control unit is connected to the first input

5 counter, the first output of which is connected to the first input of the element I, the output of which is connected to the second input of the counter, to the second input of the parallel-serial

10 of the transducer and to the transmitter input, the trigger output is connected to the second input of the element I; on the receiving side there is a sequential-parallel converter, counter,

15 trigger, elements AND, OR, memory unit and receiver, the output of which is connected to the first input of the series-parallel converter, the first input of the counter is connected

20 with the first input of the OR element, the output of the first AND element is connected to the trigger input, the output of which is connected to the second input of the OR element, the transmitting and receiving sides

25 are connected by a communication line connected between the input of the receiver and transmitter [2 ^ ·

In this device on the transmitting side, information is entered as characters in parallel-po3

sequential transducer. Each character using the control binary digit is padded during transmission. On the receiving side, the padded characters are received by a serial-parallel converter and, if there is a given parity of characters, it is transmitted further. To obtain a check digit and to control it, it is applied a counting trigger stage. To protect information on the transmitting and receiving side additionally provided counting trigger stages, which, respectively, the progress of receiving or transmitting information and correction signals. The parity signal present in the counting trigger stages after the last information signals is fed to a parallel-serial converter with subsequent transfer to the communication line. The counting trigger cascade at the receiving side after each received sign is monitored for ’the presence of a given parity of characters and the discrepancy is stored in the intermediate memory until the final control of the information blocks.

The disadvantage of this device is that it has a low bandwidth and limited scope.

The purpose of the invention is to increase throughput and expand the functionality of the device.

This goal is achieved by the fact that · in the device for transmitting 'information containing on the transmitting side a parallel-serial Converter, control unit, counter, trigger, element And and the first transmitter; The first output of the control unit is connected to the first input of the parallel-serial converter, the second output of the control unit is connected to the first input of the counter, the first output of which is connected to the first input of the element I, the output of which is connected to the second input of the counter, to the second input of the parallel-to-serial converter the first transmitter, the trigger output is connected to the second input of the element And, the output of the first transmitter through the wire of the communication line is connected to the input of the first receiver on the receiving side, gd They are arranged in series-parallel converter, a counter, a trigger, the AND, OR, a memory unit, the receiver output is connected to the first input of the serial-parallel converter, a first counter input coupled to the first. the input element OR, the output of the first

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And connected to the trigger input, the output of which is connected to the second input of the OR element, transmitters are connected to one end of the second and third wires of the communication line 5, the third output of the control unit is connected to the first input of the trigger, and the second output I-transmitter is connected to the second trigger input, the second counter output is connected to the third input of a parallel-serial converter, the output of which is connected to the input of the third transmitter, is entered at the receiving side ¹⁵ switch and one-shot, the output of the third receiver is connected to the second input of the series-parallel converter, the first input of which is connected to the 20 second input of the counter, the output of which is connected to the first input of the switch and to the first input of the first element And whose output is connected to the input the first one-way clock, the output of which is connected to the first input of the OR element and to the first input of the memory block, the trigger output is connected to the second input of the OR element and to the second input 20 of the switch, the first output of which is for prison to the input of a second monoflop, whose output is · connected to a first input of the second AND gate, the second input of which is connected to the output of OR, Thr ³⁵ Tille input coupled to the second output switch, the output of the second AND gate is connected to the input of the transmitter of the second link, yield a series-parallel converter is connected to the second input of the memory unit.

FIG. 1 shows a diagram of the transmitting side of the transmission device; in fig. 2 is a diagram of the receiving side.

The transmitting side of the device contains the control unit 1, the trigger 2, the counter 3, the converter 4 is parallel-to-serial, the element 5 and. Between the transmitting and receiving side the device contains the transmission lines 6-8 with the corresponding transmitters and receivers.

On the receiving side, the device contains a serial-to-parallel converter 9, a counter 10, the first element 11 And, the switch 12, a trigger 13, the first one-oscillator 14, the second one-one 15, the element 16 OR, the second element 17 And and a block 60 18 of memory.

The transmission device operates as follows.

The control unit 1 analyzes the state of the counter 3. Suppose that the state of the counter 3 corresponds to

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four. In this case, at the second output of counter 3, a signal is generated that converts the parallel-to-serial converter 4 into the parallel information input mode, at the first output of counter 3, a signal is generated that blocks the signals at the second and third inputs of element 5 I. At the first input of the parallel-serial converter The receiver 4 from the first output of the control unit 1 receives the corresponding information, followed by a strobe signal, recording it in a parallel. Serial converter

4. A signal similar to the gating signal is fed from the second output of the converter to the first input of counter 3 and sets the counter to its initial state. The blocking of the second and third inputs of the element 5 And is removed, and the parallel-serial converter 4 enters the mode of forming a sequential code. At the third output of the control unit 1, clock pulses are formed (continuous pulse series from the generator), which arrive at the first input of trigger 2 and the third input of element 5 I. The trigger 2 is a dynamic trigger, and its first input is an input for gating information reception. At the input of the receiver on the first line .6 communication signal that allows the transmission of a serial code on the third line 8 of communication. Allowing the transfer of information signal arrives at the second input of trigger 2 asynchronously with the action of clock pulses at the first input of trigger 2.

At the output of trigger 2, this signal acts synchronously with the clock pulses. This prevents the formation of the element 5 and the deformed pulses at the output. The pulses from the output of the element 5 and arrive at the second input of the counter 3 and the second input of the parallel-serial converter 4. For it, the pulses are shear pulses, and the counter 3 carries them out. When the code conversion is completed, a signal is generated at the first output of counter 3, blocking the action of the shift pulses, and a signal is generated at the second output of the counter, which switches the parallel-to-serial converter 4 into the mode of parallel information input.

From the output of the element 5 And the shift pulses are transmitted through line 7 of communication. These pulses accompany the information transmitted via the second communication line 8 and are used on the receiving side for recording gating.

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this information into a serial-to-parallel converter 9.

, Counter 10 Performs shear pulse counting. The state of the trigger 13 is identified with the employment of the memory block 18. When entering information into the memory block, the trigger is set to one state, and when Reading information, it is changed to another state.

... ‘When counter 10 indicates that

the conversion of codes into a successor · but-parallel converter 9 is completed, the second output of counter 10 generates a signal arriving at the first input of the first element 11 I. If the memory block is free, the signal from the output of element 11 switches the trigger 13 and starts the one-shot 14. At the output of the one-shot 14, an impulse 20 is formed, which sets the counter 10 to the initial state and keeps it in this state. This pulse is also a gating signal that performs the dubbing.

25 of the information from the serial-parallel converter 9 to the 'memory block 18.

OR element 16 and second element 17 and carries formation signal permitting transmission of information ^ίυ tion along a second line 8. svyazd gap "depleting signal is generated if the counter 10 is in the initial state, or operating information of the overwrite pulse posledovatel35 but-parallel converter 9 the memory unit 18, or the memory unit 18 is free (at the output of the trigger 13, a signal corresponding to the free memory unit 18). If the conversion of the code in the serial-parallel converter 9 ended before the memory block was freed, i.e. the signal at the second input of the switch 12 acts. as $ 4 is the same as at the first input, the switch 12 triggers, which triggers the one-shot 15, the output of which blocks the transmission of the enabling signal to the communication line b. 50

The device allows you to increase the bandwidth of the transmission channel and to expand the scope, as it ensures the transfer of a continuous stream of messages.

55 this is required, for example, when reading information from magnetic media (disks) in computer complexes. If it is entered into the operative memory of the computer

60: an array of information containing several user tasks, the one-time act of random interference can lead to the damage of only one task (program). In the process of processing correctly entered

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eight

programs corrupted program can be fixed.

Claims (1)

Claim A device for transmitting information containing a parallel-serial converter, a control unit, a counter, a trigger, an And element and a first transmitter on the transmitting side; the first output of the control unit is connected to the first input of the parallel-serial converter; the second output of the control unit is connected to the first input of the counter, the first output of which is connected to the first input of the element I, the output of which is connected to the second input of the counter, to the second input of the parallel-serial converter and to the input of the first the first transmitter, the trigger output is connected to the second input of the element I, the output of the first transmitter through the wire of the communication line is connected to the input of the first receiver on the receiving side, where the series-parallel converter, counter, trigger, elements AND, OR, memory, receiver output are located to the first input of the series-parallel converter, the first input of the counter is connected to the first input of the OR element, the output of the first AND element is connected to the trigger input, the output of which is connected to the second input of the element that OR, characterized in that, to increase the capacity and extend the functionality of the device introduced into it transmitters connected to one ends of second and third wire link, respectively, the third the output of the control unit is connected to the first trigger input and to the third input of the element I, the output of the second transmitter is connected to the second input of the trigger, the second output of the counter is connected to the third input of the parallel-serial converter whose output is connected to the input of the third transmitter; 10 and one-shot, the output of the third receiver is connected to the second input of the series-parallel converter, the first input of which is connected to the second input of the counter, the output of which is connected to the first input of the switch and to the first input of the first element I, the output of which is connected to connected to the first input of the OR element and 20 to the first input of the memory block, the trigger output is connected to the second input of the OR element and to the second input of the switch, the first output of which is connected to the input of the second single-oscillator, the output of which is connected to the first input of the second element AND, the second input of which is connected to the output of the OR element, the third input is connected to the second output -d of the switch, the output of the second element I is connected to the input of the transmitter at the back link, the output of the series-parallel converter is connected to the second input of the memory block.