TW200410332A - Method and device for plasma treatment - Google Patents

Abstract

In a state in which an argon gas is supplied into a vacuum chamber 1 of the present invention, a relatively low level of high frequency power, for example, 300 W is supplied to a placement stage 2 (a lower electrode) from a high frequency power supply 11, so as to generate a weak plasma and act on a semiconductor wafer W for controlling the state of the electric charge accumulated in the semiconductor wafer W. To make the charge easily movable, a DC voltage (HV) is not applied to an electrostatic chuck 4. Then, it starts to apply DC voltage to the electrostatic chuck 4, and supplies high frequency power, for example, 2000 W for a usual treatment, to generate a strong plasma, and perform the usual plasma treatment. Thus, surface arcing on a substrate is prevented, and the plasma treatment method can attain a higher productivity than that of the conventional one.

Description

200410332 (1) 发明 Description of the invention [Technical field to which the invention belongs] The present invention relates to an electromagnet processing method and a plasma processing apparatus, and more particularly, to applying plasma to a substrate to be processed such as a semiconductor wafer or an LCD substrate. Plasma processing method and plasma processing apparatus such as etching process. [Prior art] In the past, plasma was mostly used for plasma processing methods for substrates such as semiconductor wafers and substrates for LCDs. For example, in the manufacturing process of semiconductor devices, the technology used to form fine electrical circuits on a substrate to be processed, such as a semiconductor wafer, often uses plasma etching to remove films and the like formed on the semiconductor wafer. Plasma etching. In the etching apparatus for performing the plasma etching process, for example, a plasma-generating method is formed in a processing chamber (etching chamber) which can be hermetically sealed inside. Next, a semiconductor wafer is placed on a suscepter provided in the etching chamber, and etching is performed. In addition, various types of means for generating the above-mentioned plasma are known. Among them, in a device that supplies high-frequency power to a parallel plate electrode in a manner of facing up and down to generate a plasma type, one of the parallel plate electrodes, for example, the lower electrode also serves as a base. Next, a semiconductor wafer is placed on the lower electrode, a high-frequency voltage is applied between the parallel flat electrodes to generate a plasma, and the etching is performed. However, in terms of this type of etching device, the so-called surface arcing of the abnormal discharge of lightning on the surface of the semiconductor wafer during the etching process appears to be -5-(2) (2) 200410332. The above-mentioned surface arc light is often formed, for example, by forming an insulator layer on a conductor layer and generating the insulator layer during etching. For example, when an insulator layer formed by a silicon oxide film is etched, and a through contact hole is formed by a conductive layer formed by a metal layer on the lower layer, the silicon oxide film that causes the film thickness to be reduced by etching is often caused. . Then, if the abnormal discharge occurs, most of the silicon oxide film in the semiconductor wafer will be damaged, which causes the failure of most of the components of the semiconductor wafer. In addition, at the same time, metal contamination is generated in the etching chamber, and the etching process is often unable to be performed, resulting in the necessity of performing the treatment in the etching chamber. Therefore, there is a problem that productivity is significantly reduced. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a plasma processing method and a plasma processing apparatus capable of preventing the occurrence of surface arc light generated from a substrate to be processed and improving productivity as compared with the past. The plasma processing method of the present invention is characterized in that when plasma is applied to a substrate to be processed for plasma processing, before the aforementioned plasma processing is performed, the plasma is weaker than the plasma used in the plasma processing to act on the substrate. The processing substrate 'makes the state of charge of the substrate to be processed constant, and then performs the aforementioned plasma processing. In addition, the plasma processing method of the present invention is characterized in that: in the above plasma processing method, the weak plasma is applied to the substrate to be processed for a specified time, and thereafter, an electrostatic chuck is applied to hold the foregoing by suction. DC voltage to be processed -6- (3) (3) 200410332 substrate. In addition, the plasma processing method of the present invention is characterized in that, in the above-mentioned plasma processing method, before the weak plasma disappears, a DC voltage is applied to the electrostatic clamp fe. In addition, the plasma processing method of the present invention is characterized in that: in the above plasma processing method, the aforementioned weak plasma is a plasma formed of Ar, 02, CF4, or N2. In addition, the plasma treatment method of the present invention is characterized in that: in the above plasma treatment method, the aforementioned weak plasma is formed by a high-frequency power of 0.15 to 1.0 w / cm2. In addition, the plasma processing method of the present invention is characterized in that in the above plasma processing method, the aforementioned weak plasma system acts on the substrate to be processed for a period of 5 to 20 seconds. In addition, the plasma processing method of the present invention is characterized in that: in the above plasma processing method, at the beginning of the aforementioned plasma processing, after the application of high-frequency power for generating plasma is started, the electrostatic chuck is started to be applied. DC voltage, and when the plasma processing is completed, after the DC voltage is stopped from being applied to the electrostatic chuck, the high frequency power is stopped from being applied. In addition, the feature of the plasma processing method of the present invention is that in the above plasma processing method, the static electricity is started in a state where a support rod grounded by a conductor above the electrostatic chuck is used to support the substrate to be processed. After applying a DC voltage to the chuck, the substrate to be processed is lowered and placed on the electrostatic chuck. In addition, the plasma treatment method of the present invention is characterized in that the above-mentioned plasma 200410332

In the processing method, the plasma treatment is an etching process, and the weak electric violet is applied to the substrate to be processed in a processing chamber in which the etching process is performed. In addition, the plasma processing apparatus of the present invention includes a plasma processing mechanism for performing a plasma processing on a substrate to be processed, and is characterized in that it includes a control unit that controls the aforementioned plasma processing mechanism and performs the above-mentioned plasma processing method. [Embodiment]

In the following, aspects of the embodiments of the present invention will be described with reference to the drawings. Fig. 1 is a schematic diagram showing a schematic configuration of the entire plasma processing apparatus (etching apparatus) used in the embodiment of the present invention. In the figure, the drawing number 1 indicates that the material is made of, for example, aluminum, etc., and the inside is configured as a hermetically sealed vacuum chamber and constitutes a cylindrical vacuum chamber of a processing chamber.

The vacuum chamber 1 is connected to a ground potential. Inside the vacuum chamber 1 ', a block 2 made of a conductive material such as aluminum is provided, and a mounting table 2 serving as a lower electrode is provided. The mounting table 2 is supported in the vacuum chamber 1 via an insulating plate 3 such as ceramics. An electrostatic chuck 4 is provided on the mounting surface of the semiconductor wafer W on the mounting table 2. The electrostatic chuck 4 is formed so that the electrostatic chuck electrode 4a is interposed in an insulating film 4b formed of an insulating material, and the electrostatic chuck electrode 4a is connected to a DC power source 5. The electrostatic chuck electrode 4a is made of, for example, copper, and the insulating film 4b is made of polyamine. In addition, inside the mounting table 2, a heat medium flow path 6 for insulating fluid circulation of a heat medium for temperature control, and a helium gas etc. are supplied to the semiconductor. Gas flow path 7 on the back of wafer W. Thus, by forming an insulating fluid that is controlled to a predetermined temperature in the heat medium flow path 6, it is possible to control the mounting table 2 to a predetermined temperature, and between the mounting table 2 and the back surface of the semiconductor wafer W. Supplying a temperature-controlling gas through the gas flow path 7 promotes heat exchange therebetween, and controls the semiconductor wafer W to a predetermined temperature with good accuracy and efficiency.

Further, a focusing ring 8 made of a conductive material or an insulating material is provided on the outer periphery above the mounting table 2, and a power supply wire 9 for supplying high-frequency power is connected to a substantially center of the mounting table 2. The power supply line 9 is connected to a high-frequency power supply (RF power supply) 11 through an integrator 10, and a high-frequency power supply of a specified frequency is supplied from the high-frequency power supply 11.

In addition, the above-mentioned focusing ring 8 is formed in a ring shape, and an exhaust ring 2 is formed to form a large number of exhaust holes. Through the exhaust ring 12, an exhaust system connected to the exhaust passage 13 is used. A vacuum pump such as 14 performs vacuum exhaust of the processing space in the vacuum chamber 1. On the other hand, on the top of the vacuum chamber 1 above the mounting table 2, a shower head 15 is provided so as to face the mounting table 2 in parallel, and the shower head 15 is grounded. Therefore, the functions of the shower head 15 and the mounting table 2 constitute a pair of electrodes (upper electrode and lower electrode). The shower head 15 is provided with a plurality of gas discharge holes 16 under the shower head, and has a gas introduction part 17 at an upper portion thereof. Then, a gas diffusion space 18 is formed inside the shower head 15. A gas supply pipe 19 is connected to the gas introduction part 17 and a gas supply is connected to the other end of the gas supply pipe 19-(6) (6) 200410332 to the system 20. The gas supply system 20 is composed of a gas flow controller (MFC) 21 for controlling the gas flow rate, a processing gas supply source 22 for supplying, for example, a processing gas for etching, and an Ar supply for supplying Ar. Source 2 3 and so on. On the other hand, a ring-shaped magnetic field forming mechanism (ring magnet) 2 4 is arranged concentrically with the vacuum chamber 1 around the outside of the vacuum chamber 1 to produce a magnetic field in a processing space between the stage 2 and the shower head 15. The magnetic field forming mechanism 24 uses a rotating mechanism 25 to allow the entire magnetic field forming mechanism 24 to orbit the vacuum chamber 1 at a specified rotation speed. In addition, the plasma processing mechanism system such as the above-mentioned DC power supply 5, high-frequency power supply 11, gas supply system 20, and the like for plasma processing the semiconductor wafer W is configured to be controlled by the control unit 40. Next, the etching apparatus constructed as described above will be described in accordance with its etching processing order. (First Embodiment) First, a gate valve (not shown) provided in the vacuum chamber 1 is opened, and a load-lock chamber (not shown) disposed adjacent to the gate valve is opened. The semiconductor wafer W is transferred into the vacuum chamber 1 by a transfer mechanism (not shown) and placed on the mounting table 2. Next, after the transfer mechanism is retracted outside the vacuum chamber 1, the gate valve is closed. At this time, a DC voltage (HV) was not applied to the electrostatic chuck electrode 4a of the electrostatic chuck 4 by the DC power source 5. After 'First, while exhausting the vacuum pump of the exhaust system 1 4 through the exhaust passage -10- (7) (7) 200410332, the inside of the vacuum chamber 1 is exhausted to a specified degree of vacuum, and from the supply source 2 3 will be Ar is supplied into the vacuum chamber 1. Then, in this state, as shown in FIG. 2, first, the frequency power source 1] supplies the mounting table 2 as the lower electrode with, for example, 300 W _ low-frequency high-frequency power [frequency such as 1 3.56MH ^) A weak plasma is generated, and the weak plasma is applied to the semiconductor wafer W. Thus, the weak plasma is applied to the semiconductor wafer W, for the following reasons. In other words, the 41-conductor wafer w processed into fr is based on the processing status in the previous process (such as a film-forming process such as CVD), and the state is not the same. For example, there is accumulation in the semiconductor wafer w Occasion of charge. Therefore, in the state where the electric charge is accumulated in the semiconductor wafer w, if a strong electro-optical effect is generated, there is a high possibility that surface arcing or the like will occur. Therefore, before the strong plasma is applied, a weak plasma is caused. Function to adjust the state of charge and the like accumulated in the semiconductor wafer w to be the same (initialization) °. Then, when the state of charge thus accumulated in the semiconductor wafer w is adjusted, the internal charge of the semiconductor wafer W is easy to adjust. Since the movement is performed, the semiconductor wafer is adjusted (initialized) using the weak electric violet without applying a DC voltage (HV) to the electrostatic chuck electrode 4a of the electrostatic chuck 4. In addition, the high-frequency applied power used to generate the weak plasma is about 0.15W / cm2 to 1.0 W / cm2, for example, about 100 to 500W, and the time for the weak plasma to act on the semiconductor wafer W is, for example, 5 to 20 seconds left-11-(8) (8) 200410332 right. In addition, in the above, the field where Ar is used to cause the plasma action of Ar is described, but the type of gas is not limited to this, and gases such as 02, CF4, and N2 can also be used. However, with regard to the selection of the gas type, it is necessary to select a gas that generates plasma, which has a small degree of causing unexpected effects such as etching to the semiconductor wafer W and the inner wall of the vacuum chamber 1, and it is necessary to select Plasma easily ignites gas. Moreover, the semiconductor wafer W 'to be processed is also selected based on whether or not the previous process has been applied, and when the most suitable gas type is changed. Next, after a weak plasma is applied to the semiconductor wafer W as described above, as shown in FIG. 2, a DC voltage (HV) from the DC power source 5 is applied to the electrostatic chuck electrode 4a. Thereafter, a specified processing gas (uranium-etched gas) is supplied into the vacuum chamber 1 from the processing gas supply source 22, and a high-frequency power source 11 is supplied to the mounting table 2 serving as the lower electrode at a high level, such as 2000 W. The high-frequency power (frequency, for example, 13.56 MHz) generates a strong plasma, and is subjected to a usual plasma treatment (etching treatment). In Fig. 2, the horizontal axis represents time, and the vertical axis represents voltage 値 in the case of the electrostatic chuck HV, and power 电力 in the case of the RF output. At this time, a high-frequency electric field is formed in the processing space between the shower head 15 of the upper electrode and the mounting table 2 of the lower electrode by applying high-frequency power to the mounting table 2 of the lower electrode, and a magnetic field is formed in accordance with the magnetic field forming mechanism 24. In this state, etching is performed by plasma. -12-(9) 200410332 Then, once the specified etching process is performed, the high frequency power from the high frequency power supply 11 is stopped to stop the etching process, and the semiconductor wafer w is carried out in the reverse order of the above order. Outside the vacuum chamber 1.

As described above, first, a weak plasma is applied to the semiconductor circle, and then the semiconductor wafer w is etched to make the proportion of surface arc light generated by the semiconductor wafer W close to zero (I% or less). Does not vary by production batch. On the other hand, when the processing is started without the weak plasma as described above, the proportion of surface arc light generated by the semiconductor wafer W may be about 80% depending on the lot. The reason is that the semiconductor wafer W is electrified in a process earlier than etching, and this kind of surface arcing, especially in the case of the former process in which the so-called Low-K film is formed by CVD, has a high probability. Therefore, it can be confirmed that the ratio of surface arc generated by the semiconductor wafer W can be greatly reduced by applying a weak plasma to the semiconductor wafer W as described above before starting the normal processing.

However, as shown in FIG. 1, the above-mentioned embodiment is described in the case of using a device configured to apply high-frequency power only to the mounting table 2 of the lower electrode, but it can also be applied to, for example, FIG. 3 In other words, the so-called upper and lower application type plasma processing device is configured so that high-frequency power is applied from the high-frequency power source 31 to the shower head 15 as the upper electrode through the integrator. In this case, for example, as shown in FIG. 4, first, low-frequency high-frequency power is applied to the lower electrode mounting table 2, and then low-frequency high-frequency power is applied to the shower head 15 of the upper electrode. Here, temporarily stop. High-frequency power is applied to the lower electrode mounting table 2. Then, in this state, after a period of -13- (10) 200410332, a weak plasma was applied to the semiconductor wafer w to 'stop applying high-frequency power to the shower head 15 of the upper electrode' and let the plasma disappear temporarily. .

Then, start sequentially: apply a DC voltage (Η V) to the electrostatic chuck electrode 4 a of the electrostatic chuck 4, and apply normal high-frequency power (high-frequency high-frequency power) for processing to the lower electrode mounting table 2. ) 'Normal high-frequency power (high-frequency high-frequency power) for processing is applied to the shower head 15 of the upper electrode, and normal processing of the semiconductor wafer W is started. In this way, the present invention can be applied to a plasma processing apparatus of an upper and lower application type. In addition, it is preferable to use a weak plasma as described above 'or separately, before starting the process, for example, an ionizer is applied to the semiconductor wafer W to reduce its internal charge. By the action of the ionizer, the occurrence of surface arc light can be suppressed. The ionizer can be installed in a vacuum chamber, or it can be installed in other places outside the vacuum chamber.

However, in the plasma processing method shown in FIG. 2, the low-frequency power is applied to the lower electrode mounting table 2 and the high-frequency power is not applied after the weak plasma is activated. The electrostatic chuck electrode 4 a of the electrostatic chuck 4 applies a DC voltage (Η V). In this way, when a weak high-frequency power is applied and a weak plasma is not applied after the high-frequency power is applied, a DC voltage (ΗV) is applied to the electrostatic chuck electrode 4a, and then DC is applied. When the voltage (Η V), a lightning discharge may occur and damage the substrate. In this case, as shown in FIG. 5, in a state where high-frequency power is applied to the mounting table 2 (a state where a weak plasma is generated) -14- (11) 200410332, the electrode for electrostatic chucks 4 a is started. By applying a DC voltage (Η V) ', the occurrence of discharge can be suppressed. The foregoing description of the first embodiment is a method of using weak plasma with Ar before plasma treatment such as etching, and the timing of applying a DC voltage to the electrostatic chuck electrode 4a at this time. . (Second Embodiment)

Next, the relationship between the timing of applying high-frequency power during the plasma processing such as uranium etching and the timing of applying a DC voltage to the electrostatic chuck electrode 4a will be explained with a suitable example.

The electrostatic chuck 4 includes a bipolar type and a unipolar type. In addition, these types also include a coulomb type and a Johnson-Lav eik type. Among them, when a unipolar and Coulomb-type electrostatic chuck 4 is used, it is preferable to perform the adsorption of the semiconductor wafer W according to the following procedure. The procedure is shown in Figure 6. The horizontal axis indicates time, the vertical axis indicates the application of high-frequency power 値 (W), and the solid line indicates the application of DC voltage 値 (V). That is, after the semiconductor wafer W is placed on the mounting table 2 (electrostatic chuck 4), introduction of gas into the vacuum chamber 1 is started. Next, as shown by a dotted line in FIG. 6, first, high-frequency power is applied to the stage 2 to generate plasma, and then, as shown by a solid line in FIG. 6, a DC voltage (HV) is applied to the electrostatic chuck electrode 4 a. ). In addition, because the semiconductor wafer W was not attracted to the electrostatic chuck 4 before the application of the DC voltage (HV) to the electrostatic chuck electrode 4a, the temperature control was not sufficiently advanced. Therefore, the high-frequency power applied to -15- (12) (12) 200410332 on the stage 2 when the electric power was first generated is set to be lower than the local-frequency power applied during processing (for example, 5 0 0 W or so) and it is best to form the semiconductor wafer W without increasing its temperature

Method C Next, when the semiconductor wafer W is removed from the electrostatic chuck 4, as shown in the figure, after the plasma processing is completed, first, the high-frequency power 値 is reduced to less than that applied during processing. The power of high-frequency power (not 0W). After that, the application of the DC voltage (HV) to the electrostatic chuck electrode 4a is stopped, and then the application of high-frequency power is stopped so that the plasma disappears. In addition, when the application of a DC voltage (HV) to the electrostatic chuck electrode 4a is stopped, a voltage having a polarity opposite to that at the time of adsorption is temporarily applied to the electrostatic chuck electrode 4a (for example, about 2 0 0 0 V). To remove the charge and to easily remove the semiconductor wafer W. The application of the voltage of the opposite polarity must be carried out as required. As long as the semiconductor wafer W can be easily removed from the electrostatic chuck 4 without the application of the voltage of the opposite polarity, the application of the voltage of the opposite polarity is not performed. . FIG. 7 shows that when the semiconductor wafer W is attracted by the electrostatic chuck 4 as described above, the copper electrode portion (Cu) of the electrostatic chuck (ESC) and the polyimide insulation film portion (PI), and the multilayer Backside oxide film portion (BS Ox) and silicon substrate portion (Si sub) and oxide film portion (0x) of the semiconductor wafer (Multi Layer Wafer), and processing space portion (Space) and upper electrode portion (Wall) in the vacuum chamber Wait for the potential of each part to change. As shown in the figure, first, the wafer supporting pins provided on the mounting table 2 are lowered to place the semiconductor wafer W on the mounting table 2, as shown in -16- (13) 200410332 ①, The state of the potential of each part is zero. After that, when the gas is introduced into the vacuum chamber, it is also shown as ② in the figure. After the potential of each part is zero, the high-frequency power is applied to generate plasma, as shown in the figure. The potential of W becomes a potential that is about 100 V depending on the state of the plasma. Then, in this state, when a DC voltage (Η V) is applied to the electrode for the electrostatic chuck, as shown by (4) in the figure, the potential of the electrostatic chuck 1 becomes the potential of the applied DC voltage (HV) (for example, left and right). ), And a potential difference is generated in the insulating film portion (PI) to perform the getter wafer W. In this way, if the semiconductor is sucked by the electrostatic chuck 4 in accordance with the above-mentioned procedure, because a high voltage is not applied to the surface of the semiconductor wafer W along with the application of a DC voltage (HV) to the static electrode 4a, the semiconductor wafer W is stopped. Unexpected abnormal discharge occurs on the surface. The second embodiment has been described so far, and the procedure of applying a high-frequency power after-flow voltage has the following effects. The procedure shown in FIG. Plasma treatment opens the electrostatic chuck electrode 4 a. After applying a DC voltage, high-frequency power is applied to the lower electrode (part electrode) and after the plasma treatment is completed, the DC voltage after the high OFF is turned off. At the time of suction and release, the pressure on the semiconductor wafer w is not applied as shown in Fig. 10. Therefore, the semiconductor wafer w may be damaged, and a defect having a diameter of about several tens of am may be generated. Causes arc light, resulting in defective products. In addition, 'defects will form an internal open state. The negative 4a and t pole 4a 1 .5KV in the state ③ are on the semiconducting wafer w electric chuck, so it can prevent the application from facing up or up. frequency In the case of electric power or large electricity, it may occur in the etch field 5 and Lai Fengye, -17- (14) (14) 200410332 may also cause the situation of attaching to the semiconductor wafer W. However, this embodiment has been described so far. In the process of RF ON—HV ON at the start of processing and HV OFF—RF OFF at the end of processing, the semiconductor wafer W will not be damaged because high voltage is not applied to the semiconductor wafer, and it can prevent Arc on the surface of the semiconductor wafer w. In addition, according to the procedure of FIG. 9, even if the surface of the semiconductor wafer W does not cause damage, the semiconductor wafer W is charged with a DC voltage applied to the electrostatic chuck electrode 4 a. Therefore, the electrostatic force may cause the charged particles normally floating in the processing chamber to attach to the semiconductor wafer w. However, the so-called RF ON- HV ON at the beginning of processing and the HV OFF- RF OFF procedure at the end of processing In this case, because a high-frequency discharge continues until a DC voltage is applied to the electrostatic chuck, floating charged particles are trapped in the ion layer, and as a result, particles attached to the semiconductor wafer W can be caused. This effect is also shown below. The capture effect of the verification ion layer is shown below. Figure 11 shows the number of particles attached due to the difference in the applied DC voltage of the electrostatic chuck used to attract the semiconductor wafer W. That is, it was shown that, first, a CF-based reactant, which is a source of particle generation, was attached (sheathing) in a processing chamber of a plasma processing apparatus, and then the semiconductor wafer W was carried into the processing chamber to load Place it on an electrostatic chuck and let the process gas circulate for a certain period of time. Then, remove the semiconductor wafer-18- (15) (15) 200410332 round w and remove it from the processing chamber. The number of particles attached to the semiconductor wafer W is determined by The particle size is divided into 3 types, and the number of particles of the 3 types of particles is calculated. The DC voltage of the electrostatic chuck is set to 0V, 1.5kV, 2.0kV, and 2.5kV, and the results are investigated on various occasions. As shown in the figure, if the DC applied voltage of the electrostatic chuck is increased, the number of particles attached to the semiconductor wafer W will increase. In other words, it is known that the DC voltage applied to the electrostatic chuck will affect the attachment of particles on the semiconductor wafer w. In addition, the processing conditions of the sheath processing project are: pressure: 6.65Pa, high-frequency power: 3500W, gas used: C4F8 / Ar / CH2F2 = 13/600 / 5sccm, pressure on the backside of the wafer (central / peripheral): 1 3 3 0/3 9 9 0 Pa, temperature (top / side wall / bottom): 6 0/60/60 ° C, high frequency application time: 3 minutes. In addition, the semiconductor wafer W is arranged on an electrostatic chuck to make the gas flow ^ the pressure, the gas used, the pressure on the back of the wafer, and the temperature are the same as above, and the local frequency power = 0, the gas The circulation time is 60 seconds. Moreover, the above static elimination engineering aspects are based on pressure: 26.6 Pa, applied voltage: -1.5kV, voltage application time: 1 second, and pressure. 5 3 · 2 P a, N 2: 1 0 0 0 sccm, Time: 15 seconds to perform the static elimination of the semiconductor wafer W, and to perform electrostatic elimination of the electrostatic chuck under the conditions of applied voltage:-2 · Ok V, voltage application date: 1 second. In addition, because the $ type static elimination is performed when the semiconductor W is transported after the end of the process ^ _ bulk wafer W is off, which may cause unwanted re-attachment of particles. In the case of $ ^, by eliminating electricity, it does not occur. This type of semiconductor wafer W pops up in the shape of -19- (16) (16) 200410332. In addition, Fig. 12 shows that after the above-mentioned sheath processing process, the semiconductor wafer W is arranged in a processing chamber, and in this state, the dry reacting is performed to cause a large number of reactants attached to the sheath processing process. The particles are for the program called RF ON- > HV ON at the start of processing, HV OFF- RF OFF at the end of processing, and HV ON- RF ON at the start of processing, and RF OFF at the end of processing- > In the case of the ΗV FF program, the number of particles attached to the semiconductor wafer W was measured. In terms of measurement, the sheath treatment process and the static elimination process are the same as those described above, and the processing conditions of the 02 dry cleaning process are: pressure: 13.3Pa, high-frequency power: 1,000W, and gas: 〇2 = 1 〇〇〇sccm, wafer back pressure (central / peripheral): 1330/3 9 9 0 P a, temperature (top / side wall / bottom): 6 0/6 0/60 ° C, high frequency application time: 3 0 seconds. As shown in the figure, by adopting a program called RF ON—HV ON at the beginning of processing and HV OFF—RF OFF at the end of processing, the number of attached particles can be greatly reduced. Further, as shown in the procedure shown in FIG. 8, the application of the electrostatic chuck electrode 4 a is started in a state (①) in which a semiconductor wafer is supported by a wafer support pin (support rod) provided on the mounting table 2. After the DC voltage (HV) (②), the wafer support pins are lowered to place the semiconductor wafer w on the mounting table 2 (③, ④), even when the semiconductor wafer W is being held. The surface of the semiconductor wafer W does not become a potential of the applied DC voltage (HV). Therefore, even by the sorption process of this method -20- (17) 200410332, it is possible to prevent the occurrence of an unexpected abnormal discharge on the surface of the semiconductor wafer W. However, in this method, the pin for wafer support is conductive, and it is not necessary to form a structure in which a charge is supplied to the semiconductor wafer W from the pin. In addition, with regard to the abnormal discharge generated when the electrostatic chuck is used in the above manner, even a Coulomb-type electrostatic chuck, such as a bipolar electrostatic chuck, can prevent abnormal discharge.

In the above example, an embodiment of the etching process using a parallel plate type etching apparatus is described. However, the present invention is not limited to this embodiment, but it can be applied to a so-called plasma process. In addition, in the above-mentioned embodiment, the case where a weak plasma is made to function in the vacuum chamber of the etching device that performs the etching process is described, but the weak plasma can also be made to function in other places of the processing device. And the semiconductor wafer W is initialized.

As described in the above [delta], according to the present invention, the occurrence of surface arcs on the substrate to be processed can be prevented, and the productivity can be improved compared with the past. Industrial Applicability The plasma processing method and the plasma processing apparatus of the present invention are applicable to the semiconductor manufacturing industry for manufacturing semiconductor devices. Therefore, there are industrial possibilities. [Brief description of the drawings] -21-(18) 200410332 The first diagram is a schematic diagram of the general structure of a device used in one embodiment of the present invention. Fig. 2 is a diagram for explaining a plasma processing method according to an embodiment of the present invention. Fig. 3 is a schematic diagram of a schematic configuration of a device used in another embodiment of the present invention.

Fig. 4 is a diagram for explaining a plasma processing method according to another embodiment of the present invention. Fig. 5 is a diagram for explaining a plasma processing method according to a modified example of the embodiment shown in Fig. 2; FIG. 6 is a diagram for explaining a chuck method according to an electrostatic chuck. Fig. 7 is a diagram for explaining changes in potential of each part of the chuck method of Fig. 6; Fig. 8 is a diagram for explaining potential changes in each part of other chuck methods.

Fig. 9 is a diagram for explaining a comparative example of the chuck method according to the electrostatic chuck. Fig. 10 is a diagram for explaining potential changes in each part of the chuck method of Fig. 9. Figure Π shows the relationship between the voltage applied to the electrostatic chuck and the number of particles. Figure 12 shows the number of particles caused by different procedures. Figure number description-22- (19) 200410332 w Semiconductor wafer 1 Vacuum chamber 2 Mounting stage η j Insulation plate 4 Electrostatic chuck 5 DC power supply 6 Media flow path 7 Gas flow path 8 Polycondensation ring 9 Feeder wire 10 Integrator 11 Office Frequency Power

Claims (1)

(1) (1) 200410332 Patent application scope 1. A plasma processing method, characterized in that: when plasma is applied to a substrate to be processed and plasma processing is performed, before the aforementioned plasma processing is performed, After the plasma used in the plasma treatment is applied to the substrate to be processed to make the charge state of the substrate to be constant, the plasma treatment is performed. 2. The plasma processing method according to item 1 of the scope of patent application, wherein the weak plasma is applied to the substrate to be processed for a specified time, and then a DC is applied to the electrostatic chuck to hold and hold the substrate to be processed. Voltage ° 3. The plasma processing method according to item 2 of the scope of patent application, wherein before the weak plasma disappears, a DC voltage is applied to the electrostatic chuck. 4. The plasma treatment method as described in the claims 1 to 3, wherein the weak plasma is a plasma formed by Ar, 02, CF4, or N2. 5. The plasma treatment method as described in claims 1 to 4, wherein the aforementioned weak plasma is formed by high-frequency power of 0.1 to 1.0 w / cm2. 6. For example, the plasma processing method for items 1 to 5 of the scope of patent application, wherein the aforementioned weak plasma system acts on the substrate to be processed for a period of 5 ~ -24- (2) 200410332 20 seconds ° 7. If applying for a patent The plasma processing method of the range 1 to 6, wherein at the beginning of the aforementioned plasma processing, after the application of the high-frequency power for generating the plasma, the DC voltage is applied to the electrostatic chuck, and the plasma At the end of the process, after the application of the DC voltage to the electrostatic chuck is stopped, the application of the local frequency power is stopped. 8. The plasma processing method according to claims 1 to 6, in which the application of the electrostatic chuck to the substrate is carried out in a state in which a support rod grounded by a conductor above the electrostatic chuck is used to support the substrate to be processed. After the DC voltage is applied, the substrate to be processed is lowered and placed on the electrostatic chuck. 9. If you apply for plasma treatment methods in the scope of patent applications Nos. 1 to 8, in which The plasma treatment is an etching process, and the weak plasma is applied to the substrate to be processed in a processing chamber in which the etching process is performed. 1. A plasma processing device is provided with a plasma processing mechanism for performing a plasma processing on a substrate to be processed, and is characterized by having the following control of the aforementioned plasma processing mechanism and applying for items 1 to 9 of the scope of patent application: The control department of the telecommunication processing method. -25 ·