TW200418152A - Semiconductor package positionable in encapsulating process and method for fabricating the same - Google Patents

Abstract

A semiconductor package positionable in an encapsulating process and a method for fabricating the same are provided, wherein a lead frame being composed of a die pad and a plurality of leads is prepared, and at least a chip is mounted on the die pad and electrically connected to the leads. A first encapsulant is disposed around the lead frame for encapsulating the chip, the die pad, and inner leads to form an encapsulant unit, wherein at least a first protrusion and a second protrusion are respectively formed in a first surface and an opposite second surface of the encapsulant unit. Thus, the encapsulant unit can be positioned stably in a cavity during a subsequent second encapsulating process by abutting against an upper and a bottom mold with its protrusions, and a second encapsulant is formed for encapsulating the first encapsulant and outer leads with a surface of each outer leads to be exposed and electrically connected to external devices. As a result, the semiconductor package can be prevented from being damaged during the encapsulating process, and a product yield is thereby promoted.

Description

200418152 V. Description of the invention α) [Technical field to which the invention belongs] The present invention refers to a semiconductor package that can be positioned in a sealing process and a method for manufacturing the same, and particularly to a semiconductor package that can be protected from the sealing process. Damaged semiconductor package and its manufacturing method [prior art] Multi-Media Card (MMC) package is a small integrated circuit (Ic) device, which is configured with, for example, a multimedia chip, rewritable Programmable read-only memory " EPR0Mn or electronic rewritable programmable read-only memory n EEPR0JT and other memory chips and control chips, etc., to play the role of storing and processing multimedia information with ^ digital pictures or image data The function, wherein the memory chip and / or the control chip are mounted on a chip carrier (Chip Carrier), so that the chip is electrically connected to an external device to perform the function of the chip. I know that there are three types of wafer carriers: substrate, TAB film and lead frame, but the substrate and film need to be supplemented with precise circuit layout during the manufacturing process, and the unit price is higher than the lead frame, so if this is a wafer Carriers will lead to increased packaging costs. For example, the U.S. Patent No. 6, 0 0, 62, 2 discloses a multimedia card package with a substrate as a carrier, which has a cost problem (the unit price of the substrate often accounts for the overall cost). More than one and a half), therefore, China's Patent Publication No. 4 8 4, 2 2 2 uses a multimedia card package with a lead frame as a chip carrier to solve the above problem, which is shown in FIG. 10 A lead frame 10 having a die pad 11 and a plurality of guide pins 12 located on one side of the die pad 11 is used. Each guide pin 12 is composed of an outer guide pin segment 13 and an inner lead. The guide leg section 15 is formed, and the outer guide leg section 13 and the inner guide leg section 15 are shaped between

17153.ptd Page 9 200418152 i. Description of the invention (2) The difference is one or two degrees; at least one semiconductor wafer i 6 is bonded to the wafer holder i 1 and most of the bonding wires 17 (such as gold wires) are electrically connected. To the inner guide leg section 15; then] a molding operation is performed to form an encapsulant i 8 (Encapsulant) covering the wafer 16, the bonding wire 17, the wafer holder} i and the guide pin 12, and A surface 丄 30 of the outer guide leg section 13 is exposed to expose the encapsulant gel 18 'as an input / output terminal to form an electrical connection with the outside. Although this semiconductor package can reduce the cost of the chip carrier, it also generates other process problems. For example, its overall packaging structure is structured on the lead frame 10 and the lead frame 10 is covered by the packaging gel. 8 This will increase the relative amount of material used in the lead frame 10 and the packaging gel 18. At the same time, in the molding operation of forming the packaging gel 18, the lead frame 13 is often unable to be exposed. For the stable clamping of the mold, the resin material used to form the encapsulation gel 18 easily spills glue (F 1 ash) onto the surface 1 3 0 of the outer guide leg section 13, thereby reducing its electrical connection with the outside world. Quality, and if you want to remove the overflow glue, you need to perform an additional Def lash operation, which will result in unnecessary process costs and it is difficult to mass-produce. Therefore, it is customary to provide a lead frame for chip loading. The method of manufacturing a semiconductor package to solve the foregoing problems is shown in FIG. 11. The finished product is provided with a wafer holder 21 and a plurality of guide pins 2 2 at a predetermined distance from the wafer holder 21. Lead frame 20, and the first seal The gel 2 8 covers the wafer 26 placed on the wafer holder 21, the bonding wire 27, and the inner guide leg section 23 of the guide leg 22 to form a packaging unit 2 0; (I njecti ο η) forming a sealing process to form a second encapsulation gel 2 9 to cover the encapsulation unit 2 0 0 and the guide leg 2 2 and the outer guide leg segment 2 4 to make the outer guide leg segment 2 4Except the surface of the end 2 5 outside the end 2 5 0

17153. ptd Page 10 200418152 V. Description of the invention (3) Exposing the second packaging gel 29, and borrowing the exposed surface 2 50 as the input / output terminal of the semiconductor package; this manufacturing method is implemented by The injection molding process for forming the second package colloid covers the conventional thin small outline package (TSOP) to meet the needs of packages such as multimedia cards, and solves the aforementioned excessive use of lead frames and colloids. 2. The exposed ends of the lead frame are difficult to locate and have problems with glue overflow. Therefore, this method can indeed improve the shortcomings of the conventional package method, reduce production costs and meet the mass production needs of the industry. However, this method still has its process defects in actual production, and it is difficult to achieve the best yield. There are redundant process steps. This is because the injection molding sealing step needs to use four upper pins 2 9 5 (E ject〇r P i η) as shown in Figure 12 to the package unit. 2 0 0 is clamped and positioned in the mold cavity 2 9 3 (Cavi ty) formed by the upper and lower injection molds 2 9 1 and 2 9 2. However, a thimble design will make the surface of the packaging unit 200. After the demolding step, a cavity 2 9 6 as shown in Figures 1 3 A and 1 3 B is left at the previous pushing position of the ejector pin 2 9 5 (Figure 1 3 B is shown in Figure 1 3 A Bottom view), this recessed area 2 9 6 and the previous position area 2 9 8 of the thimble need to be filled with additional resin to maintain the appearance of the finished product, and this additional filling action will not only increase the complexity of the process At the same time, the cavity area 2 9 6 is also very likely to have a phenomenon of incomplete filling to form a hole (V oid), which will break at high temperatures. The structure of the package is damaged. In addition, holding the packaging unit 2000 with a thimble 2 95 can play a role of firm positioning, but if the time for injection molding is too long, the thimble 2 9 5 is also very likely A residual stress is left in the encapsulant, which causes cracks or defects in the encapsulant after using the package for a period of time.

17153.ptd Page 11 200418152 S. Description of Invention (4) A major limitation of the law. -Therefore, how to provide a semiconductor package which can be positioned in the sealing process and can reduce the possibility of damage in the sealing process, and a manufacturing method thereof, so as to improve the yield and reliability of the product by solving the aforementioned problems. It is indeed related to this-an urgent problem in the field of research and development. [Summary of the Invention] An object of the present invention is to provide a semiconductor package which can be firmly fixed in a sealing process and a manufacturing method thereof. Another object of the present invention is to provide a semiconductor package and its manufacturing |, so as to prevent the semiconductor package from being damaged during the sealing process. Another object of the present invention is to provide a semiconductor package and a method for manufacturing the same, so as to prevent the inside of the semiconductor package from forming holes in the sealing process. Another object of the present invention is to provide a semiconductor package and a method for manufacturing the same, so as to prevent the internal stress of the semiconductor package during the sealing process. In order to achieve the foregoing and other objectives, a method for manufacturing a semiconductor package capable of being positioned in an encapsulation process provided by the present invention includes the following steps: preparing a lead frame having at least one type of majority of pins and a chip preset area, The foot is composed of at least an inner guide leg section and an outer guide leg section; at least one chip is connected to a chip preset area of the lead frame, and the chip is electrically connected to the guide pin; a first The encapsulation gel covers the chip, the chip pre-set area and the inner guide leg of the guide pin to form a package unit, and at least one first protrusion is formed on the first surface and the second surface corresponding to the package unit, respectively. Ministry and

17153. ptd Page 12 200418152 V. Description of the invention (5) At least-the second protrusion y and a glue process y so that the first protrusion and the first protrusion of the package 〇70 early yuan abut against the protrusion respectively. The upper and lower molds are positioned in the cavity formed by the upper and lower molds. Two packaging colloids cover the packaging unit and cause one surface of the outer guide leg section to exit the second packaging colloid. The semiconductor package 1 made by the aforementioned manufacturing method includes: a plurality of guide pins having at least one type And — the lead frame 5 of the chip preset area. The guide pin is composed of at least an inner guide leg portion and an outer guide leg portion. At least one chip is connected to the chip preset area of the lead frame and is electrically connected to the A first packaging gel from the chip to the guide pin is used to cover the chip Λ chip preset area and the inner guide pin section of the guide pin to form a package unit, and the first surface and the second surface corresponding to the package unit At least one first protrusion and at least one second protrusion 7 are formed, respectively, and the first protrusion and the second protrusion * have a first height and a second degree y and a The second packaging glue system is used to cover the packaging unit so that one surface of the outer guide leg section exposes the second packaging glue body and covers the second package around the first protruding portion and the first protruding portion, respectively. The thickness of the colloid is not greater than the first degree and the second degree. The aforementioned sealing process for forming the second encapsulating colloid may be an injection molding sealing process or a molding process, and the first and the second are prominent. The parts are formed on the first Λ --- surface by a molding process for forming the first encapsulating colloid, and for positioning the first protruding part and the --- protruding part to position the early part of the package. The best effect is achieved. The position of the first protrusion on the first surface corresponds to the position of the first protrusion on the first surface.

17153. ptd p. 13 200418152 i. Description of Invention (6). -The first protrusion and the second protrusion may be designed as at least one bump, or as a continuous piece surrounding a surrounding space, or as a plurality of discontinuous pieces spaced at an appropriate distance; When the number of the first protrusions and the second protrusions are plural, no matter whether they are designed as bumps or discontinuities, each protrusion must have the same height to prevent the lower protrusions from failing to abut. The surface of the upper and lower molds causes an offset phenomenon in which the packaging unit cannot be firmly positioned. Therefore, the method for manufacturing the semiconductor package φ that can be positioned in the sealing process of the present invention can indeed firmly position the 'packaging unit' in the sealing process. At the same time, the protrusion itself is formed on the packaging unit. The first packaging colloid can prevent the top of the conventional manufacturing process from causing damage to the packaging unit, which can not only reduce the subsequent glue filling steps, but also avoid the occurrence of holes or residual stress in the packaging gel, which can fully Problems in improving conventional technologies. [Embodiment] The method for manufacturing a semiconductor package which can be positioned in a sealing process according to the present invention will be described in detail below with reference to the attached drawings 1A to 1G. First, as shown in Figures 1 A and 1 B (Figure 1 B is a top view of Figure 1 A •), a lead frame 30 is prepared, which has a wafer holder for receiving wafers 36. 3 1, and most of the guide pins 3 2 spaced a predetermined distance d from the wafer holder 31, where 'the' wafer holder 3 1 is disposed at a position slightly lower than the guide pin 3 2 and is separated from the guide pin 3 2 A height difference is formed, and the wafer base 31 is connected to the lead frame 30 by a majority of tie bars 3 0 (Tie Bar); and each of the guide pins 32 is internally guided.

17153. ptd Page 14 200418152 V. Description of the invention (7) The leg section 3 3 is formed with the outer guide leg section 3 4 so that the inner guide leg section 3 3 is adjacent to the wafer holder 31 at the predetermined distance d, and The extremity of the outer guide leg section 3 4 has an exposed end 35. As shown in FIG. 1C, at least one, for example, a multimedia chip (Memory Chip), a control chip (Contr ο 1 1 er Chi), and a memory chip (for example, a rewritable and programmable programmable read-only memory) are prepared. Body "EPROM1, or electronic rewritable and programmable read-only memory n EEPR0Mn) chip 36, remote chip 36 has a working surface 3 6 0 arranged with electronic components and electronic circuits and a non-working surface opposite thereto 3 6 1; A die-bonding operation is performed to place the wafer 3 on the wafer holder 31 by hand, so that the non-active surface 3 6 1 of the wafer 36 can be obtained by a method such as silver glue. Adhesive (Adhesive 'not shown) is adhered to the wafer holder 31. Next, a wire-bonding process is performed to form on the lead frame 30. Most of the bonding wires are gold wires 3 7 to The two ends of the bonding wire 3 7 are respectively welded to the active surface 3 6 0 of the chip 36 and the inner leg section 3 3 of the guide pin, and the chip 3 6 can be electrically connected by the bonding wire 3 7. And the lead frame 30. Then, as shown in FIG. 1D, a molding operation is performed on the lead frame 30 and the wafer 36. A first encapsulating gel 3 8 is formed around, and the lead frame 30 that completes the die bonding and wire bonding operations is placed in a transfer mold 4 5, 4 6 (Transfer Mold), and injected into the molds 45, 46. Like thermosetting resin materials such as epoxy resin (E ρ ο X y R esi η), the thermosetting resin material absorbs the heat energy from the mold and causes the resin molecules to generate cross-links (Cross -Link) to solidify into the first encapsulant 38, which is used to cover the wafer 36, bonding wires 37, and crystals.

17153.ptd Page 15 200418152 i. Description of the invention (8) The film holder 31 and the inner guide leg section 33 of the guide leg, so that the outer guide leg section 3 4 is exposed to the outside, and the encapsulation gel 38 is formed as The package unit 40 with upper and lower first and second surfaces 4 1 and 4 2 shown in the figure; the molding surfaces of the conveying mold upper and lower molds 4 5 and 46 are respectively provided on the mold surfaces. First and second recessed areas 4 7 and 4 8 are formed on the first and second surfaces 41 and 4 2 with first and second protruding portions 50 a and 51 a, and the first and second recessed areas 4 7 The opening positions of 4 and 8 can correspond to the protruding portion 50 a shown in FIG. 1E, which is a top view of the first surface 41 of the packaging unit 40, which can be obtained by using the first The molding of the recessed area 4 7 and the filling of the first encapsulant 3 8 form four square-shaped first protrusions 5 0 a. The four first protrusions " 5 0 a are corresponding to the The bumps in the shape of the first recessed areas 47 have the same first height h 1; wherein the height and position of the first recessed areas 47 in the upper mold 4 5 need to be initially opened. For a precise machining, In order that if the four are formed by the first encapsulant 3 8, the first protrusions 50 a do not have the same first height hi, then the subsequent lower encapsulation process may result in the failure of the first protrusions having a lower height. Abutting against the molding surface of the upper mold 45 makes it difficult for the packaging unit 40 to be firmly positioned against the surface, thereby causing the manufacturing process of the packaging unit 40 to be offset or unevenly filled with colloid, or the exposed surface of the lead frame is not It is completely exposed and reduces its electrical properties. At the same time, if the position of the first protruding portion 50 a is greatly deviated due to insufficient mold opening accuracy i, it may also cause uneven mold pressure or process problems as described above; the second concave The shapes and positions of the area 4 8 and the second protruding portion 5 1 a correspond to the first concave area 4 7 and the first protruding portion 5 0 a shown in the figure, but the designed second height h 2 is not It must be exactly the same as the first height hi, depending on the size design of the semiconductor package such as a multimedia card to be molded.

17153.ptd Page 16 200418152 V. Description of Invention (9). Next, the exposed end portion 3 5 at the end of the exposed outer guide leg section 3 4 may be deformed so as to have a height with the corresponding inner guide leg section 3 3 through the forming step shown in FIG. 1F. Poor, and is located at a position lower than the inner guide leg section 3 3, and the exposed surface 3 5 0 of the exposed end portion 3 5 also forms an inconsistency with the second surface 4 2 of the packaging unit 40 as shown in the figure. A height difference greater than the second height h 2 so that the protruding tip 5 1 0 a of the second protruding portion 5 1 a can be aligned with the exposed surface 3 5 0 of the exposed end portion 3 5 or the protruding point The position of the tip 5 10 a is slightly lower than the exposed surface 3 50 to ensure the positioning effect of the subsequent sealing process and the good electrical properties of the exposed end of the semiconductor package. Next, as shown in FIG. 1G, an injection molding (I njecti η mol ding) sealing process is performed, which places the packaging unit 40 into an injection molding mold 5 5, 5 6 to borrow a thermoplastic ( Thammop 1 astic) resin material forms a second encapsulation gel 39, and borrows the first protrusions 50a and the second protrusions 5a from the packaging unit 40 to abut upward and downward respectively. The upper and lower mold 5 5 and 5 6 surfaces of the injection mold replace the conventional positioning function of the ejector pin, so that the packaging unit 40 can be stably fixed to the injection mold formed by the upper and lower molds 55 and 56. In the cavity 5 7, no offset will occur during the molding process of injection molding, and the surface of the first packaging gel 3 8 of the packaging unit 40 will not be damaged like the conventional thimble; among them, the upper and lower injection molds 5 The height of 5, 5 6 and the formed cavity 5 7 can be determined according to the heights of the protrusions 5 0 a, 5 1 a in the aforementioned process, and the height difference between the exposed surface 3 5 0 and the inner guide leg section 33. The total height of the package unit 40 having protrusions of the first and second heights h 1 and h 2 is not less than the projection height. The height of the mold cavity 5 7 is exposed, and the exposed end portion 3 5 is exposed.

17153.ptd Page 17 200418152 i. Description of the invention (10) The surface 3 50 can rest on the surface of the lower mold 56. -The thermoplastic resin material may be a resin material such as polycarbonate (p 0 丨 ycarb 〇na ΐ e Ester), acrylic resin, polychlorinated chloride or polyester (p〇 丨 yester), and the second material formed by the thermoplastic resin material The encapsulating gel 39 will cover the encapsulating unit 40, so that the exposed surface 3 5 of the exposed end portion 35 of the outer guide leg section 3 4 will expose the second encapsulating gel 39 and be in contact with the second encapsulating gel. The lower surface 390 is flush with 390. The second encapsulant 3 9 is used to cover the first encapsulant 3 8. Therefore, the second encapsulant 3 9 is optional with the first encapsulant 3. Resin material with similar thermal expansion coefficient of 8 to avoid gaps between the contact surfaces of the two glues after being heated; among them, the second encapsulant 39 can also be like the first encapsulant 38, and a transfer mold can be used for this. A thermosetting resin material such as epoxy resin is injected into the mold. After completing the foregoing steps and performing injection mold release, the exposed surface of the exposed end portion 35 can be used as the input / output of the semiconductor package such as a multimedia card, so that the chip 36 can borrow the input / The output terminal is an electrical device (not shown); thus, the semiconductor package of the present invention is completed. The semiconductor package of the present invention is shown in FIG. There is a predetermined lead frame 3 0, among which, the tomb of the tomb moves q 9 Zongshan Qi, Zeng Diaoxin drew Zhejiang, and eighty two • consists of the inner guide leg section 33 and the outer guide foot carboxyl 34, and The guide leg section 33 is adjacent to the predetermined distance, and the end of the outer guide leg section 34 has an exposed end 35; the work: the crystal # 36 placed on the wafer base 31, the inner guide is by most of the bonding wires Leg section 33; used to connect the chip 36, bonding wire 37 and inner guide pin = package

17153. ptd page 18 200418152 V. Description of the invention (11) The first packaging colloid 38 covered with a packaging unit 40, and the first packaging colloid 38 can be used in the packaging unit 40th by the packaging process. First and second surfaces 4 1 and 4 2 are formed with first and second protrusions 50 a and 5 1 a having first and second heights h 1 and h 2 respectively, and are covered by injection molding or compression molding. The second encapsulation body 39 of the encapsulation unit 40 allows the exposed surface 3 5 0 of the exposed end portion 35 of the outer guide leg section 3 4 to be exposed outside the second encapsulation body 39 and to be respectively covered. The thickness of the second encapsulant 39 around the first protruding portion 50a and the second protruding portion 51a is not greater than the first height hi and the second height h2. '' The first and second protrusions disclosed in the present invention are not limited to the design of the foregoing embodiment. As far as the positioning function of the protrusions is intended to be A, the shape and position design need only make the plurality of first It suffices that the protruding portion and the second protruding portion have the same protruding height and a certain symmetrical distribution position. Therefore, any protruding portion design conforming to this principle can be applied to the present invention. The mold opening accuracy of the mold can be achieved, for example, the top view of the first surface 41 of the packaging unit shown in FIG. 3, that is, the position distribution design of another first protruding portion 50b, which can also achieve the same. In addition, if the cost of mold opening is considered, as shown in FIG. 4, the protruding portion can also be designed to be only one convex point 5 0 c located in the center of the first surface 41, However, the firmness of its positioning against the mold will be slightly lower than the previous implementation

17153.ptd page 19 200418152

V. Description of the invention (12) It can also be four discontinuous pieces spaced at an appropriate distance, as shown in Figures 7 and 8. The configurations 50 f and 50 g can also be made according to their symmetry. The packaging unit is firmly positioned in the cavity and is uniformly stressed. The design of this discontinuous piece is the same as the aforementioned bump-type protrusion design. There is no limit on the number of protrusions on the same surface. Only the number of protrusions need to be considered. Whether the position distribution will cause the packaging unit to form an uneven force or offset when sealing is performed. The shape, height, and position of the second protrusions on the second surface 42 need not be the same as those of the first protrusions on the first surface 41. Considering the cost of mold opening, designing the first and second protrusions with the same shape # will produce a better abutment effect, even if the position of the second protrusion on the second surface 42 corresponds to the first A position of a protrusion on the first surface 41 is preferred. If the cost of mold opening is considered, other types of the first and second protruding portions may be formed in other ways, that is, the upper and lower molds that are conventionally not provided with a recessed area are pressed to form the first package. The colloid is coated on the first and second surfaces of the horizontal packaging unit, and the thermosetting resin of a specific shape is coated according to the design by dispensing, so that it becomes the first and second protrusions of the specific shape after curing. The effect of the present invention can also be exerted, but although this method can save the cost of precise mold opening, it may cause a high degree of control error, because in the dispensing process, it is necessary to make the protrusions on the same surface have the same protrusions. The height will be difficult, and the mass productivity is not as good as the method of forming the protrusion by the mold. In addition, during the sealing process of the second encapsulant 39, if the exposed surface 3 5 0 of the exposed end 3 5 is slightly higher than the surface of the lower mold 5 6

17153.ptd Page 20 200418152 V. Description of the invention (13) The contact, or incomplete filling of the second encapsulant 39, may result in the exposed surface 3 5 0 not being exposed, or the protrusion protruding to the For the phenomenon outside the second encapsulant 39, at this time, a conventional grinding (G r 1 nd) method can be used to remove the excess second encapsulant or protrusion (first encapsulant) to make the exposed end 3 5 The exposed surface 3500 is fully exposed, or the protruding portion protruding outward is partially removed by grinding to maintain the surface flatness of the semiconductor package. The lead of the lead frame used in the present invention can also be connected to the chip holder, and the exposed end of the lead can also be changed to make it higher than the inner guide leg, and the second encapsulant is exposed upwards. til the upper surface, in addition to this design, any conventionally used lead frame can be used in the present invention, and the number of wafers placed on the wafer holder and the upper and lower surfaces are not limited; The bottom surface 3 1 0 of the wafer holder 31 can also be designed to expose the second surface 4 2 of the packaging unit, and at the same time, the exposed surface 3 5 of the exposed end 3 5 can be aligned with the second surface 4 2. Then, after completing all processes and removing the second protruding portion 5 1 a protruding outside of the second packaging colloid 3 9, a semiconductor package as shown in FIG. 9 is formed. This design will make the chip 3 6 The thermal energy generated during operation is dissipated to the outside through the exposed bottom surface 3 1 of the wafer holder 3 1, thereby improving the heat dissipation efficiency of the semiconductor package. In summary, the semiconductor package and its manufacturing method disclosed in the present invention can indeed firmly position the packaging unit during the sealing process, and can avoid the damage to the surface of the packaging unit during the conventional sealing process. , Not only can reduce the process steps performed, but also will not cause holes or residual stress in the packaging colloid to affect the yield quality of the semiconductor package; in addition,

17153.ptd Page 21 200418152 i. Description of the invention (14) Only need to complete the mold that can form the protruding part, and start low-cost rapid mass production, which fully meets the needs of the industry. However, the above are only used to explain the specific embodiments of the present invention; they are not used to limit the implementable scope of the present invention. For those skilled in the art, those skilled in the art will not depart from the spirit and principles indicated by the present invention. All equivalent changes or modifications completed, such as forming any protrusions with equivalent effects, or otherwise forming the protrusions, etc., should still be covered by the scope of patents described below. , ‘

17153. ptd Page 22 200418152 Brief description of the drawings [Simplified description of the drawings] Figures 1A to 1G are schematic diagrams of the method for manufacturing the semiconductor package of the present invention, in which Figure 1B is shown in Figure 1A A top view of the lead frame, and FIG. 1E is a top view of the first surface of the packaging unit shown in FIG. 1D; FIG. 2 is a sectional view of the embodiment of the semiconductor package of the present invention; and FIG. 3 is formed in the first A top view of a second embodiment of the first protrusion of the present invention on the surface; FIG. 4 is a top view of a third embodiment of the first protrusion of the present invention formed on the first surface; and a fifth view is formed on the first A top view of a fourth embodiment of the first protrusion of the present invention on the surface; FIG. 6 is a top view of a fifth embodiment of the first protrusion of the present invention formed on the first surface; and FIG. 7 is formed on Top view of the sixth embodiment of the first protrusion of the present invention on the first surface; Figure 8 is a top view of the seventh embodiment of the first protrusion of the present invention formed on the first surface; Figure 9 is Sectional view of another embodiment of the semiconductor package of the present invention; FIG. 10 is a Chinese patent A cross-sectional view of the semiconductor package disclosed in Announcement No. 4 8 4 2 2 2; FIG. 11 is a cross-sectional view of another conventional semiconductor package; FIG. 12 is a semiconductor package shown in FIG. Schematic diagram of the sealing process; and

17153. ptd Page 23 200418152 Brief description of the drawings Figures 1 3A and 1 3B are schematic diagrams of the pits formed by the semiconductor package shown in Figure 11 during the sealing process, of which Figure 1 3B is Figure 1 View below 3A. 10 Lead frame 11 Wafer holder 12 Guide pin 13 Outer guide leg section 130 Outer guide leg exposed surface 15 Inner leg section 16 Wafer 17 Welding wire 18 Packaging gel 20 Lead frame packaging unit 21 Wafer holder 22 Guide leg 23 Inner guide leg 24 Outer guide leg 25 Exposed end 250 Exposed surface 26 Wafer 27 Welding wire 28 First encapsulant 29 Second encapsulant 291 Upper mold 292 Lower mold 293 Cavity 295 Thimble 296 Cavity 298 Thimble position area 30 Lead frame 300 Tie 31 Wafer seat • Guide pin 33 Inner guide leg segment 34 Outer guide leg segment 35 Exposed end 350 Exposed surface 36 Wafer 360 Wafer active surface 361 Wafer non-active surface 37 Welding wire 38 First package gel

17153.ptd Page 24 200418152 Brief description of the drawing 3 9 The second encapsulant 4 1 The first surface 4 5 The upper mold 4 7 The first recessed area 50a The bump-type first protrusion 50c The first protrusion 50e The first protrusion Part 50g first protruding part 5 10 bump tip 56 lower die d predetermined distance h 2 second height 40 packaging unit 4 2 second surface 46 lower die 48 second recessed area 50b first protruding part 50d first protruding part 5 0 f first protrusion 5 1a bump-type second protrusion 5 5 upper die 5 7 / cavity hi first height

Page 25 17153.ptd

Claims (1)

200418152 VI. Scope of patent application 1. A method for manufacturing a semiconductor package that can be positioned in the sealing process, including the following steps: preparing a lead frame with a plurality of guide pins; ^ placing at least one wafer in the The lead frame is electrically connected to the chip to the lead; the chip and a part of the lead are covered with a first packaging gel to form a packaging unit, and the first surface corresponding to the packaging unit and the second At least one first protruding portion and at least one second protruding portion are formed on the surface, respectively; and _ a glue process is performed to make the first protruding portion and the second protruding portion of the 'package unit abut against the upper and lower portions, respectively. The packaging unit is positioned in the cavity formed by the upper and lower molds, a second packaging gel covers the packaging unit, and a surface of the guide pin not covered by the first packaging gel is outside The second encapsulant is exposed. 2. The manufacturing method according to item 1 of the scope of patent application, wherein the position of the first protrusion on the first surface corresponds to the position of the second protrusion on the second surface. 3. For the manufacturing method according to item 1 of the scope of patent application, wherein the first protruding portion and the second protruding portion are a bump. • The manufacturing method according to item 1 of the scope of patent application, wherein the first protruding portion and the second protruding portion are continuous pieces that can be enclosed into a surrounding space. 5. The manufacturing method according to item 1 of the patent application scope, wherein the first protruding portion and the second protruding portion are a plurality of discontinuous pieces spaced at an appropriate distance. 17153. ptd page 26 200418152 6. Scope of patent application 6. For the manufacturing method of the scope of patent application item 1, if the number of the first protrusion and the second protrusion is plural, the plurality of first protrusions The first protrusion and the second protrusion have the same first height and second height respectively. 7. The manufacturing method according to item 1 of the patent application scope, wherein the first protruding portion and the second protruding portion are formed on the first surface and the second surface respectively by a molding process for forming the first encapsulating gel. 8. The manufacturing method according to item 1 of the patent application scope, wherein the first protruding portion and the second protruding portion are respectively formed on the first surface and the second surface by a dispensing process after the molding process is completed. 9. The manufacturing method according to item 1 of the patent application scope, wherein the sealing process is an injection molding process or a molding process. 10. The manufacturing method according to item 1 of the scope of patent application, wherein the guide pin includes at least an outer guide leg segment not covered by the first encapsulating gel and an inner lead leg segment encapsulated by the first encapsulating gel. A height difference is formed between a surface of the outer guide leg section exposing the second encapsulant and the inner guide leg section. 1 1. The manufacturing method according to item 10 of the scope of patent application, wherein the surface of the outer package leg exposing the second encapsulant is flush with the surface of the second encapsulant. 12. According to the manufacturing method of item 1 of the patent application scope, wherein the chip is electrically connected to the guide pin by a plurality of bonding wires. 1 3. According to the manufacturing method of item 12 in the scope of patent application, wherein the welding wire is a gold wire. 14. The manufacturing method of item 1 in the scope of patent application, wherein the first encapsulant is Page 27 17153. ptd 200418152 6. Scope of patent application The second sealant system is made of a thermosetting resin. 15 The manufacturing method according to item 1 of the patent application scope, wherein the second encapsulating colloid is made of a thermoplastic resin. 16. The manufacturing method according to item 15 of the scope of patent application, wherein the thermoplastic resin is selected from the group consisting of polycarbonate (Polycarbonate Ester), acrylic resin, polychloromethylene, and polyester resin (P ο 1 yester) resin material. Groups of groups. 17. The manufacturing method of item 1 in the scope of patent application, wherein the semiconductor package is a Mult 1-Media Card (MM.C). . For example, the manufacturing method of item 1 of the scope of patent application, 'wherein, the chip is selected from a multimedia chip, a rewritable and programmable read-only memory EPROM chip, an electronic rewritable and programmable read-only memory n One of the groups consisting of EE PROM %% wafers and control wafers. 1 9. A semiconductor package that can be positioned during the encapsulation process, includes: a lead frame with a plurality of lead pins; at least one wafer Is connected to the lead frame, and electrically connects the chip to the lead pin; a first packaging gel is used to cover the chip and part of the lead pin to form a packaging unit, and the packaging unit is similar to Correspondingly, at least one first protruding portion and at least one second protruding portion are formed on the first surface and the second surface respectively, and the first protruding portion and the second protruding portion have a first height and a second height, respectively. Height; and a second encapsulating gel for covering the encapsulating unit so that a surface of the guide pin not covered by the first encapsulating gel is exposed to the first 17153. ptd page 28 200418152 VI. Scope of patent application Second encapsulation gel, and the thickness of the second encapsulation gel covering the first protruding part and the second protruding part, respectively, is not greater than the first height and the second height. 20. The semiconductor package of claim 19, wherein the position of the first protrusion on the first surface corresponds to the position of the second protrusion on the second surface. 2 1. The semiconductor package of claim 19, wherein the first protrusion and the second protrusion are a bump. 2 2. The semiconductor package according to item 19 of the scope of patent application, wherein the first protruding portion and the second protruding portion are continuous pieces that can be enclosed in a surrounding space. 2 3. The semiconductor package according to item 19 of the scope of patent application, wherein the first protruding portion and the second protruding portion are a plurality of discontinuous pieces spaced apart at an appropriate distance. 24. The semiconductor package according to item 19 of the scope of patent application, wherein if the number of the first protrusions and the second protrusions is plural, the first protrusions and the second protrusions are respectively separated from each other. Have the same first height and second height. 25. The semiconductor package according to item 19 of the scope of patent application, wherein the first protrusion and the second protrusion are formed on the first surface and the first protrusion respectively by a molding process for forming the first package colloid. Two on the surface. 26. The semiconductor package according to item 19 of the patent application scope, wherein the first protruding portion and the second protruding portion are formed on the first surface and the second surface respectively by a dispensing process after the molding process is completed. On the surface. 17153. ptd page 29 200418152 6. Application scope of patent 27. For the semiconductor package of item 19 of the scope of application for patent, the seal and glue process is an injection molding seal process or compression molding seal process. 2 [If the semiconductor package of item 19 in the scope of the patent application, the guide pin system includes at least an outer guide leg segment not covered by the first encapsulation gel and an inner lead encapsulation by the first encapsulation gel. And a height difference between the surface of the outer guide leg that exposes the second encapsulant and the inner guide leg. 29. The semiconductor package of claim 28, wherein the surface of the outer lead leg exposing the second packaging gel is flush with the surface of the second packaging gel. 30. The semiconductor package of claim 19, wherein the chip is electrically connected to the lead pin by a plurality of bonding wires. 31. The semiconductor package of claim 30 in the scope of patent application, wherein the bonding wire is a gold wire. 32. The semiconductor package of claim 19, wherein the first encapsulant and the second encapsulant system are made of a thermosetting resin. 33. The semiconductor package of claim 19, wherein the second encapsulant system is made of a thermoplastic resin. The semiconductor package according to item 33 of the patent application scope, wherein the thermoplastic resin is selected from the group consisting of polycarbonate (p ο 1 ycarb ο nate E ster), acrylic resin, polychlorinated chlorin and polyesters (P ο 1 yester) Groups made of resin materials. 35. The semiconductor package of item 19 in the scope of patent application, wherein the half 17153. ptd page 30 200418152 VI. Patent application scope The conductor package is a Multi-Media Card (MMC) 〇 3 6. For example, the semiconductor package of item 19 of the patent scope, where the chip is It is selected from one of the group consisting of a multimedia chip, a rewritable and programmable read-only memory n EPROM " chip, an electronic rewritable and programmable read-only memory π EEPROM chip and a control chip. Page 31 17153.ptd