TW200428785A - Fast frequency synthesizing and modulating apparatus and method - Google Patents

Fast frequency synthesizing and modulating apparatus and method Download PDF

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TW200428785A
TW200428785A TW92114886A TW92114886A TW200428785A TW 200428785 A TW200428785 A TW 200428785A TW 92114886 A TW92114886 A TW 92114886A TW 92114886 A TW92114886 A TW 92114886A TW 200428785 A TW200428785 A TW 200428785A
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signal
frequency
data
output
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TW92114886A
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TWI226755B (en
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Jeng-Fa Chen
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Chung Shan Inst Of Science
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Abstract

A fast frequency synthesizing and modulating apparatus and method is provided, which includes a first phase lock loop (PLL) and a second phase lock loop. The first lock loop makes sure that the output modulated signal can keep the stability fixed according to a reference frequency signal with high precision. Then, the miss sampling of the transmission data can be improved. The second phase lock loop is linked to the microcomputer controller to pre-store the each control voltage of each band frequency into a master control panel. Then, the master control panel can provide a predetermined control voltage in accordance with the working frequency. By this way, the speed of the frequency hopping can be accelerated.

Description

200428785 五、發明說明(1) 發明所屬之技術領域 本發明是有關於無線通訊系統中的跳頻處理技術,且 特別是有關於一種快速頻率合成及調制技術。 先前技術 隨著全世界國際化的同時,通訊技術的重要性也越來 越加受到重視。若是某一國不幸發生大事故,藉由通訊的 便利性可以快速地將此訊息傳送到世界各國,得到各國的 援助。而在通訊技術中,現在最吸引人注意的就屬無線通 訊。因為想要在有點距離但卻沒有線路連接的兩地之間相 互傳遞資訊,除了無線通訊之外,沒有其他更有效率的方 式。近年來,更由於半導體技術的快速發展,使用數位的4 形式來處理資料的方式也越來越普遍。因此,現今使用的 無線通訊中,大部分都選擇採用數位的形式來處理資料。 就傳統的無線數位通訊而言,位於傳送端的數位資料 内容,會轉換成一種用來傳送用的射頻類比信號,藉由發 射器將此信號傳遞出去。此時接收器若是調整到與發射器 所發射出的射頻類比信號的頻率一樣時或者是保持在一個 可允許的誤差範圍内,便可以接收由發射器所發射出的射 頻類比信號。當然,在接收到此射頻類比信號之後,接收 端將會把接收到的射頻類比信號轉換成數位的形式之後再 行處理。 傳統用於頻率合成及調制所使用的基本鎖相迴路組成„ 中包括:相位檢知器、除頻器、壓控振盪器。相位檢知器 除了接收一個參考頻率信號的輸入外,電性連接至壓控振200428785 V. Description of the invention (1) Technical field to which the invention belongs The present invention relates to a frequency hopping processing technology in a wireless communication system, and particularly to a fast frequency synthesis and modulation technology. Prior technologies As the world has become internationalized, the importance of communications technology has become increasingly important. If a major accident happens in a certain country, the convenience of communication can quickly send this message to all countries in the world and get assistance from all countries. In communication technology, wireless communication is the most attractive now. Because you want to transfer information between two places that are a little distance away but not connected by lines, there is no other more efficient way than wireless communication. In recent years, due to the rapid development of semiconductor technology, the use of digital 4 forms to process data has become more and more common. Therefore, most of the wireless communications used today choose to use digital form to process data. For traditional wireless digital communications, the digital data content at the transmitting end is converted into a radio-frequency analog signal for transmission, which is transmitted by the transmitter. At this time, if the receiver is adjusted to the same frequency as the radio frequency analog signal transmitted by the transmitter or is kept within an allowable error range, it can receive the radio frequency analog signal transmitted by the transmitter. Of course, after receiving this RF analog signal, the receiving end will convert the received RF analog signal into a digital form before processing. The basic phase-locked loop components traditionally used for frequency synthesis and modulation include: a phase detector, a frequency divider, and a voltage-controlled oscillator. In addition to receiving a reference frequency signal input, the phase detector is electrically connected To voltage controlled vibration

11210rwf.ptd 第5頁 200428785 五、發明說明(2) 盪器及除頻器。壓控振盪器係負責輸出振盪信號。相位檢 知器用於比較輸入的參考頻率信號及除頻器所輸出的信號 的相位。除頻器在此將壓控振盪器所輸出的振盪信號進行 除頻後,傳送到相位檢知器。壓控振盪器則是接收相位檢 知器所輸出的信號,經過振盪後提供一個輸出信號之外, 並將此輸出信號送至除頻器。 眾所皆知,石英晶體由於具極穩定的共振特性與非常 高的選擇性(即Q值),使用在振盪器上,可使振盪器的 輸出保持非常精確且穩定的頻率,即高穩定度。但是習知 之鎖相迴路中使用壓控振盪器,其並不是具有高穩定性的 晶體振盪器,故需要有穩定的參考頻率,並進行回授鎖頻 動作。但是傳統鎖相迴路會在鎖頻速度較快時,發生資料 遺失的情形。另外,傳統的鎖相迴路中,由於頻段的調制 量的大小需要一個迴路週期的時間後才能取得調制量的資 料。無法控制精確的調制量之外,鎖頻速度也隨之掌握困 難。再加上,除頻器又是以一固定的值來做除頻的動作, 引起高頻段、低頻段之間跳頻速度難以掌控的問題。 綜合以上所述,可以知道使用習知的單一鎖相迴路來 進行頻率合成及調制時,會有以下等缺點: (1 )傳統的單一鎖相迴路遇到鎖頻速度較快時,會 造成低頻調制響應差,因而無法正常地傳送數據、資料, 甚至會有資料遺失的情況發生; (2 )傳統的單一鎖相迴路由於高、低頻段間的調制 量很難控制,鎖頻速度非常難以掌握;11210rwf.ptd Page 5 200428785 V. Description of the invention (2) Oscillator and frequency divider. The voltage controlled oscillator is responsible for outputting the oscillation signal. The phase detector is used to compare the phase of the input reference frequency signal and the signal output by the divider. The frequency divider divides the oscillating signal output by the voltage controlled oscillator and sends it to the phase detector. The voltage-controlled oscillator receives the signal output by the phase detector, provides an output signal after oscillation, and sends the output signal to the frequency divider. It is well known that quartz crystals have extremely stable resonance characteristics and very high selectivity (ie, Q value). When used on an oscillator, the output of the oscillator can maintain a very accurate and stable frequency, that is, high stability . However, the voltage-controlled oscillator used in the conventional phase-locked loop is not a crystal oscillator with high stability, so it needs to have a stable reference frequency and perform feedback frequency-locked operation. However, traditional phase-locked loops will lose data when the frequency is locked fast. In addition, in the traditional phase-locked loop, the modulation amount of the frequency band needs a loop cycle time to obtain the modulation amount data. In addition to the inability to control the precise amount of modulation, the frequency-locking speed also becomes difficult to grasp. In addition, the frequency divider uses a fixed value to perform the frequency division operation, which causes a problem that the frequency hopping speed between the high frequency band and the low frequency band is difficult to control. Based on the above, it can be known that when using a conventional single phase-locked loop for frequency synthesis and modulation, there will be the following disadvantages: (1) When the traditional single phase-locked loop encounters a fast frequency-locking speed, it will cause low frequency The modulation response is poor, so data and data cannot be transmitted normally, and even data loss may occur; (2) The traditional single phase-locked loop is difficult to control due to the modulation between the high and low frequency bands, and it is very difficult to master the frequency lock speed ;

11210twf.ptd 第6頁 200428785 五、發明說明(3) (3 )傳統的單一鎖相迴路因相隔波道密集時,高頻 段、低頻段之間跳頻速度過慢,無法符合現今通訊時代之 需求。 發明内容 有鑑於此,本發明就是為改善先前技術的缺點:1 .低 頻調制響應差時資料流失之問題;2 .調制量控制困難,鎖 頻速度難以掌握之問題;3 .跳頻速度不夠快速之問題。此 發明的功效其一為,提供高穩定度及調制平坦的信號,解 決了資料流失的問題;功效其二為,頻率的調制量可進行 微調且容易控制;功效其三為,提供預置電壓加速跳頻速 度。 本發明提供一種快速頻率合成及調制裝置,此裝置包 括:第一鎖相迴路以及第二鎖相迴路。其中的第一鎖相迴 路係根據輸入資料信號與一個精準參考頻率信號,以調變 並振盪出一個中間已載資料的調變信號,而輸出至第二鎖 相迴路。其中的第二鎖相迴路係接於前述的第一鎖相迴路 之後,其根據前述的中間已載資料的調變信號與一個跳頻 參考頻率信號,來振盪出一個輸出調變信號。其中,這個 第二鎖相迴路包括一個輸出壓控振盪器,這個第二鎖相迴 路依據一項預調偏壓資料,供給先置偏壓給該輸出壓控振 盪器,以便於快速振盪出該輸出調變信號。 在本發明的一個較佳實施例中,第一鎖相迴路包括: 第一相位檢知器、第一壓控振盪器、第一除頻器及第二除 頻器。其中,第一壓控振盪器電性連接至第一相位檢知11210twf.ptd Page 6 200428785 V. Description of the invention (3) (3) When the traditional single phase-locked loop is dense, the frequency hopping speed between the high frequency band and the low frequency band is too slow to meet the needs of the current communication era . SUMMARY OF THE INVENTION In view of this, the present invention is to improve the disadvantages of the prior art: 1. The problem of data loss when the low-frequency modulation response is poor; 2. The modulation amount is difficult to control; Problem. One of the effects of this invention is to provide a signal with high stability and flat modulation, which solves the problem of data loss; the second is to adjust the amount of modulation of the frequency and is easy to control; the third is to provide a preset voltage Speed up frequency hopping. The invention provides a fast frequency synthesizing and modulating device. The device includes a first phase locked loop and a second phase locked loop. The first phase-locked loop is based on the input data signal and a precise reference frequency signal to modulate and oscillate a modulation signal with the data loaded in the middle, and then output to the second phase-locked loop. The second phase-locked loop is connected after the aforementioned first phase-locked loop, and it oscillates an output modulation signal according to the modulation signal of the previously loaded data and a frequency-hopping reference frequency signal. The second phase-locked loop includes an output voltage-controlled oscillator, and the second phase-locked loop supplies a pre-biased voltage to the output voltage-controlled oscillator according to a pre-adjusted bias voltage data, so as to oscillate the Output modulation signal. In a preferred embodiment of the present invention, the first phase-locked loop includes: a first phase detector, a first voltage-controlled oscillator, a first frequency divider, and a second frequency divider. The first voltage-controlled oscillator is electrically connected to the first phase detection.

11210twf.ptd 第7頁 200428785 五、發明說明(4) 器;第一除頻器則是連接至第一相位檢知器以及第一壓控 振盪器。 第一相位檢知器用來比較第一參考頻率信號以及第一 除頻信號後,輸出第一壓控信號。其中前述的第一參考頻 率信號是依據精準參考頻率信號經第二除頻器除頻後所得 到的信號。第一壓控振盪器則是依據前述的第一壓控振盪 信號以及輸入資料信號,經振盪且調變出上述中間已載資 料的調變信號。第一除頻器將前面所述的中間已載資料的 調變信號除頻,得到第一除頻信號; 又,在本發明的一個較佳實施例中,第二鎖相迴路除 了輸出壓控振盪器之外,還包括第二相位檢知器、迴路濾暑 波器、第一混波器、第一低通濾波器、第三除頻器、第二 混波器及第二低通濾波器。其中,迴路濾波器電性連接至 第二相位檢知器以及前面提到的輸出壓控振盪器;第一混 波器電性連接至輸出壓控振盪器;第一低通濾波器電性連 接至第一混波器;第三除頻器電性連接至第二相位檢知 器;第二低通濾波器電性連接至第二混波器。 第二相位檢知器用來比較一個已載資料中頻調變信號 以及第二除頻信號,輸出一個誤差信號。其中,前面所述 之已載資料中頻調變信號是由中間已載資料的調變信號處 理過後所獲得的信號。迴路濾波器則是將誤差信號經濾波 後,得到第二壓控信號。第一混波器將輸出調變信號與跳 頻參考信號混頻後,得到第一混頻信號。第一低通濾波器 將前面所說的第一混頻信號濾波後,得到一個輸出中頻資11210twf.ptd Page 7 200428785 V. Description of the Invention (4) The first frequency divider is connected to the first phase detector and the first voltage controlled oscillator. The first phase detector is used to compare a first reference frequency signal and a first frequency-divided signal, and then output a first voltage control signal. The aforementioned first reference frequency signal is a signal obtained by dividing the frequency of the accurate reference frequency signal by the second frequency divider. The first voltage-controlled oscillator is based on the aforementioned first voltage-controlled oscillation signal and the input data signal, and oscillates and modulates the modulation signal of the above-mentioned intermediate data. The first frequency divider divides the modulation signal of the previously loaded data described above to obtain a first frequency division signal. In addition, in a preferred embodiment of the present invention, the second phase-locked loop saves the In addition to the oscillator, it also includes a second phase detector, a loop filter, a first mixer, a first low-pass filter, a third frequency divider, a second mixer, and a second low-pass filter. Device. The loop filter is electrically connected to the second phase detector and the aforementioned output voltage-controlled oscillator; the first mixer is electrically connected to the output voltage-controlled oscillator; the first low-pass filter is electrically connected To the first mixer; the third frequency divider is electrically connected to the second phase detector; the second low-pass filter is electrically connected to the second mixer. The second phase detector is used to compare an intermediate frequency modulation signal and a second frequency division signal of the loaded data, and output an error signal. Among them, the intermediate frequency modulation signal of the previously loaded data is a signal obtained by processing the modulation signal of the middle loaded data. The loop filter obtains the second voltage-controlled signal after filtering the error signal. The first mixer obtains a first mixed signal after mixing the output modulation signal with a frequency hopping reference signal. First low-pass filter After filtering the aforementioned first mixed frequency signal, an output intermediate frequency data is obtained

11210twf.ptd 第 8 頁 Λ /t 1 200428785 五、發明說明(5) 料信號。第三除頻器則是把前面得到的輸出中頻資料信號 除頻後,得到第二除頻信號。第二混波器則是將第一鎖相 迴路所輸出的中間已載資料調變信號和第二參考頻率信號 混頻,得到第二混頻信號。第二低通滤波器則將前面所提 到的第二混頻信號濾波後,得到已載資料中頻調變信號。 本發明另推出一種快速頻率合成及調制之方法,包括 下列步驟:首先提供一個高穩定度的精準參考頻率信號; 再根據一個輸入資料信號以及前面提到的精準參考頻率信 號,調變並振盪出一個中間已載資料調變信號;然後提供 一個跳頻參考頻率信號以及一項預調偏壓資料;並根據前 面所提之預調偏壓資料,提供一個先置偏壓;最後根據中 間已載資料調變信號以及跳頻參考頻率信號,振盪出一個 輸出調變信號,其中,依照預調偏壓資料,快速振盪出前 面提到的輸出調變信號。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 實施方式 ·· 本發明提出一種快速頻率合成及調制之裝置及方法。 第1圖繪示依照本發明一較佳實施例的一種快速頻率合成 及調制之裝置的方塊示意圖,其中包括有第一鎖相迴路 1200以及第二鎖相迴路1300。第2圖繪示第一鎖相迴路的 一較佳實施例之電路方塊示意圖。第3圖繪示第二鎖相迴 路的一較佳實施例之電路方塊示意圖。11210twf.ptd Page 8 Λ / t 1 200428785 V. Description of the invention (5) Material signal. The third frequency divider divides the output intermediate frequency data signal obtained previously to obtain a second frequency division signal. The second mixer mixes the intermediate loaded data modulation signal output from the first phase-locked loop and the second reference frequency signal to obtain a second mixed signal. The second low-pass filter filters the second frequency mixing signal mentioned above to obtain the intermediate frequency modulation signal of the loaded data. The invention also introduces a method for fast frequency synthesis and modulation, which includes the following steps: firstly providing a high-stability accurate reference frequency signal; and then modulating and oscillating according to an input data signal and the aforementioned precise reference frequency signal An intermediate loaded data modulation signal; then provide a frequency hopping reference frequency signal and a pre-adjusted bias data; and provide a pre-set bias based on the pre-adjusted bias data mentioned above; and finally according to the intermediate loaded data The data modulation signal and the frequency-hopping reference frequency signal oscillate an output modulation signal. Among them, according to the pre-adjusted bias data, the aforementioned output modulation signal is quickly oscillated. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: Embodiments The present invention proposes a fast Apparatus and method for frequency synthesis and modulation. FIG. 1 is a block diagram of a fast frequency synthesizing and modulating device according to a preferred embodiment of the present invention, which includes a first phase-locked loop 1200 and a second phase-locked loop 1300. FIG. 2 is a schematic block diagram of a circuit of a preferred embodiment of the first phase locked loop. FIG. 3 is a schematic circuit block diagram of a preferred embodiment of the second phase locked loop.

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•,同時參照第i圖與第2圖,其中,第一鎖相迴路包 括抑第一相^檢知器1 2 10、第一壓控振盪器1 2 2 0、第一除 ,器1 2 2 5及第二除頻器1 2 0 5。其連接情形為第一壓控振盪 為If 2 0電性,接至第一相位檢知器丨2丨〇 ;第一除頻器丨2 2 5 則是連接至第一相位檢知器丨2丨〇以及第一壓控振盪器 2 〇二ί ί作為根據輸入資料信號與一個精準參考頻率信 調$並,盪出一個中間已載資料調變信號。達到輸出 化號為兩穩定度及平坦的數據調制信號的其一目的。 &,同時參照第1圖與第3圖,第二鎖相迴路則是包括多 頻《k壓控振盪器1 3 2 0與鎖頻迴路。前面提到的鎖頻迴路包 括·第一相位檢知器丨3 3 〇、迴路濾波器1 3 1 5、第一混波器一 1345 、第一低通濾波器134〇、第三除頻器1325、第二低通 濾波器1 3 1 0、第二混波器丨3 〇 5、數位/類比轉換先置偏壓 電路1 3 3 5及多頻段壓控振盪器丨3 2 0。其連接情形為迴路濾 波器1 3 1 5電性連接至第二相位檢知器丨3 3 〇與多頻段壓控振 盈态1 3 2 0 ,第一混波器1 3 4 5電性連接至多頻段壓控振盈器 1 3 2 0 ;第一低通濾波器1 3 4 0電性連接至第一混波器1 3 4 5 ; 第三除頻器1 3 2 5電性連接至第二相位檢知器丨3 3 〇 ;第二低 通濾波器1 3 1 0電性連接至第二混波器丨3 〇 5。其工作為根據 一個中間已載資料調變信號與一個跳頻參考頻率信號,振 盈出一個輸出調變信號。其另一工作為根據一項預調偏壓 資料,提供一個先置偏壓給多頻段壓控振盪器丨3 2 〇。由 〇 於,第二鎖相迴路與微電腦結合達到加速跳頻速度之其一 目的外,還有頻率的調制量可進行微調且容易控制以及抑• Refer to Figures i and 2 at the same time, where the first phase-locked loop includes the first phase-suppressor detector 1 2 10, the first voltage-controlled oscillator 1 2 2 0, the first divider 1 2 2 5 and the second frequency divider 1 2 0 5. The connection situation is that the first voltage-controlled oscillation is If 2 0, which is connected to the first phase detector 丨 2 丨 〇; the first frequency divider 丨 2 2 5 is connected to the first phase detector 丨 2丨 〇 and the first voltage-controlled oscillator 202 are used to synchronize the signal with an accurate reference frequency according to the input data signal and oscillate an intermediate data modulation signal. It achieves one of the purposes of outputting the data modulation signal with two stable and flat data modulation signals. & With reference to Figures 1 and 3 at the same time, the second phase-locked loop includes a multi-frequency "k voltage controlled oscillator 1 3 2 0 and a frequency-locked loop. The aforementioned frequency-locked loop includes: a first phase detector 3 3 〇, a loop filter 1 3 1 5, a first mixer 1 345, a first low-pass filter 134 〇, and a third frequency divider 1325, second low-pass filter 1 3 1 0, second mixer 315, digital / analog conversion bias circuit 1 3 3 5 and multi-band voltage controlled oscillator 3 2 0. The connection situation is that the loop filter 1 3 1 5 is electrically connected to the second phase detector 丨 3 3 〇 and the multi-band voltage-controlled vibration state 1 3 2 0, and the first mixer 1 3 4 5 is electrically connected The multi-band voltage-controlled oscillator is 1 3 2 0; the first low-pass filter 1 3 4 0 is electrically connected to the first mixer 1 3 4 5; the third frequency divider 1 3 2 5 is electrically connected to the first The two-phase detector 3 3 0; the second low-pass filter 1 3 1 0 is electrically connected to the second mixer 3 3 5. Its work is to generate an output modulation signal based on a modulated signal in the middle of the loaded data and a frequency hopping reference frequency signal. Another work is to provide a pre-bias voltage to a multi-band voltage controlled oscillator based on a pre-biased bias data. Because of the combination of the second phase-locked loop and the microcomputer to achieve one of the purposes of accelerating the frequency hopping speed, the modulation amount of the frequency can be fine-tuned and easily controlled and suppressed.

200428785 五、發明說明(7) 制雜波的好處。 在此,首先 第一鎖相迴路的 率是由回授迴路 與回授迴路的相 明所需要的穩定 位檢知器1 2 1 0。 一除頻信 的第一參 1 1 3 Q所輸 由於具有 可以使振 振頻率範 之溫度係 的,此溫 Compensa 溫度係數 通訊技術 體振盪器 射頻類比 一方面, 頻時的時 振盪 提供給電 號 1 2 3 5 考頻率 出之信 極穩定 盪器輸 圍通常 數可高 度補償 ted C r 的振盪 裡,無 。溫度 信號的 接收器 脈產生 器最基 子裝置 討論第一鎖相迴路,請參照第2圖所繪示 一較佳實施例之電路方塊示意圖。振盪頻 的相位特性所決定,且振盪頻率的穩定度 位隨頻率的改變情形有關。為了達到本發 度要求,在第一鎖相迴路中使用了第一相 其作用為比較第一參考頻率信號1 2 3 0及第 的相位後,輸出第一壓控信號1 2 4 0。前述 信號1 2 3 0是由一個溫度補償晶體振盪器 號經第二除頻器1 2 0 5除頻而成。石英晶體 的共振特性與非常高的選擇性(Q值),1 出非常精確且穩定的頻率。可用的晶體共 來說在數kHz至數百MHz之間,且共振頻率 達1或2 p p m / °C。為求達到高穩定度之目 晶體振盪器1130(Temperature ystal Oscillator,TCX0),建議使用低 器以實現高穩定度之其一目的。事實上在 論是發射器或接收器均會裝設溫度補償晶 補償晶體振盪器除了讓發射器所發射出的 頻率可以維持在可允許的範圍之内外;另 亦可利用溫度補償晶體振盪器用來作為解 依據。 本的作用是,輸出各種形式的信號波形, 使用。第一壓控振盪器1 2 2 0接受第一相位200428785 V. Description of the invention (7) Benefits of noise control. Here, the rate of the first phase-locked loop is firstly determined by the feedback loop and the feedback loop's required stability bit detector 1 2 1 0. The first parameter 1 1 3 Q divided by the frequency signal has a temperature system that can make the vibration frequency range. This temperature Compensa temperature coefficient communication technology body oscillator radio frequency analogy. On the one hand, the frequency oscillation is provided to the electric number 1. 2 3 5 The frequency of the most stable oscillator is usually highly compensated for the oscillation of ted C r, and none. The most basic device for the receiver of the temperature signal and the pulse generator. To discuss the first phase-locked loop, please refer to Figure 2 for a schematic block diagram of a preferred embodiment. The phase characteristics of the oscillation frequency are determined, and the stability of the oscillation frequency is related to the change of frequency. In order to achieve the requirements of the present invention, the first phase is used in the first phase-locked loop. Its function is to compare the first reference frequency signal 1 2 3 0 and the first phase, and then output the first voltage control signal 1 2 4 0. The aforementioned signal 1 2 3 0 is obtained by dividing a temperature-compensated crystal oscillator number by a second frequency divider 1 2 0 5. The resonance characteristics and very high selectivity (Q value) of quartz crystals give a very accurate and stable frequency. Available crystals range from several kHz to hundreds of MHz and have resonance frequencies of 1 or 2 p p m / ° C. In order to achieve the high stability of the crystal oscillator 1130 (Temperature ystal Oscillator, TCX0), it is recommended to use a lower device to achieve one of the purposes of high stability. In fact, both the transmitter and the receiver will be equipped with a temperature-compensated crystal-compensated crystal oscillator. In addition to keeping the frequency emitted by the transmitter within a permissible range, it can also be used with As a basis for the solution. The function of this book is to output and use various signal waveforms. The first voltage controlled oscillator 1 2 2 0 accepts the first phase

11210twf.ptd 第11頁 200428785 五、發明說明(8) 檢知器1 2 1 0所輸出之第一壓控信號1 2 4 0與輸入資料信號進 行振盪並調變出一中間以載資料之調變信號輸出至第二鎖 相迴路。第一除頻器1 2 2 5則是負責將中間以載資料之調變 信號除頻後,輸出第一除頻信號1 2 3 5至第一相位檢知器 1 2 1 0 。第二除頻器1 2 0 5則是接受一個除頻資料所控制,將 溫度補償晶體振盪器1 1 3 0所輸出的精準參考頻率信號除 頻,得到第一參考頻率信號1 2 3 0。由於第一鎖相迴路使用 了精準度極高之參考頻率信號來進行調變動作,可決定由 第一鎖相迴路所輸出之調變信號上所傳送之資料的正確 度。 接下來,討論第二鎖相迴路,請參照第3圖所繪示第鲁 二鎖相迴路的一較佳實施例之電路方塊示意圖。其中,第 二相位檢知器1 3 3 0 ,用來比較由第二低通濾波器1 3 1 0所輸 出之已載資料的t頻調變信號與由第三除頻器1 3 2 5所輸出 之第二除頻信號1 3 6 5後,輸出一個誤差信號到迴路濾波器 1315 。濾波器具有頻率選擇(frequency selection)的 功能,也就是說能讓特定頻率範圍内的信號通過,並阻絕 掉超出頻率範圍外的信號。這樣的濾波器理想上具有兩個 頻帶。其中,一個頻帶的傳輸增益為一,也就是濾波器的 通帶 (pass-band);另一個頻帶的傳輸增益為零,也就 是濾波器的阻絕帶(s t 〇 p - b a n d )。當然,濾波器選擇性 (Q值)越高正弦波輸出的諧波成分越小,所濾出的波形 ” 越精準。在第二鎖相迴路中我們使用的迴路濾波器,由於 需要4艮高的機動性,因此採用了可變頻寬式迴路濾波器,11210twf.ptd Page 11 200428785 V. Description of the invention (8) The first voltage-controlled signal 1 2 4 0 output by the detector 1 2 1 0 oscillates with the input data signal and modulates an intermediate data-containing modulation The variable signal is output to the second phase-locked loop. The first frequency divider 1 2 2 5 is responsible for dividing the frequency-modulated signal carrying data in the middle and outputting the first frequency division signal 1 2 3 5 to the first phase detector 1 2 1 0. The second frequency divider 1 2 0 5 is controlled by a frequency division data, and divides the accurate reference frequency signal output by the temperature compensated crystal oscillator 1 1 3 0 to obtain the first reference frequency signal 1 2 3 0. Because the first phase-locked loop uses a highly accurate reference frequency signal for modulation, the accuracy of the data transmitted on the modulation signal output by the first phase-locked loop can be determined. Next, the second phase locked loop is discussed. Please refer to FIG. 3 for a schematic block diagram of a second embodiment of the second phase locked loop. The second phase detector 1 3 3 0 is used to compare the t-frequency modulation signal of the loaded data output by the second low-pass filter 1 3 1 0 with the third frequency divider 1 3 2 5 After the second frequency division signal 1 3 6 5 is output, an error signal is output to the loop filter 1315. The filter has the function of frequency selection, that is to say, it can pass signals in a specific frequency range and block signals outside the frequency range. Such a filter ideally has two frequency bands. Among them, the transmission gain of one frequency band is one, that is, the pass-band of the filter; the transmission gain of the other frequency band is zero, that is, the stop band of the filter (s t 0 p-b a n d). Of course, the higher the filter selectivity (Q value), the smaller the harmonic component of the sine wave output, and the more accurate the filtered waveform is. The loop filter we use in the second phase-locked loop requires 4 gen. Mobile, therefore using a variable frequency wide loop filter,

112101 w f. p t d 第12頁 200428785 五、發明說明(9) 用來因應各種頻率信號 接著,迴路濾波器1 3 1 5將第二相位檢知器1 3 3 0所輸出 之誤差信號經濾波後,得到第二壓控信號1 3 6 0。第一混波 器1 3 4 5則是把多頻段壓控振盪器1 3 2 0的輸出調變信號與跳 頻參考頻率信號進行混頻,進而得到第一混頻信號1 3 7 0。 其中,前面提到的跳頻參考頻率信號是由一個跳頻綜頻器 接受一個控制頻率資料的控制指令後所輸出的信號。前面 得到的第一混頻信號1 3 7 0輸入第一低通濾波器1 3 4 0 ,經濾 波器濾波後獲得一輸出中頻信號,此中頻信號在經由第三 除頻器1 3 2 5除頻後,得到前述之第二除頻信號1 3 6 5輸入第 二相位檢知器1 3 3 0。第二混波器1 3 0 5,將第一鎖相迴路所 輸出之中間以載資料調變信號與第二參考頻率信號1 1 3 5混 頻處理,得到一第二混頻信號1 3 5 5。此第二混頻信號1 3 5 5 輸入第二低通濾、波器1 3 1 0,經此濾、波器濾、波後,得到前面 提到的已載資料的中頻調變信號,輸入第二相位檢知器 1 3 3 0 ,進行比較相位的動作。 另外,第二鎖相迴路中還包括了一個數位/類比轉換 先置偏壓電路1 3 3 5,依照預調偏壓資料,提供一個先置偏 壓給多頻段壓控振盪器1 3 2 0。藉以快速振盪出輸出調變信 號。由於第二鎖相迴路與微電腦結合,可以預先進行整個 工作頻率之控制電壓調整,將所得電壓預先儲存於主控版 中。當跳頻功能啟動時,主控板會依據工作頻率的大小來 提供所需之預置電壓,達到加速鎖頻速度之其一目的。在 這裡,多頻段壓控振盪器1 3 2 0是當做輸出壓控振盪器來使112101 w f. Ptd Page 12 200428785 V. Description of the invention (9) It is used to respond to various frequency signals. Then, the loop filter 1 3 1 5 filters the error signal output by the second phase detector 1 3 3 0 To obtain the second voltage control signal 1 3 6 0. The first mixer 1 3 4 5 mixes the output modulation signal of the multi-band voltage controlled oscillator 1 3 2 0 with the frequency hopping reference frequency signal to obtain a first mixed signal 1 3 7 0. Among them, the frequency hopping reference frequency signal mentioned above is a signal output by a frequency hopping synthesizer after receiving a control instruction for controlling frequency data. The first mixed frequency signal 1 3 7 0 obtained earlier is input to the first low-pass filter 1 3 4 0, and an output intermediate frequency signal is obtained after filtering by the filter. This intermediate frequency signal passes through the third frequency divider 1 3 2 After frequency division, the second frequency division signal 1 3 6 5 is obtained and input to the second phase detector 1 3 3 0. The second mixer 1 3 0 5 mixes the modulated data-carrying signal output from the first phase-locked loop with the second reference frequency signal 1 1 3 5 to obtain a second mixed signal 1 3 5 5. This second frequency mixing signal 1 3 5 5 is input to a second low-pass filter and a wave filter 1 3 1 0. After this filtering, wave filter and wave, an intermediate frequency modulation signal with the previously mentioned data is obtained. The second phase detector 1 3 3 0 is input to perform a phase comparison operation. In addition, the second phase-locked loop also includes a digital / analog conversion pre-bias circuit 1 3 3 5. According to the pre-bias data, a pre-bias is provided to the multi-band voltage-controlled oscillator 1 3 2 0. Thereby, the output modulation signal is rapidly oscillated. Due to the combination of the second phase-locked loop and the microcomputer, the control voltage of the entire operating frequency can be adjusted in advance, and the obtained voltage can be stored in the main control board in advance. When the frequency hopping function is activated, the main control board will provide the required preset voltage according to the size of the operating frequency to achieve one of the purposes of accelerating the frequency lock speed. Here, the multi-band voltage controlled oscillator 1 3 2 0 is used as the output voltage controlled oscillator to make

11210twf.ptd 第13頁 200428785 五、發明說明(ίο) 用。 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可作些許之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者為準。11210twf.ptd Page 13 200428785 V. Description of the Invention (ίο). Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some changes and retouch without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

112101 w f. p t d 第14頁 200428785 圖式簡單說明 第1圖是繪示快速頻率合成及調制裝置之方塊示意 圖; 第2圖是繪示第一鎖相迴路的一較佳實施例之電路方 塊不意圖,以及 第3圖是繪示第二鎖相迴路的一較佳實施例之電路方 塊示意圖。 圖式標記說明: 1 1 1 0 :控制信號解碼器 1 1 2 0 :缓衝放大器 1 1 2 5 :倍頻調諧器 1 1 3 0 :溫度補償晶體振盪器 鬱 1 1 3 5 :第二參考頻率信號 1 1 4 0 :跳頻綜頻器 1 1 4 5 :發射模組 1 2 0 0 ··第一鎖相迴路 1 2 0 5 :第二除頻器 1 2 1 0 :第一相位檢知器 1 2 2 0 :第一壓控振盪器 1 2 2 5 :第一除頻器 1 2 3 0 :第一參考頻率信號 1 2 35 :第一除頻信號 1 2 4 0 ··第一壓控信號 1 3 0 0 :第二鎖相迴路 1 3 0 5 :第二混波器112101 w f. Ptd Page 14 200428785 Brief description of the diagram The first diagram is a block diagram showing a fast frequency synthesis and modulation device; the second diagram is a circuit block diagram showing a preferred embodiment of the first phase-locked loop Intent, and FIG. 3 is a schematic circuit block diagram showing a preferred embodiment of the second phase locked loop. Description of graphical symbols: 1 1 1 0: control signal decoder 1 1 2 0: buffer amplifier 1 1 2 5: frequency doubling tuner 1 1 3 0: temperature compensated crystal oscillator Yu 1 1 3 5: second reference Frequency signal 1 1 4 0: Frequency hopping synthesizer 1 1 4 5: Transmitter module 1 2 0 0 · First phase locked loop 1 2 0 5: Second frequency divider 1 2 1 0: First phase detection Detector 1 2 2 0: first voltage controlled oscillator 1 2 2 5: first frequency divider 1 2 3 0: first reference frequency signal 1 2 35: first frequency division signal 1 2 4 0 Voltage control signal 1 3 0 0: Second phase locked loop 1 3 0 5: Second mixer

11210twf.ptd 第15頁 200428785 圖式簡單說明 13 10 第 二 低 通 濾 波 器 13 15 迴 路 滤 波 器 13 20 多 頻 段 壓 控 振 盪 器 1325 第 二 除 頻 器 13 30 第 二 相 位 檢 知 器 1335 數 位 / 類 比 轉 換 先置偏壓電路 1340 第 一 低 通 濾、 波 器 1345 第 一 混 波 器 13 55 第 二 混 頻 信 號 1365 第 二 除 頻 信 號 13 60 第 二 壓 控 信 號 1370 第 一 混 頻 信 號11210twf.ptd Page 15 200428785 Brief description of the diagram 13 10 Second low-pass filter 13 15 Loop filter 13 20 Multi-band voltage controlled oscillator 1325 Second frequency divider 13 30 Second phase detector 1335 Digital / analog Conversion pre-bias circuit 1340 first low-pass filter, wave filter 1345 first mixer 13 55 second frequency mixing signal 1365 second frequency dividing signal 13 60 second voltage control signal 1370 first frequency mixing signal

11210twf.ptd 第16頁11210twf.ptd Page 16

Claims (1)

200428785 六、申請專利範圍 1 . 一種快速頻率合成及調制裝置,包括·· 一第一鎖相迴路,用以依據一輸入資料信號以及一精 準參考頻率信號,來調變並振盪出一中間已載資料調變信 號;以及 一第二鎖相迴路,耦接至該第一鎖相迴路,用以依據 該中間已載資料調變信號以及一跳頻參考頻率信號,來振 盪出一輸出調變信號,其中該第二鎖相迴路包括一輸出壓 控振盪器,該第二鎖相迴路依據一預調偏壓資料,供給一 先置偏壓給該輸出壓控振盪器,以快速振盪出該輸出調變 信號。 2 .如申請專利範圍第1項所述之快速頻率合成及調制4 裝置,其中該第一鎖相迴路,包括: 一第一相位檢知器,用以比較一第一參考頻率信號以 及一第一除頻信號,並輸出一第一壓控信號,其中該第一 參考頻率信號係根據該精準參考頻率信號而獲得; 一第一壓控振盪器,耦接至該第一相位檢知器,用以 依據該第一壓控信號以及該輸入資料信號,振盪且調變出 該中間已載資料調變信號;以及 一第一除頻器,耦接至該第一相位檢知器以及該第一 壓控振盪器,用以將該中間已載資料調變信號除頻,以得 到該第一除頻信號。 3 ·如申請專利範圍第2項所述之快速頻率合成及調制看, 裝置,其中該第一鎖相迴路,更包括一第二除頻器,用以 接受一除頻資料之控制,將該精準參考頻率信號除頻,以200428785 6. Scope of patent application 1. A fast frequency synthesizing and modulation device, including a first phase locked loop for modulating and oscillating an intermediate load based on an input data signal and an accurate reference frequency signal Data modulation signal; and a second phase-locked loop, coupled to the first phase-locked loop, for oscillating an output modulation signal based on the intermediate data modulation signal and a frequency hopping reference frequency signal Wherein, the second phase-locked loop includes an output voltage-controlled oscillator, and the second phase-locked loop supplies a pre-biased voltage to the output voltage-controlled oscillator according to a pre-adjusted bias voltage data to rapidly oscillate the output. Modulation signal. 2. The fast frequency synthesizing and modulating 4 device as described in item 1 of the scope of patent application, wherein the first phase-locked loop includes: a first phase detector for comparing a first reference frequency signal and a first A frequency division signal and outputting a first voltage control signal, wherein the first reference frequency signal is obtained according to the precise reference frequency signal; a first voltage control oscillator coupled to the first phase detector, Configured to oscillate and modulate the intermediate loaded data modulation signal according to the first voltage control signal and the input data signal; and a first frequency divider coupled to the first phase detector and the first A voltage-controlled oscillator is used to divide the frequency of the intermediate data modulation signal to obtain the first frequency division signal. 3 · The device for fast frequency synthesis and modulation as described in item 2 of the scope of patent application, wherein the first phase locked loop further includes a second frequency divider for receiving control of a frequency division data, Divide the precise reference frequency signal to 11210twf.ptd 第17頁 200428785 六、申請專利範圍 得到該第一參考頻率信號。 4 .如申請專利範圍第2項所述之快速頻率合成及調制 裝置,其中該第一壓控振盪器係為一壓控石英振盪器。 5 .如申請專利範圍第1項所述之快速頻率合成及調制 裝置,其中該輸出壓控振盪器依據一第二壓控信號以及該 先置偏壓,來快速振盪出該輸出調變信號,而該第二鎖相 迴路更包括: 一第二相位檢知器,用以比較一已載資料中頻調變信 號以及一第二除頻信號,並輸出一誤差信號,其中該已載 資料中頻調變信號係依據該中間已載資料調變信號而獲 得; 一迴路濾波器,耦接至該第二相位檢知器以及該輸出 壓控振盪器,用以將該誤差信號濾波,以獲得該第二壓控 信號; 一第一混波器,耦接至該輸出壓控振盪器,用以將該 輸出調變信號與該跳頻參考頻率信號混頻,而獲得一第一 混頻信號; 一第一低通濾波器,耦接至該第一混波器,用以將該 第一混頻信號濾波,以獲得一輸出中頻資料信號;以及 一第三除頻器,耦接至該第二相位檢知器以及該第一 低通濾波器,用以將該輸出中頻資料信號除頻,以得到該 第二除頻信號。 6 .如申請專利範圍第5項所述之快速頻率合成及調制 裝置,其中該第二鎖相迴路更包括:11210twf.ptd Page 17 200428785 6. Scope of patent application The first reference frequency signal is obtained. 4. The fast frequency synthesizing and modulating device according to item 2 of the scope of patent application, wherein the first voltage controlled oscillator is a voltage controlled quartz oscillator. 5. The fast frequency synthesizing and modulating device according to item 1 of the scope of patent application, wherein the output voltage controlled oscillator quickly oscillates the output modulation signal according to a second voltage control signal and the pre-set bias voltage, The second phase locked loop further includes: a second phase detector for comparing an intermediate frequency modulation signal of a loaded data with a second frequency division signal, and outputting an error signal, wherein the loaded data is The frequency modulation signal is obtained according to the intermediate data modulation signal; a loop filter is coupled to the second phase detector and the output voltage-controlled oscillator to filter the error signal to obtain The second voltage-controlled signal; a first mixer coupled to the output voltage-controlled oscillator for mixing the output modulation signal with the frequency-hopping reference frequency signal to obtain a first frequency-mixed signal A first low-pass filter coupled to the first mixer for filtering the first frequency mixing signal to obtain an output intermediate frequency data signal; and a third frequency divider coupled to The second phase detector and the first A low-pass filter is used to divide the output intermediate frequency data signal to obtain the second divided frequency signal. 6. The fast frequency synthesizing and modulating device as described in item 5 of the scope of patent application, wherein the second phase locked loop further comprises: 11210twf.ptd 第18頁 200428785 六、申請專利範圍 一第二混波器,用以將該中間已載資料調變信號與一 第二參考頻率信號混頻,以獲得一第二混頻信號;以及 一第二低通濾波器,耦接至該第二混波器,用以將該 第二混頻信號濾波,以獲得該已載資料中頻調變信號。 7 .如申請專利範圍第6項所述之快速頻率合成及調制 裝置,更包括一倍頻調諧器,用以將該精準參考頻率信號 倍頻,以獲得該第二參考頻率信號。 8 .如申請專利範圍第7項所述之快速頻率合成及調制 裝置,更包括一緩衝放大器,其輸入端接至該精準參考頻 率信號,其輸出端接至該倍頻調諧器。 9 .如申請專利範圍第5項所述之快速頻率合成及調制_ 裝置,其中該第二鎖相迴路更包括一數位類比轉換先置偏 壓電路,用以根據該預調偏壓資料,供給該先置偏壓給該 輸出壓控振盪器。 1 0 .如申請專利範圍第5項所述之快速頻率合成及調制 裝置,其中該迴路濾波器係為一可變頻寬式迴路濾波器。 1 1 .如申請專利範圍第5項所述之快速頻率合成及調制 裝置,其中該輸出壓控振盪器係為一多頻段壓控振盪器。 1 2 .如申請專利範圍第1項所述之快速頻率合成及調制 裝置,其耦接至一跳頻綜頻器,該跳頻綜頻器接受一控制 頻率資料之控制,而輸出不同頻率的該跳頻參考頻率信 號。 1 3 .如申請專利範圍第1項所述之快速頻率合成及調制 裝置,更包括一高穩定度振盪器,用以提供該精準參考頻11210twf.ptd Page 18 200428785 6. Patent application scope-a second mixer for mixing the intermediate data modulation signal with a second reference frequency signal to obtain a second mixed signal; and A second low-pass filter is coupled to the second mixer to filter the second mixed signal to obtain the IF modulated signal of the loaded data. 7. The fast frequency synthesizing and modulating device as described in item 6 of the scope of patent application, further comprising a frequency doubling tuner for doubling the precise reference frequency signal to obtain the second reference frequency signal. 8. The fast frequency synthesizing and modulating device as described in item 7 of the scope of patent application, further comprising a buffer amplifier whose input terminal is connected to the precise reference frequency signal and its output terminal is connected to the frequency doubling tuner. 9. The fast frequency synthesizing and modulating device according to item 5 of the scope of patent application, wherein the second phase-locked loop further includes a digital analog conversion pre-bias circuit for using the pre-bias bias data, The pre-bias is supplied to the output voltage controlled oscillator. 10. The fast frequency synthesizing and modulating device according to item 5 of the scope of patent application, wherein the loop filter is a variable frequency wide loop filter. 11. The fast frequency synthesizing and modulating device as described in item 5 of the scope of patent application, wherein the output voltage controlled oscillator is a multi-band voltage controlled oscillator. 1 2. The fast frequency synthesizing and modulating device as described in item 1 of the scope of patent application, which is coupled to a frequency hopping synthesizer, which is controlled by a control frequency data and outputs different frequency The frequency hopping reference frequency signal. 1 3. The fast frequency synthesizing and modulating device as described in item 1 of the scope of patent application, further comprising a high-stability oscillator to provide the accurate reference frequency 11210twf.p t d 第19頁 200428785 六、申請專利範圍 率信號。 1 4 .如申請專利範圍第1 3項所述之快速頻率合成及調 制裝置,其中該高穩定度振盪器係為一溫度補償晶體振盪 器。 1 5 . —種快速頻率合成及調制之方法,包括下列步 驟: 提供高穩定度之一精準參考頻率信號; 依據一輸入資料信號以及該精準參考頻率信號,來調 變並振盪出一中間已載資料調變信號; 提供一跳頻參考頻率信號以及一預調偏壓資料; 依據一預調偏壓資料,以供給一先置偏壓;以及 依據該中間已載資料調變信號以及該跳頻參考頻率信 號,來振盪出一輸出調變信號,其中並係依據該先置偏 壓,以快速振盪出該輸出調變信號。 1 6 .如申請專利範圍第1 5項所述之方法,其中調變並 振盪出該中間已載資料調變信號之步驟,包括下列步驟: 根據該精準參考頻率信號,以獲得一第一參考頻率信 號; 將該中間已載資料調變信號除頻,以得到一第一除頻 信號; 偵測比較該第一參考頻率信號以及該第一除頻信號, 以輸出一第一壓控信號;以及 依據該第一壓控信號以及該輸入資料信號,振盪且調 變出該中間已載資料調變信號。11210twf.p t d page 19 200428785 VI. Patent application rate signal. 14. The fast frequency synthesizing and modulating device according to item 13 of the scope of patent application, wherein the high-stability oscillator is a temperature-compensated crystal oscillator. 1 5. — A method for fast frequency synthesis and modulation, including the following steps: providing one of the accurate reference frequency signals with high stability; modulating and oscillating an intermediate load based on an input data signal and the accurate reference frequency signal Data modulation signal; providing a frequency-hopping reference frequency signal and a pre-biased bias data; providing a pre-bias voltage based on a pre-biased bias data; and a modulation signal and the frequency hopping based on the intermediate loaded data An output modulation signal is oscillated with reference to the frequency signal, and the output modulation signal is quickly oscillated according to the pre-set bias voltage. 16. The method as described in item 15 of the scope of patent application, wherein the step of modulating and oscillating the intermediate data modulation signal includes the following steps: obtaining a first reference according to the precise reference frequency signal Frequency signal; frequency dividing the intermediate data modulation signal to obtain a first frequency division signal; detecting and comparing the first reference frequency signal and the first frequency division signal to output a first voltage control signal; And according to the first voltage control signal and the input data signal, oscillate and modulate the intermediate loaded data modulation signal. 11210twf.ptd 第20頁 200428785 六、申請專利範圍 1 7 ·如申請專利範圍第1 6項所述之方法,其中獲得該 第一參考頻率信號之步驟係為將該精準參考頻率信號除 頻,以得到該第一參考頻率信號。 1 8,如申請專利範圍第1 5項所述之方法,其中振盪出 該輸出調變信號之步驟,包括下列步驟: 將該輸出調變信號與該跳頻參考頻率信號混頻,而獲 得一第一混頻信號; 將該第一混頻信號濾波,以獲得一輸出中頻資料信 號; 將該輸出中頻資料信號除頻,以得到一第二除頻信 號。 依據該中間已載資料調變信號,以獲得一已載資料中 頻調變信號; 偵測比較該已載資料中頻調變信號以及該第二除頻信 號,並輸出一誤差信號; 將該誤差信號濾波,以獲得一第二壓控信號;以及 依據該第二壓控信號以及該先置偏壓,來快速振盪出 該輸出調變信號; 1 9 .如申請專利範圍第1 8項所述之方法,其中獲得該 已載資料中頻調變信號之步驟,包括下列步驟: 將該中間已載資料調變信號與一第二參考頻率信號混 頻,以獲得一第二混頻信號;以及 將該第二混頻信號濾波,以獲得該已載資料中頻調變 信號。11210twf.ptd Page 20 200428785 VI. Patent application scope 17 • The method described in item 16 of the patent application scope, wherein the step of obtaining the first reference frequency signal is to divide the precise reference frequency signal by The first reference frequency signal is obtained. 18. The method as described in item 15 of the scope of patent application, wherein the step of oscillating the output modulation signal includes the following steps: mixing the output modulation signal with the frequency hopping reference frequency signal to obtain a A first mixed frequency signal; filtering the first mixed frequency signal to obtain an output intermediate frequency data signal; and dividing the output intermediate frequency data signal to obtain a second divided frequency signal. Modulate the intermediate frequency modulated signal according to the intermediate loaded data to obtain an intermediate frequency modulated signal of the loaded data; detect and compare the intermediate frequency modulated signal of the loaded data and the second frequency division signal, and output an error signal; The error signal is filtered to obtain a second voltage control signal; and the output modulation signal is quickly oscillated according to the second voltage control signal and the pre-set bias voltage; The method described above, wherein the step of obtaining the frequency modulated signal of the loaded data comprises the following steps: mixing the intermediate loaded data modulated signal with a second reference frequency signal to obtain a second mixed signal; And filtering the second mixing signal to obtain the IF modulation signal of the loaded data. 11210twf.ptd 第21頁 20042878511210twf.ptd Page 21 200428785 112101 w f . p t ci 第22頁112101 w f. P t ci p. 22
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