TW200519963A - Multi-port memory device with stacked banks - Google Patents

Multi-port memory device with stacked banks

Info

Publication number
TW200519963A
TW200519963A TW093115983A TW93115983A TW200519963A TW 200519963 A TW200519963 A TW 200519963A TW 093115983 A TW093115983 A TW 093115983A TW 93115983 A TW93115983 A TW 93115983A TW 200519963 A TW200519963 A TW 200519963A
Authority
TW
Taiwan
Prior art keywords
data
ports
stacked
read
data line
Prior art date
Application number
TW093115983A
Other languages
Chinese (zh)
Other versions
TWI256647B (en
Inventor
Seung-Hoon Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200519963A publication Critical patent/TW200519963A/en
Application granted granted Critical
Publication of TWI256647B publication Critical patent/TWI256647B/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Memory System (AREA)

Abstract

A multi-port memory device with stacked banks is provided. The multi-port memory device includes a number of ports, and a plurality of stacked banks, two or more of which share one data line sense amplifier. Each stacked bank includes a plurality of memory cells. Data line sense amplifiers are connected respectively between the stacked banks and read buffers to sense data read from memory cells of a selected bank among the stacked banks. The read buffers are connected respectively to the ports, store memory cell data output from the data line sense amplifiers, and output the stored data to the ports. Read data lines connect the data line sense amplifiers with the read buffers, respectively. Write buffers are connected respectively to the ports, and convert and store write data received in serial through the ports in a parallel form. Write data lines connect the data line drivers with the write buffers, respectively. Accordingly, since a plurality of stacked banks can be accessed independently and can perform reading and writing operations independently, a data throughput increases and a data reading speed and data writing speed are improved.
TW093115983A 2003-06-03 2004-06-03 Multi-port memory device with stacked banks TWI256647B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020030035606A KR100546331B1 (en) 2003-06-03 2003-06-03 Multi-port memory device operates independently for each stack bank

Publications (2)

Publication Number Publication Date
TW200519963A true TW200519963A (en) 2005-06-16
TWI256647B TWI256647B (en) 2006-06-11

Family

ID=33487851

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093115983A TWI256647B (en) 2003-06-03 2004-06-03 Multi-port memory device with stacked banks

Country Status (5)

Country Link
US (1) US7120081B2 (en)
JP (1) JP2004362760A (en)
KR (1) KR100546331B1 (en)
DE (1) DE102004027882A1 (en)
TW (1) TWI256647B (en)

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US7586801B2 (en) 2005-09-29 2009-09-08 Hynix Semiconductor Inc. Multi-port semiconductor memory device
US8429319B2 (en) 2005-09-28 2013-04-23 Hynix Semiconductor Inc. Multi-port memory device with serial input/output interface

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WO2021158994A1 (en) 2020-02-07 2021-08-12 Sunrise Memory Corporation Quasi-volatile system-level memory
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US8429319B2 (en) 2005-09-28 2013-04-23 Hynix Semiconductor Inc. Multi-port memory device with serial input/output interface
US7586801B2 (en) 2005-09-29 2009-09-08 Hynix Semiconductor Inc. Multi-port semiconductor memory device

Also Published As

Publication number Publication date
KR100546331B1 (en) 2006-01-26
TWI256647B (en) 2006-06-11
JP2004362760A (en) 2004-12-24
US7120081B2 (en) 2006-10-10
US20040246807A1 (en) 2004-12-09
KR20040105007A (en) 2004-12-14
DE102004027882A1 (en) 2005-01-13

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