TW200537407A - Liquid crystal display system with lamp feedback - Google Patents

Abstract

A liquid crystal display system and CCFL power converter circuit is provided using a high-efficiency zero-voltage-switching technique that eliminates switching losses associated with the power MOSFETs. An optimal sweeping-frequency technique is used in the CCFL ignition by accounting for the parasitic capacitance in the resonant tank circuit. Additionally, the circuit is self-learning and is adapted to determine the optimum operating frequency for the circuit with a given load. An over-voltage protection circuit can also be provided to ensure that the circuit components are protected in the case of open-lamp condition.

Description

200537407 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a DC-to-AC power converter circuit. More specifically, the present invention provides a high-efficiency controller circuit that adjusts the power to a load using a zero-current multiple-switching technique. The present invention is generally applied to a circuit that drives one or more cold-cathode fluorescent lamps (CCFL), however, those skilled in the art can know that the present invention can be applied to any load that requires efficient and accurate power control. [Prior Art] FIG. 1 illustrates a conventional CCFL power system 10. The system generally includes a power source 12, a CCFL drive circuit 16, a controller 14, a feedback loop 18, and one or more CCF] L associated with the LCD panel 20. The power source 12 provides a DC voltage to the circuit 16 and is controlled by the controller through a transistor milk. The circuit 16 is a self-resonant circuit known as a Royer circuit. In essence, the circuit 16 is a self-resonant circuit. The oscillating DC-to-AC converter has a resonance frequency determined by L1 and C1, and N1sN4 specifies the transformer winding and the number of winding turns. In operation, the transistor QHaQ2 is turned on alternately and switches the input voltages on the windings N1 and N2, respectively. If Q1 is turned on, the input voltage is added to winding N1. A voltage with the corresponding polarity will be placed on the other winding. The induced voltage of N4 makes the base of Q2 positive, and qi is determined by the voltage between the collector and the emitter. A small voltage drop is turned on. The induced voltage of N4 also keeps q2 in the off state. Q1 is turned on until the magnetic flux in the TX1 core reaches saturation. When saturated, the voltage of the collector of Q1 rises rapidly (to be determined by the base circuit) 98924.doc 200537407), and the induced voltage in the transformer drops rapidly .... It is pulled away from the puppet and the evil, and vCE rises, causing the voltage on N1 to drop further. The losses in the drive cause Q! To cut off, which in turn causes the magnetic flux in the core to drop slightly U and generate a current in N4 to turn on Q2. The induced voltage of N4 keeps Q1 in a saturated conduction state until the iron is in the reverse direction The direction is saturated, and a similar reverse process occurs to complete the switching cycle. Although the inverting electrical circuit 16 is composed of relatively few components, its proper work depends on the nonlinear and complex interaction of the transistor and M | §. In addition Changes in Cl, Q1, and Q2 (typically 35% tolerance) do not allow circuit 16 to be suitable for use in parallel transformer installations, as any copy of circuit 16 will generate additional, undesired operating frequencies, which may be in some cases Spectral waves are vibrating. When applied to CCFL loads, the Yanhai circuit produces a significant, undesired "beat" effect in CCFLt. Even if the tolerances are almost met, because the circuit 16 operates in the self-enchanting mode, the "flapping" effect cannot be removed because any copy of the circuit will have its own unique operating frequency. In US Patent No. 5,43〇, You can find a postal 4b 1 # in 641,5,619,4〇2, 5,615 〇93, 5,8i8 i72 _ < ^ / / his driving system. These references are low efficiency, two levels Power conversion, change operation, and / or the disadvantages associated with the load. In addition, when the negative art is enclosed by the CCFL and the component, it will cause parasitic capacitance, which will affect the impedance of the CCFL itself. In order to be effective Ground Design-A circuit that works properly, the circuit design must take into account the parasitic resistance k used to drive the CCF load. Such efforts are not only time consuming, expensive 'and difficult to produce when dealing with different loads-optimal converter Design. Therefore, it is necessary to overcome the shortcomings of materials and provide a circuit solution. This circuit has the characteristics of high efficiency, CC_ 98924.doc 200537407 reliable lighting, load-independent power adjustment and single-frequency power conversion. [Content of the Invention] The invention provides a liquid crystal display system comprising: a liquid crystal display panel, a cold cathode fluorescent lamp for illuminating the liquid crystal display panel; a secondary transformer winding coupled to the cold cathode fluorescent lamp, the winding Providing current to a cold cathode fluorescent lamp; a primary transformer winding coupled to the secondary transformer winding, the winding providing magnetic flux to the secondary transformer winding; a switch coupled to the primary transformer winding, the switch allowing current to flow through the primary transformer winding; A feedback control loop circuit coupled to a cold cathode fluorescent lamp. The circuit receives a feedback signal that does not provide power to the cold cathode fluorescent lamp, and controls transmission only when the feedback signal is greater than a predetermined threshold. Power to a cold cathode fluorescent lamp. In an alternative embodiment, the liquid crystal display system includes: a liquid crystal display panel; a cold cathode fluorescent lamp used to illuminate the liquid crystal display panel; a light coupled to the cold cathode The secondary transformer winding of the lamp, which winding provides current to the cold cathode fluorescent lamp; a primary transformer winding coupled to the secondary transformer winding, The winding provides magnetic flux to the secondary transformer winding; a switch coupled to the primary transformer winding; the switch allows current to flow through the primary transformer winding; a feedback control loop circuit coupled to a cold cathode fluorescent lamp, which circuit receives The feedback signal of the cathode fluorescent lamp, when the feedback signal indicates an on state, reduces the power provided to the cold cathode fluorescent lamp. In another alternative embodiment, the liquid crystal display system includes a- Liquid crystal display panel; a cold cathode fluorescent lamp used to illuminate the liquid crystal display panel; a coupling 98924.doc 200537407

To the secondary transformer winding of the cold-cathode fluorescent lamp, which winding supplies current to the cold-cathode camping lamp; a primary transformer winding coupled to the secondary transformer winding, which winding provides magnetic flux to the secondary transformer winding; A first switch of an alternating voltage winding, the switch allows current to flow through the primary transformer winding in a first direction; a second switch coupled to the primary transformer winding, the switch allows current to flow through the primary transformer in a second direction A winding; a third switch coupled to the primary transformer winding and the first switch; when there is an overlap between the third switch and the first switch, the first switch provides current to the primary transformer winding; and a cold cathode fluorescent Light lamp feedback control loop circuit, the circuit receives a feedback signal from the cold cathode fluorescent lamp, and keeps the cold cathode fluorescent lamp at a predetermined level by maintaining a minimum weight between the third switch and the first switch. Minimum power. The invention also provides a method for controlling the power provided to a cold cathode fluorescent lamp in a liquid crystal display system. The method includes the steps of: providing a pulse signal to a transistor as a conduction path of a primary transformer winding; The feedback signal of the cold cathode fluorescent lamp of the transformer winding, the signal meter is not in the electrical state of the cold cathode fluorescent lamp; receives the feedback signal from the cold cathode fluorescent lamp; and only when the feedback signal indicates the point of the cold cathode fluorescent lamp Lamp time 'adjusts the power provided to the cold cathode fluorescent lamp. Those skilled in the art will know that although the following specific implementations will be described with reference to preferred embodiments and methods of use, it does not mean that the present invention is limited to these preferred embodiments and methods of use. Rather, the invention has a broader scope and is limited and clarified only by the scope of the accompanying patent applications. 98924.doc 200537407 Other features and advantages of the present invention will be explained in the following specific embodiments. Referring to the drawings, the same parts are described with the same numbers. [Embodiment] Although it is not intended to be limited to examples, the following detailed description will be made with reference to a display screen having a CCFL as a load of the circuit of the present invention. However, it is obvious that the present invention is not limited to driving only one or more CCfl, and the present invention should be broadly understood as a power converter circuit and method independent of a specific load having a specific application. In summary, the present invention provides a circuit that uses a feedback signal and a pulse signal to controllably transmit power to a load to adjust the conduction time of two pairs of switches. When the-pair of switches are controllably turned on so that their on-times overlap, power will be transferred to the load through a transformer along the conduction path defined by the pair of switches. Similarly, when another pair of switches is controllably turned on so that their on-times overlap, power is transferred to the load through the transformer along the conduction path defined by the other pair of switches. Therefore, the present invention can accurately control the power delivered to a given load by selectively turning on the overlap between the control switch and the control switch. In addition, the present invention includes an over-current and over-voltage protection circuit that suspends the power to the load in the case of a short circuit or an open circuit, and 'the controllable switching topology described herein makes the circuit independent of the load, and Operate at a single operating frequency independent of the spectral vibration effect of the transformer configuration. These characteristics are discussed below with reference to the drawings. , Full bridge, zero voltage cut 2 The circuit shown in Figure 2 contains the circuit diagram shown in Figure 2 showing a preferred embodiment of the phase-shifting power converter of the present invention. In essence, Figure 98924.doc -10- 200537407 a power supply 1 2; multiple switches 80, defining diagonally-arranged pairs of switches that alternately conduct paths; a drive circuit that drives each switch; a square wave pulse To the frequency sweeper 22 of the driving circuit 50;-a transformer τχ 1 (with an associated resonant tank circuit defined by the primary side of TX1 and C1) and a load. Advantageously, the present invention also includes an overlapping feedback control loop 40, which controls the on-time of at least one of each pair of switches, thereby allowing controllable power to be delivered to the load. A power source 12 is applied to the system. Initially, a bias / reference signal 30 is generated from this power supply for use in the control circuit (in the control loop 40). Preferably, a frequency sweeper 22 generates a pulse signal with a duty cycle of 50%, starts at a higher frequency, and sweeps down at a predetermined rate and predetermined steps (ie, a square wave signal with a variable pulse width) . The frequency sweeper 22 is preferably a programmable frequency generator known in the art. The pulse signal (from the frequency detector 22) 90 is transmitted to the beta driving circuit (B-Drive) (the gate of the driving switch-B, that is, the control switch-B), and is transmitted to the A-driving circuit (A —Drive), the circuit generates a complementary pulse signal 92 and a ramp signal 26. The phase difference B between the complementary pulse signal 92 and the pulse signal 90 is approximately 180 degrees, and the slope signal 26 is approximately 90 degrees from the pulse signal, as will be described below. The ramp signal 26 is preferably a sawtooth signal, as shown. The ramp signal 26 is compared with the output signal 24 (referred to herein as CMP) of the error amplifier 32 through the comparator 28, thereby generating a signal 94. The output signal 94 of the comparator 28 is also a pulse that is transmitted to the c-driving circuit (c has a 50% duty cycle to trigger the conduction of the switch-c (Switch-c), and then this signal determines the switch The heavy signal between B and switch C, and between switch A and switch D. Its complementary signal (the difference is about 180 degrees) is applied to switch-D through D-drive circuit 98924.doc 200537407 (D-Drive) The person skilled in the art can know that the circuits of the driving circuit-A to the driving circuit-d are lightly connected to the control lines (eg, gates) of the switches-a to the switch-D, as described herein, allowing each switch to Control ground is turned on. The lamp current adjustment is done by adjusting the amount of overlap between switches B, c and A, D. In other words, the amount of overlap in the on state of the switch pair determines the amount of power processed in the converter. Therefore, Switch B and switch c, and switch A and switch D are referred to herein as overlapping switches. Although it is not intended to be limited by the examples in this embodiment, B drive circuit _ preferably by a totem pole circuit, ordinary low impedance operation Amplifier circuit, or emitter followed by electricity The C-driving circuit has a similar structure. Since the A_ driving circuit and the D-driving circuit are not directly grounded (ie, floating), these driving circuits are preferably composed of a boot circuit (b〇t-str 邛 circuit) Or other high-side driving circuits known in the art. In addition, as described above, the A-driving circuit and the C-driving circuit include an inverter, which is used to invert from B respectively. A driving circuit and D-signal (ie, phase) of the driving circuit. A zero-voltage switching technology is used to achieve high-efficiency operation. Four MOSFETs (switch A to switch D) 80 are in their intrinsic diodes (DlsD4) Turns on after turning on, which provides a current path for energy in the transformer / capacitor (TX1 / C1) configuration, thereby ensuring that when these switches are turned on, the voltage on them is zero. Due to this controllable operation, switching losses It is minimized and maintains high efficiency. The preferred switching operation of the overlapping switch 8G is shown with reference to the timing diagram in the figure. Switch-C is turned off within a certain period of time when switches B and C are turned on at the same time. 200 537407 is turned on (Figure 2f). When switch one c is turned off, the current in the slot (see Figure 2) is now flowing through diode D4 in switch one D (Figure 2e), the primary side of the transformer, c 1, And switch—B 'thus resonates the voltage and current in capacitor c 1 and the transformer as a result of energy transfer when switch B and switch C are on (Figure 2f). Note that this condition must occur' because the current direction on the primary side of the transformer The sudden change of the switch will violate Faraday's law. Therefore, when switch-C is turned off, current must flow through D4. After D4 is turned on, switch-D is turned on. Similarly, switch-B is turned off (Figure 2a), and switch- Before A breaks, the current is transmitted to the diode di (Turu 2e) associated with switch-A. Similarly, the switch D is opened (Fig. 2d), and the current from switch-a now passes through cn, the transformer primary side and the diode D3. Switch-c is turned on after O3 is turned on (Figure 2e). The switch b is turned on after the switch a is turned off, which allows the diode ⑴ to be turned on before the switch b is turned on. Note that the overlap of the on-times of the switches B, c and A, D, which are diagonal, determines the energy delivered to the transformer, as shown in Figure Ding. In this embodiment, FIG. 2b shows that the ramp signal 26 is generated only when the switch_A is turned on. Therefore, the driving circuit _b for generating the ramp signal 26 preferably includes a constant current generator circuit (not shown), which includes a capacitor having an appropriate time constant for generating the ramp signal. For this purpose, a reference current (not shown) is used to charge the capacitor, and the capacitor is grounded (via, for example, a transistor switch) so that the discharge rate exceeds the charge rate, thereby generating a sloping tooth signal 26. Of course, as described above, this can be achieved by integrating the pulse signal 90, so an integrator circuit (for example, an operational amplifier and a capacitor) can be used to form the ramp signal 26. During the lighting process, a predetermined minimum overlap is created between two diagonal switches (ie, between switches A, 98924.doc -13- 200537407 D and B, C). This results in a small amount of energy from the input to the slot circuit including C1, transformer, C2, C3 and CCFm. Note that the load may be resistive and / or capacitive. The driving frequency starts at a predetermined higher frequency until it approaches the resonant frequency of the slot circuit and the equivalent circuit reflected by the transformer secondary-stage side, and a large amount of energy is transferred to the load connected to the CCFL. Due to its high-impedance characteristics before lighting, the ccfl text comes from the influence of the high electrical power supplied to the primary side energy. This voltage is sufficient to light the CCFL. The CCFL impedance τ drops to its normal operating value (for example, 10 ohms to Π0 ohms), and the energy provided to the primary side based on the minimum overlap operation is no longer sufficient to maintain the CCFL's steady-state operation. The output of the error amplifier 开 starts its adjustment function to increase this overlap. It is the size of the error amplifier output that determines the amount of overlap. For example: Referring to FIG. 2b, 2c and the feedback loop 4 of FIG. 2, it is important to note that when the comparator 28 determines that the ramp signal 26 (generated by the driving circuit A) and the signal CMP24 (* 5 generated by the Wu difference amplifier 32) The value of) is equal to Risi, and switch-c is turned on. This is shown by intersection 36 in Figure 2b. To prevent a short circuit, switches A and * D must not be turned on at the same time. By controlling the size of CP, the overlap time between switches A, D and B, C regulates the energy delivered to the transformer. In order to adjust the energy delivered to the transformer (and thus the energy delivered to the CCFL load), the output of the error amplifier CMP24 is controlled to switch. And 0 is related to switches A and B to perform a guard. It can be seen from the timing diagram that if the output from the comparator enters the driving pulses of switches C and D and is shifted to the right by increasing the size of ⑽, then the overlap between switches A and D and B # 〇c will be increased, thus making the transmission旎 1 to 夂 pressure state increases. In fact, this corresponds to higher lamp current operation 98924.doc -14- 200537407 (hlgheiMamp current operatlon). Conversely, shifting the drive pulse of the switch to the left (reducing the CMP signal) will reduce the energy delivered. For this purpose, the error amplifier 32 compares the feedback signal fb with a reference voltage REF. FB measures the value of the current through the sense resistor, which represents the total current through the load 20. REF is a signal indicating an ideal load condition, such as the expected current through the load. In normal operation, rEF = Fb. However, if the load condition is intentionally compensated, for example by a dimmer switch associated with an LCD flat panel display, the value of REF will increase / decrease accordingly. This comparison value generates CMP accordingly. The value of CMP reflects the load status and / or an intentional bias voltage and is achieved by the difference between REF and FB (ie, REG-FB). In order to protect the load and the circuit from being open at the load end (for example, the CCFL is turned on under normal operation), the FB signal is preferably in a current detection comparator 42 with a reference value (not shown and different from the above REF signal). In comparison, its output defines the state of the switch 38 as described below. This reference value can be programmable and / or user-definable and preferably reflects the minimum or maximum current allowed by the system (for example, it can be rated for individual components, especially for CCFL loads) . If the values of the feedback signal and the reference signal are within the allowed range (normal operation), the output of the current detection comparator is 丨 (or high). This allows the CMP to flow through the switch 38, and the circuit operates as described to transfer power to the load. However, if the values of the FB signal and the reference signal are outside the predetermined range (open or short-circuited state, the output of the current detection comparator is at or low) '' Prohibit CMP # from flowing through the switch 38. (Of course, a reverse process can be implemented in which the switch is triggered in a low state). Until the current detection comparator indicates that a current is allowed to flow through Rs, the minimum voltage is supplied by the switch 38 (not shown) and is transferred to the comparator 28 by 98924.doc • 15-200537407. Accordingly, the switch 38 includes a function for appropriately selecting the programmable voltage Vmin when the detection current is 0. Referring to Figure 2b again, the effect of this work is that the CMP DC value drops to the rated or minimum value (that is, cM = Vmin), so that the transformer τχι does not appear in a high voltage state. Therefore, the cross point 36 is shifted to the left 'thereby reducing the amount of overlap between the complementary switches (the switch-C is turned on at the cross point 36). Similarly, when the detection value is 0 (or another pre-delta value indicating an open circuit state), the current detection comparator 42 is connected to the frequency generator 22 to turn the generator 22 off. CMP is fed back to the protection circuit 60. If CCFL is removed during operation (open circuit state), this is to turn off frequency sweeper 22. In order to ensure that the circuit is not in an overvoltage state, this embodiment preferably includes a protection circuit 60, the operation of which will be given as follows (the description of the overcurrent protection through the current detection comparator 42 is as described above). The circuit 60 includes a protection comparator 62 which compares the signal CMP with a voltage signal 66 derived from the load 20. Preferably, the voltage signal is derived from the voltage-dividing capacitors C2 and C3 shown in Figure 2 (outside the ear with the load 20). In the light-on state (0pen_lamp condition), the frequency sweeper continues to sweep until the OVP signal 66 reaches a threshold. 〇Vp signal 66 is taken from the output knife voltage capacitors C2 and C3 to detect the voltage output from transformer TX1. To simplify the analysis, these capacitors also represent the total capacitance of the equivalent load capacitance. The threshold is a reference value, and the circuit is designed so that the voltage on the secondary side of the transformer is greater than the minimum lighting voltage (such as the voltage required by the LCD display) and less than the rated voltage of the transformer. When the OVP exceeds the threshold, the scanner stops scanning. At the same time, the current detection comparator 42 cannot detect a signal on the detection resistor Rs. Therefore, by setting the signal at the output 24 of the switch block 38 to the minimum value, the overlap between the switches A and D, B and C is minimized. Preferably, once OVp 98924.doc -16- 200537407 exceeds the threshold value, the time-sequencer 64 starts to work, thus starting the-temporary recording sequence. The stop cycle is best sighed according to the load requirements (such as the CCFL of the LCD display), but it can also be set to some programmable value. Once the pause has elapsed, the 'driving pulse is invalid' thereby providing a safe operating output of the converter circuit. That is, the 'circuit 60 provides a sufficient voltage to light the lamp, and if the lamp is not connected to the converter, it is turned off after a certain period of time, so that false high voltages at the output can be avoided. There must be such a period of time, as unlit is similar to the on state.

Figures 3 and 3a-3f depict another preferred embodiment of the DC / AC circuit of the present invention. In this embodiment, the circuit operates in a manner similar to that provided in FIGS. 2 and 2a_2f. However, this embodiment also includes a phase locked loop circuit (PLL) 70 for controlling the frequency sweeper 22, and A flip-flop circuit 72 which periodically inputs a signal of a c-driving circuit. It can be understood from the timing diagram that if the driving pulses of switches C and D are shifted to the right by 50% by increasing the size of CMP, the overlap between switches VIII and D, B and C can be increased, thereby increasing the energy delivered to the transformer. In practice, this corresponds to higher lamp current operation (which may require manual increase by, for example, the REF voltage as described above). Conversely, the leftward shift of the drive pulses of switches c and d (by lowering the CMP signal) reduces the energy delivered. The phase-locked loop circuit 70 maintains the phase relationship between the feedback current (via Rs) and the slot current (via TX1 / C1) under normal operation, as shown in FIG. 3. The PLL circuit 70 preferably includes input signals from the tank circuits (C1 and TX1 primary side), signals 98 and RS (FB signals described above). Once the CCFL is lit and the current in the CCFL is detected by Rs, the PLL 70 circuit is activated, which locks the phase between the lamp current and the current in the primary tank (C1 and the transformer primary side). That is, the PLL adjusts the frequency of the frequency sweeper 22 due to any parasitic changes in the mechanical configuration such as temperature 98924.doc 17 200537407 degrees. The so-called mechanical configuration, such as the wiring between the converter and the LCD panel, affects the capacitance value. And inductance value of the lamp and the metal chassis of the LCD panel. The system preferably maintains a phase difference of 180 degrees between the resonant tank circuit and the current (load current) flowing through Rs. Therefore, the system can find an optimal operating point regardless of the specific load state and / or the operating frequency of the resonant tank circuit.

The operation of the feedback loop of FIG. 3 is similar to the description of FIG. 2 above. However, as shown in FIG. 3b, in this embodiment, the trigger signal 72 is used to time the start signal output by the driving circuit. For example, in normal operation, the output of the error amplifier 32 will be fed back through the control switch block 38 (as described above), resulting in a signal 24. A certain amount of overlap between the switches A and D, B, and C is obtained through the comparator 28 and the flip-flop 72, and the flip-flop 72 drives the switches C and D (the D driving circuit generates a complementary signal of the c-driving circuit). This provides steady-state operation for the CCFL (display panel) load. Considering that the CCFL (display panel) is removed during the book work, the CMP increases to the boundary value (rail 〇f 〇utput) of the amplifier output and triggers immediately protect the circuit. This function is disabled when lighting. Referring briefly to FIGS. 3a-3f, in this embodiment, the c-driving circuit and the D-driving circuit alternately trigger the switches c and D to act as the trigger circuit. As shown in Fig. 3b, the flip-flop is triggered every other time, thereby initializing the c-driving circuit (and, correspondingly, the D-driving circuit). In addition, the timing works as described above with reference to Figures 2a-2f. Referring now to FIGS. 4a-4f, the output current of FIG. 2 or 3 is simulated. For example, when the picture display is not at the 21V input, when the frequency sweeper is close to Nai Xi KΗζ (0.5 μs overlap), the output reaches 1.67KVp-p. If the CCFL requires 3300 Vp-p lighting, then this electricity 98924.doc -18- 200537407 is not enough to light the CCFL. When the frequency drops to 681 <: 1 ^, the minimum overlap produces about 3.9 KVp-p at the output, which is enough to light the CCFL. As shown in the figure. At this frequency, the overlap is increased to 5 μs, making the output approximately 19 KVp 邛 used to run a lamp impedance of 130 K ohms. This has been shown in the drawing edict. As another example, Figure 4d shows the operation when the input voltage is 7V. At 71 · 4, KΗζΒ ^ γ, at the lamp point, the output is 75.0 Vp-p. When the frequency decreases, the output voltage increases until the lamp lights up. Figure 4e shows that at 68.5 feet 1 ^, the output reaches 3500 Vp-p. The CCFL current is adjusted by adjusting the overlap, and supports 1K ohm impedance after lighting. The CCFL voltage is now 1.9 KVp-p for a 660 Vrms lamp. This is also shown in Figure 4f. Although not shown, the circuit simulation of FIG. 3 is performed in a similar manner. It should be noted that the differences between the first and second embodiments (that is, the addition of a susceptor and a PLL in Fig. 3) will not affect the overall work proposed in Figs. 4a-4f. However, the decision to add a PLL is to take into account the non-ideal impedance generated in the circuit 'and can be added as an alternative to the circuit shown in FIG. 2. At the same time, the addition of a trigger allows the constant current circuit described above to be removed. ^ Therefore, it is clear that a highly efficient and adaptable DC / AC converter circuit is provided that meets the objectives set forth herein. It is obvious to the professional technician that some modifications can be made. For example, although the present invention has described the use of MOSFETs as switches, those skilled in the art will know that the entire circuit can be constructed using BJT transistors, or any combination of transistors, including MOSFETs and BJTs. Other modifications are also possible. For example, the driving circuit associated with driving circuit B and driving circuit D can be composed of a common-collector circuit, because the associated transistor is grounded, so there will be no floating 98924.doc -19- 200537407 state. The PLL thunder policy described here is taken as an ordinary PLL circuit 70 known in the art, and the control signal is generated by receiving and inputting the control signal by appropriately modifying π, as described above. Pulse production peak cry 9? With & & 〇. _ Blocking time 22 is taken as a pulse-width modulation circuit (pWM) or frequency-band modulation circuit (FWM), and the clumsy soldiers hit the ground ^; both Both are well known in the profession. Similarly, the 'protection circuit 60 and the timepiece are composed of a circuit called the circuit of the circuit, and are appropriately modified to work as described above. FIG. 5 illustrates an embodiment of a liquid crystal display system according to the present invention. The liquid crystal display system is a thin film transistor display screen with a charge of 100 packs and 3 packs. The thin film transistor display is coupled to the row driver 502. The row driver 5 () 2 controls the rows on the thin film transistor display screen 501. A thin film transistor display screen 501 is also coupled to the column driver 503. The column driver 503 controls the columns on the thin film transistor display screen 501. The row driver 502 and the column driver 503 are coupled to the timing controller 504. Timing Control | § 504 controls the timing of the row driver 502 and column driver 503. A timing controller 504 is coupled to the video signal processor 505. The video signal processor 505 processes the video signal. In another embodiment, the video signal processor 505 may be a scaler device. The thin film transistor display screen 50 is illuminated by a display illumination system 599. The display lighting system 599 includes a cold cathode fluorescent lamp 562. A cold cathode fluorescent lamp 562 is coupled to the secondary metamorphic winding 560. The secondary transformer winding 560 provides current to the cold cathode fluorescent lamp 562. The secondary transformer winding 56 is coupled to the primary transformer winding 518. The primary transformer winding 518 provides a magnetic flux to the secondary transformer winding 56. The primary transformer winding 518 is coupled to a switch 532. Switch 532 allows current to flow through the primary transformer windings 5 and 8. The primary transformer windings 5 and 8 are also coupled to a switch 512. The switch 512 allows current to pass through the primary transformer winding 518. Switch 532 98924.doc -20- 200537407 and switch 5 12 are connected to the controller 55. The controller 55 provides a pulse signal to control the switching of the switch 532 and the switch 512. It is worth noting that any controller described herein can be used as the controller 55. It is also worth noting that any display lighting system described herein can replace the display lighting system 599. • FIG. 6 illustrates a liquid crystal display system according to an embodiment of the present invention. The liquid crystal display system includes a thin film transistor display screen 600 and 600. The thin film transistor display screen 1 is coupled to the row driver 602. The row driver 602 controls the rows on the thin film transistor display screen 601. A thin film transistor display 601 is also coupled to the column driver 603. The column driver 603 controls the columns on the thin film transistor display screen 601. The row driver 602 and the column driver 603 are coupled to the timing controller 604. The timing controller 604 controls the timing of the row driver 602 and the column driver 603. A timing controller 604 is coupled to the video signal processor 605. The video signal processor 605 processes the video signal. The video signal processor 605 is coupled to a video demodulator 600. The video demodulator 606 demodulates a video signal. Video demodulator 606 is coupled to tuner 607. The tuner 607 provides a video signal to the video demodulator 606. The tuner 607 adjusts the liquid crystal display system 600 to a specific frequency. Video demodulator 606 is also integrated into microcontroller 608. The spectrum modulator 607 is also coupled to the audio demodulator 611. The audio demodulator 611 demodulates an audio signal from the tuner 607. An audio demodulator 611 is coupled to the audio signal processor 61. The audio signal processor 610 processes an audio signal from the audio demodulator 610. The audio signal processor 61 is coupled to an audio amplifier 609. The audio amplifier 609 amplifies an audio signal from the audio signal processor 610. The thin film transistor display screen 601 is illuminated by a display illumination system 699. The display lighting system 699 includes a cold cathode fluorescent lamp 662. A cold cathode fluorescent lamp 662 is coupled to 98924.doc -21-200537407 secondary transformer winding 660. The secondary transformer winding 660 provides current to the cold-cathode fluorescent lamp 662. The secondary transformer winding 660 is coupled to the primary transformer winding 618. The primary transformer winding 618 provides magnetic flux to the secondary transformer winding 660. The primary transformer winding 618 is coupled to a switch 632. The switch 632 allows current to flow through the primary transformer winding 618. The primary transformer winding 618 is also coupled to a switch 612. The switch 6 12 allows a current to pass through the primary transformer winding 61 8. The switches 632 and 612 are coupled to the controller 650. The controller 650 provides a pulse signal to control the switching of the switches 632 and 612. It is worth noting that any controller described herein can be used as the controller 650. It is also worth noting that any display lighting system described herein can replace the display lighting system 699. FIG. 7 illustrates a liquid crystal display system according to an embodiment of the present invention. The liquid crystal display system 700 includes a graphics adapter 790. The liquid crystal display system 700 may also include components of the liquid crystal display system 500 described above and shown in FIG. 5, or components of the liquid crystal display system 600 described above and shown in FIG. The graphics adapter 79 ° is bound to a video signal processor, which may be the video signal processor 500 described above and shown in FIG. 5, or the video described above and shown in FIG. 6. Signal processor 605. The graphics adapter 790 is bonded to the chipset core logic 791. Chipset core logic 791 transfers data between devices connected to it. Chipset core logic 791 is also coupled to the microprocessor 792. The microprocessor 792 processes the data, including video data. Chipset core logic 791 is also coupled to memory 793. The memory 793 can be a random access memory and provides short-term storage of data. Chipset core logic 791 is also coupled to hard drive 794. Hard disk drive 794 provides long-term storage of data. The chipset core logic 79 1 also fits into the optical drive 795. Optical disc drive 98924.doc -22- 200537407 795 Removes data from CD-ROM or DVD-ROM. Referring to Fig. 8, an embodiment of a switch-mode CCFL power supply 100 according to the present invention is described. The present invention is a switch mode power supply that provides energy for cold cathode fluorescent lamps (CCFL). This power source converts a direct current (DC) low voltage into an alternating current (AC) high voltage 'and supplies it to the CCFL. The switch-mode power supply circuit includes a first switch, and the switch includes a source, an electrode, and a gate. The drain of the first switch is connected to the primary winding of the boost transformer. The resistance of the secondary winding of this step-up transformer is at least 20 times the resistance of the primary winding, preferably 50 to 150 times. The source of the first switch is connected to a power source. The second switch also contains a source, a drain, and a gate. The drain of the second switch is connected to the drain of the first switch and one end of the transformer primary winding. The source of the second switch is connected to the ground reference of a power source. The primary winding has a second terminal, which is connected to the midpoint of a two-capacitor voltage divider. In this way, these two switches are connected in series to approximately divide the input voltage of the power supply approximately. These two capacitors are connected in series with the two ends of the power supply. A control circuit transmits a control signal to the first and second switches, and the parent # turns on the switch with a 180-degree phase shift. When the first switch is turned on, a current flows through the first switch and the primary winding of the transformer in a reference direction. When the second switch is turned on, this current flows in reverse through the primary winding of the transformer and through the second switch. The transformer is driven in two directions, so the magnetic flux surrounding the core is used in the two quadrants of the hysteresis curve associated with the transformer. In this way, the size of the V-core core is reduced, thereby saving the cost of the transformer. The two valleys form a capacitor voltage divider connected to one end of the transformer primary winding 98924.doc -23- 200537407. When each switch is turned on, the two capacitors are charged or discharged by the current flowing through the primary winding of the transformer. When the _th switch is turned on, the current is discharged from the -capacitor while the second capacitor is charged, and the current is reset when the first switch is turned off and the pole body connected to the -switch body is turned on. When the second switch is turned on, the current flowing through the primary winding of the transformer is reversed. With this current flowing direction, the first capacitor is charged and the second capacitor is discharged. After the second switch is turned off, the current is recovered through the body diode of the first switch. If the switches are turned on when their body diode is turned on, then the on-state is basically turned on at zero voltage. This zero-voltage switching technology minimizes the switching losses of the switch. Therefore, the efficiency of the power converter is improved. The power circuit 100 includes a controller 150, a first switch 112, a second switch 132, and a transformer 120, and is connected to a power source 274 for a load (for example, CCFL 162 in a flat panel display, The flat panel display can provide power for a liquid crystal display (| §). The first switch 112 may be an N-channel metal-oxide-semiconductor field-effect transistor (MOSFET) gate-controlled switch and includes a drain terminal connected to one end of the primary winding 118 of the booster microphone 120. The second terminal 125 of the primary winding 118 is connected to the node of the first capacitor 124 and the second capacitor 126. The source 128 of the first switch 112 is connected to the ground reference of the power source 274. The second switch 132 may be a P-channel MOSFET gate-controlled switch. The drain of the P-channel switch 132 is also connected to the drain 114 of the switch 112. Both switches 112 and 132 include intrinsic diodes 134 and 136, respectively. The gates 138 and 152 of the switches 132 and 112 are connected to the output of the controller 150. The secondary winding 160 of the step-up transformer 120 is connected to the CCFL 162. Compared with the non-linear permeability of the saturated magnetic core used in the transformer in the previous Roy circuit of 98924.doc -24- 200537407 technology, a magnetic core with linear permeability will be formed in step-up transformer 120, 5HJ It is not saturated when the power supply circuit 100 works. The step-up transformer 120 has a turns ratio of at least 20: 1 and is usually in the range of 50: 1 to 15 :: 1. The secondary winding i60 of the step-up transformer 120 is parallel to the two capacitors 163 and 164 connected in series. The valleys 163 and 164 constitute a voltage divider for detecting the voltage of the secondary winding 160 of the step-up transformer 120, and converting the rectangular wave of the secondary winding U8 into an approximate sine wave and supplying it to the CCFL load 162. In normal operation, the voltage I86 is always reset by the switch 170, which is controlled by the current flowing through the CCFL 162. The function of the switch 170 will be described in detail below. The controller 150 may be a pulse width modulation controller, which provides a first gate driving signal 152 to the gate 152 of the switch 112 and a second gate driving signal 138 to the gate 138 of the switch 132. In addition to providing drive signals to the switches 112 '132, the controller 150 also provides other functions, such as two distinct frequencies for ccFL lighting and normal operation. The light-on recognition circuit 250 in the controller 15 is used to determine whether the CCFL 162 is lit, and to determine which of the two frequencies is output. When the CCFL 162 is turned on, the turn-on signal 252 is not de-asserted, indicating that the CCFL 162 is not lit, and that its circuit is open. Based on the signal 252, a first frequency is obtained at the oscillator 254. A current through CCFL 162 was detected after lighting. Therefore, the signal 252 is asserted to indicate that the CCFL is lit. A second frequency is obtained at the output of the oscillator 254. It should be noted that the turn-on signal 252 also determines the output 256 of the low frequency pulse width modulation (PWM) circuit 258. During the lighting process, the signal 256 must not interfere with the waveform provided to CCFL 1 62 to obtain a smooth lighting voltage 98924.doc -25- 200537407. In other words, the signal 256 will not affect the output control logic 286 until the signal 252 is set. The controller 150 also includes lamp current and voltage detection and control functions. The lamp current is detected through a sense resistor 182. The detected value 84 is compared with the reference 212 by a comparator (for example, the error amplifier 23 controlling the on-time of the switches 112 and 132). The lamp voltage is detected by the capacitive voltage dividers 163 and 164. The detected value 186 is compared with a reference 214 by a comparison | § 232. The output 234 of the comparator 232 determines the start of the digital clock timer 236. After a period of time (for example, one to two seconds) after the clock timer 236 is started, if the output 234 is still not set, the output signal 238 of the day and time is 236 so that the protection circuit 240 is set to stop the switches 112 and 132. jobs. This period is used to provide CCFL 162 with a little light time (for example, one to two seconds). The oscillator 254 provides two frequencies for the operation of the power supply circuit 100, a higher frequency is used for lighting, and a lower frequency is used for normal operation. Higher frequencies can be 20% to 30% higher than lower frequencies. The lower frequency can be 68 KHz as shown in Figure 4b, or 65 · 8 KHz as shown in Figure 4e, or any frequency value lower than these two frequencies. The low-frequency pulse-width modulation circuit 258 is used to generate a signal 256 to adjust the energy transmitted to the lamp 'to achieve brightness control. The frequency of the signal 256 is preferably in the range of 150 Hz to 400 Hz. The turn-on recognition circuit 25 receives the lamp current detection signal 184, and its output signal 252 is set to recognize the presence of the CCFL load 162 or the completion of lighting. The protection circuit 240 receives a signal 252 'indicating the presence of the CCFL 162, a signal 260 indicating that the current is detected at the CCFL 162, and a signal 238 indicating a pause in an open state. Therefore, when the lamp 62 appears open circuit, overcurrent, overvoltage, or undervoltage occurs at the voltage input 13, the output signal 262 of the protection circuit 24009924.doc -26- 200537407 is set to stop the switches 112 and 132 jobs. The controller 150 includes a ground pin 272 connected to a circuit ground, and a voltage input pin connected to a DC voltage source. In the controller 150, the voltage input pin 130 is connected to a reference / bias circuit 210, which generates different reference voltages 212, 214, etc. for internal use. The voltage input pin 130 is also connected to an un (ier_volt lock-out circuit) 220 and an output driver 222. When the voltage provided to the voltage input pin 130 exceeds a threshold, the output signal of the circuit 220 224 causes the other parts of the controller 150 to start working. On the other hand, if the voltage at the voltage input pin 130 is less than the threshold, the signal 224 will stop the other parts of the controller ι50. When the CCFL is working, the brightness of the CCFL The control function and the open circuit function are substantially complementary. Advantageously, the two signals 168 and 186 can be multiplexed, and the signals 168 and 186 are simultaneously received at one pin 284 of the controller 150. This operation reduces The cost of the controller 150 is connected. The clock pin 276 of the controller 150 is connected to the oscillator 254, and the oscillator is connected to a capacitor 278 to the circuit ground, or a resistor 280 to the voltage input pin 13, to 276. A clock signal (preferably a ramp signal) is provided. Advantageously, in the present invention, the power supply 100 realizes the most functions with the least number of connections of the controller 150 to drive the CCFL load. The power supply The operation is as follows. • A direct current (DC) voltage VIN is applied to the power supply circuit 100. Once the-voltage input at 13o exceeds the threshold set by the undervoltage lockout circuit 22o, the controller 15o starts to work. Reference / bias Set circuit 21〇 as the reference voltage of other circuits in controller 15〇 98924.doc -27- 200537407. Since CCFL 162 is not lit and there is no current feedback signal 1 84 from CCFL load 162, oscillator 254 generates A higher frequency pulse signal. The driver 222 outputs a pulse width modulated driving signal 152 and 138 to the switches 112 and 132 respectively. The capacitor 216 is gradually charged, so that the voltage 260 gradually increases with time. Because the voltage at 260 increases with time Gradually increasing, so the pulse widths of the driving signals 1 3 8 and 15 2 gradually increase. Therefore, the power transmitted to the step-up transformer 120 and the load 162 also gradually increases. The design of the capacitors 124 and 1 26 makes it easier to pass each capacitor The voltage is about half of the input voltage. In the first half cycle, the switch 1 3 2 is turned on, and a current flows from the power source through the switch 13 2 to the primary winding 118. This current then flows into the capacitor 12 6, and contains magnetizing current and reflected load current (reflected load circuit). When capacitor 126 is charged, capacitor 124 is discharged. When switch 132 is turned off, the current of primary winding 118 continues to flow in the same direction. Diode 134 makes this The current continues to flow. After the switch 132 is turned on, the switch 112 is turned on after a phase difference of about 180 degrees. The power source causes the current to flow through the capacitor 124 to the primary winding 118, and in the opposite direction to the ground 272 of the quasi circuit through the switch π 2. This current (including magnetizing current and reflected load current) flows in the reverse direction. At the same time, when the capacitor 126 is discharged, the capacitor 124 is charged. When the switch 112 is turned off, the 'diode 136 supports the continued flow of current in the primary winding 118. After the switch 112 is closed, after a phase difference of about 180 degrees, the switch 13 2 is turned on. The switch continues to operate periodically. Therefore, the voltage of the primary winding 118 is substantially a rectangular wave. Figure 9 illustrates the waveforms at different ports. Fig. 9 (a) shows the driving waveform at 152. Figure 9 (b) shows the corresponding driving waveform at 138. Note that the switch on time of switch U2 98924.doc -28- 200537407 and 132 differs by 180 degrees. Of course, the switch 132 can be grayed out with N channels instead. In this case, the logic of the 'driving signal 138' is inverted to indicate the ON / OFF driving signal. Figure 9 (c) shows the voltage waveform at 125. A small ripple superimposed on the DC voltage (half of the input voltage VIN) indicates the charging and discharging of the capacitor 126. The input voltage VIN minus the voltage at ι25 yields a similar waveform, which represents the voltage of the capacitor 124, which also has a small ripple superimposed on a half of the input voltage. Figure 9 (d) shows the voltage at 114, and Figure 9 (f) shows the current flowing through the primary winding. Note that when the switch is turned on at tl, the voltage at 114 approaches VIN. The current in the primary winding 118 flows forward with a reference to charge the capacitor 126 and discharge the capacitor 124 at the same time. Therefore, the voltage at the capacitor 126 increases (positive slope). At time t2, the switch 132 is turned off. The current at the primary winding 118 continues to flow in the same direction, but it is decreasing. The diode 134 keeps this current flowing until the current decreases to zero at t3. In the period of 12 to 0, it is clear that the voltage at 114 is close to zero. As the current flows in the same direction, the voltage at the capacitor 126 still increases. Instantly after t3, due to the reverse magnetomotive force of the primary winding 118, a small current flows in the reverse direction, the diode 136 is turned on, and the voltage of 114 reaches VIN plus a forward voltage drop of 136. At time 14, the switch 112 is turned on. The voltage 114 drops to near zero and the current in the primary winding 118 increases, but in the opposite direction. When the capacitor 124 is charged, the capacitor 126 is discharged. Therefore, the voltage of the capacitor 126 decreases (negative slope). The switch 112 is turned off at time t5, the diode 136 is turned on, and the current continues to flow. When the current in the primary winding 118 reaches zero, the diode 136 stops conducting. At the same time, a small current flows in the reference forward direction. In other words, since the _pole body 134 is turned on, the voltage at HA is close to zero. 98924.doc '29-200537407 The operation continues until the next cycle starts at time t7, where the switch} 32 is turned on again. The step-up transformer 120 is driven in two directions, which maximizes the use of magnetic flux sweep to provide power to the CCFL load. The step-up transformer 120, the output capacitors 163, 164 and all parasitic reaction elements related to the secondary circuit of the transformer 120 constitute a one-slot circuit. This slot circuit selects the higher harmonic components associated with the rectangular wave appearing at the primary winding 118 and generates a shaped, approximately sinusoidal waveform at CCFL 162. As shown in FIG. 9 (shown in magic. Note that based on the parasitic element and load 162 of the secondary winding 160, the waveform | 172 is possible with the waveforms shown in FIGS. 9 (a) -9 (d) and 9 (f). Have different phase shifts. The voltage at 172 is divided by capacitors 163 and 164. Therefore, capacitors 163 and 164 have two purposes. One purpose is for voltage detection 186 and the other is for wave shaping. When CCFL162 When conducting, the amount of current passing through CCFL162 is detected by resistor 1 82. The detected signal i 84 is fed to a current amplifier 23, which is connected at its output 260 to a compensation capacitor 216. The signal 260 is connected to an oscillator The signals of the amplifier 2 5 4 are compared and an output is generated, which is sent to the control logic 286 to determine the on-time of the switches 112 and 132. One method of adjusting the power delivered to the load is to provide a command signal 168 is provided to the input 284 of the controller 150. The signal at 284 is converted into a low-frequency pulse signal by the low-frequency pulse-width modulation circuit 25 8 and transmitted to the output control logic 286, whereby the driver 222 outputs 138, and 152 is the low-frequency pulse signal. Modulation 'thus Effectively control the energy delivered to CCFL 162. During the lighting period, CCFL 162 is connected to the power supply circuit 100 as an infinite impedance component. Similarly, during this period, CCFL 162 usually requires a predetermined 98924.doc -30- 200537407

On voltage. A power supply circuit 100 including capacitors 163 and 164 detects the voltage of CCFl 162. Thereby, the predetermined on-voltage is proportionally determined 'at the signal 186 and transmitted to the input 284 of the controller 150 for voltage regulation. The light-on identification circuit 250 generates a signal 252, which indicates that the CCFL 162 is not on.彳 § No. 234 is set to start the digital clock timing circuit Mg. Similarly, the signal 252 commands the oscillator 254 to generate a higher frequency suitable for CCFL i 62 lighting. During this period, the voltage at CCFL 162 is adjusted to a predetermined value. About one or two seconds after signal 234 is set, digital clock timer 236 generates a signal • 238. If CCFL 162 is lit before signal 238 is set, CCFL 162 continues to operate as described in the previous paragraph. If the cCFL 162 is not lit (damaged, not connected, or loosely connected), set signal 238 activates protection circuit 24 (). A signal 262, which is an output of the protection circuit 240, is used to stop the operation of the driver 222, so the switches 112 and 132 are turned off. Since the CCFL 162 was not lit during this period and no power was transmitted to the CCFL 162, the power control command signal 168 naturally does not affect the operation of the power supply. In other words, when the power supply circuit 100 implements the CCFL 162 lighting function, the brightness control of the power adjusted to the CCFL 162 is stopped. Also, during normal operation, the device 1 70 resets the voltage detection signal 186, so this signal does not affect the brightness control of the CCFL. Therefore, the multiplexing function reduces the number of pins, thus saving the cost of the controller 15 and the power supply circuit. The oscillator 254 is connected to the reference circuit ground through the power valley 278 or to the input voltage through the resistor 280 to generate a pulse signal. When the capacitor 278 is connected to the circuit ground, the oscillator circuit 254 generates a current to the capacitor 278 and also sinks the current from the capacitor 278. When the resistor 280 is connected to the input voltage, the oscillator circuit 98924.doc 31 200537407 254 draws current from the voltage input and the resistor 28. The characteristics of sink-and-source current or sink-oniy current make it possible to distinguish between different control modes that regulate the power delivered to CCFL 162. For the linear mode, in order to distinguish the low-frequency pulse-width modulation mode as previously described, the power control instruction signal 168 commands and adjusts the power transmitted to the CCFL 162 so that the transmission of this power does not need to pass through the low-frequency pulse-width modulation circuit 258. When the oscillator circuit connects the resistor 280 to the voltage input, the signal 168 then 284 flows through the low-frequency pulse width modulation circuit 258 to generate / rewrite a reference signal 212 and transmits it to the amplifier 230. The command signal 168 thus directly controls the magnitude of the current feedback signal 184 and regulates the current through the CCFL 162. In this mode of operation, the letter 5 at 282 cuts off the low frequency pulse width modulation circuit 258 and allows the signal 284 to feed through. Therefore, connecting the resistor 280 or capacitor 278 to the oscillator circuit 254 not only generates a pulse signal, but also determines the control mode of the CCFL load 162 power adjustment (or in the linear control mode or in the low-frequency pulse-width modulation mode). Such a design reduces the number of components used around the control panel 150, but greatly increases the designer's flexibility. ® As described above, the first switch 112 and the second switch 132 corresponding to the power supply circuit 100 of the present invention are controlled by the controller 150 and are alternately turned on, so that the current flows through the CCFL in the first direction and the second direction alternately. 62, and the power supply circuit 100 converts DC power to AC power to provide power to CCFL 162. Therefore, after reading the above description, the professional and technical personnel will find various modifications and / or alternative applications of the present invention, and these modifications and / or alternative applications do not depart from the spirit and scope of this description. Therefore, the scope of the following patent applications is intended to explain that all or all alternatives within the spirit and scope of the present invention should be 98924.doc -32- 200537407 as those skilled in the art will find that they are limited to the spirit and scope of the present invention, Wai limited. Other circuits and all these modifications and only by additional patent applications [Schematic description] Figure 1 shows the traditional DC / AC converter circuit. Example Figure 2 shows the DC / AC converter circuit of the invention A good implementation of Figure 2a-2f shows a typical timing diagram of the circuit of Figure 2, Figure 3 shows another preferred embodiment of the DC / AC converter circuit of the present invention; Figures 3a-3f Fig. 4 is a typical timing diagram of the circuit of Fig. 3; Figs. 4a-4f are simulation diagrams of the circuits shown in Figs. 2 and 3; Fig. 5 is an embodiment of the liquid crystal display system of the present invention; An embodiment of the liquid crystal display system of the invention; FIG. 7 shows an embodiment of the liquid crystal display system of the invention; FIG. 8 shows an embodiment of a display lighting system of the liquid crystal display system of the invention; The waveforms in an embodiment of the liquid crystal display system of the present invention are shown. [Illustration of symbols of main components of the figure] A / B / C / D switch C1 / C2 / C3 capacitor FB feedback signal N1 / N2 / N3 / N4 winding Q1 / Q2 Transistor 98924.doc -33- 200537407 REF Reference voltage Rs Detection resistor TX1 Transformer 10 CCFL power system 12 Power supply 14 Controller 16 CCFL drive circuit / inverter electrical circuit 18 Feedback loop 20 LCD panel / load 22 Frequency sweeper / frequency generator / pulse generator 24 signal CMP 26 ramp signal 28 comparator 30 bias Set / reference signal 32 error amplifier 36 cross point 38 switch 40 feedback control loop 42 current detection comparator 50 drive circuit 60 protection circuit 62 protection comparator 64 timer 66 voltage signal / OVP signal 70 phase-locked loop circuit 72 trigger circuit 80 switch 90 pulse signal 92 complementary pulse signal • 34 · 98924.doc 200537407

94 signal 98 signal 100/600/700 LCD display system / power circuit 112 first switch 114 drain 118 primary winding 120 transformer 124 first capacitor 125 second terminal 126 second capacitor 128 source 130 voltage input / voltage input Pin 132 Second switch 134/136 Intrinsic diode 138/152 Gate / pulse width modulation drive signal 150 Controller 160 Secondary winding 162 CCFL 163/164 Capacitance 168/186 Signal 170 Switch / device 172 Waveform 182 Inductive Resistance measurement 184 detection value / lamp current detection signal / current feedback signal 186 detection voltage / voltage detection signal 210 bias / reference circuit 212/214 reference / reference signal 216 capacitor 220 undervoltage lockout circuit 98924.doc -35- 200537407

222 Output driver 224 Output signal 230 Error amplifier / current amplifier 232 Comparator 234 Output / signal 236 Timer / timing circuit 238 Output signal 240 Protection circuit 250 Turn-on recognition circuit 252 Turn-on signal 254 Oscillator 256 Output signal 258 Low-frequency pulse width Modulation circuit 260 signal / output 262 output signal 272 ground pin 274 power supply 276 clock pin 278 capacitor 280 resistor 284 pin / input 286 output control logic 501/601 film transistor display 502/602 row driver 503/603 column Driver 504/604 timing controller 505/605 video signal processor 512/612 switch 518/618 primary transformer winding 98924.doc -36- 200537407 532/632 switch 550/650 controller 560/660 secondary transformer winding 562/662 Cold cathode fluorescent lamp 599/699 Display lighting system 606 Video demodulator 607 Tuner 608 Microcontroller 609 Audio amplifier 611 Audio demodulator 791 792 Chipset core logic microprocessor 793 Memory 794 Hard disk drive 795 Optical disk drive 98924.doc -37

Claims (1)

200537407 X. Scope of patent application: 1. A liquid crystal display system includes: a liquid crystal display panel; a cold cathode fluorescent lamp of the liquid crystal display panel described by the customer; a primary transformer winding, the secondary transformer winding is coupled to The cold cathode fluorescent lamp provides current for the cold cathode fluorescent lamp; a primary transformer winding, the primary transformer winding is coupled to the secondary transformer winding, and provides a magnetic flux for the secondary transformer winding; a switch The switch is coupled to the primary transformer winding, allowing current to flow through the primary transformer winding; and a feedback control loop coupled to the cold cathode fluorescent lamp, the feedback control loop receiving a The feedback signal of the power of the cold-cathode fluorescent lamp is to control the power provided to the cold-cathode fluorescent lamp if and only if the feedback signal is higher than a predetermined blue value. 2. The liquid crystal display system according to claim 1, further comprising: an input voltage source ' The input voltage source is coupled to the switch to provide current to the switch. 3. The liquid crystal display system according to claim 2, wherein the input dance source is a power source. 4. The liquid crystal display system according to claim 2, further comprising: a first capacitor coupled to the primary transformer winding and a ground potential; and a first capacitor coupled to the primary transformer winding and the wheel-in voltage source Second capacitor. 98924.doc 200537407 5 · The liquid crystal display system according to claim 1, wherein if the feedback signal is not higher than a predetermined threshold value, the feedback control loop keeps the cold cathode labor lamp at a predetermined minimum power. 6. The liquid crystal display system according to claim 5, further comprising: a younger one switch, the younger two switch 1¾ being coupled to the primary transformer winding, allowing current to flow through the primary transformer winding in a reverse direction; and A third switch, the third switch being coupled to the primary transformer winding and the first switch, and providing an overlap state between the third switch and the first switch to provide the primary transformer winding Current. 7. The liquid crystal display system according to claim 6, wherein the feedback control loop enables the cold cathode fluorescent lamp by maintaining a minimum weight between the third switch and the first switch. The predetermined minimum power is maintained. 8. The liquid crystal display system according to claim 1, further comprising: a voltage detector coupled to the cold cathode fluorescent lamp 'to detect a voltage of the cold cathode fluorescent lamp. 9 · The liquid crystal display system according to the explicit claim §, further comprising: a voltage protection circuit, the voltage protection circuit is coupled to the voltage detector, and when the voltage of the cold cathode fluorescent lamp exceeds one A predetermined threshold value 訏 to reduce the power delivered to the cold cathode fluorescent lamp. 10. The liquid crystal display system according to claim 9, further comprising: a timer, the timer is coupled to the voltage protection circuit to provide a pause period. 11. A liquid crystal display system including: a liquid crystal display panel; 98924.doc 200537407 a cold cathode fluorescent lamp that illuminates the liquid crystal display panel; a primary transformer winding, the secondary transformer winding being coupled to the cold cathode fluorescent light A lamp that provides current for the cold cathode fluorescent lamp; a primary transformer winding that is coupled to the secondary transformer winding to provide a magnetic flux for the secondary transformer winding; a switch that is coupled to The primary transformer winding allows current to flow through the primary transformer winding; and a feedback control loop coupled to the cold cathode fluorescent lamp, the feedback control loop receiving a A feedback signal, when the feedback signal indicates a light-on state, reducing the power provided to the cold cathode fluorescent lamp. 12. The liquid crystal display system according to claim 11, wherein the feedback signal indicates a voltage of the cold-cathode fluorescent lamp 'and when the voltage exceeds a predetermined threshold value, the light-on state is indicated. 13. The liquid crystal display system according to claim 12, wherein the feedback control loop keeps the cold cathode fluorescent lamp at a predetermined minimum power when the voltage exceeds a predetermined threshold. 14. The liquid crystal display system according to claim 13, further comprising: a second switch, the second switch handle being connected to the primary transformer winding, allowing current to flow through the primary transformer winding in a reverse direction; and A third switch, the third switch being coupled to the primary transformer winding and the first switch, and when there is an overlapped state between the third switch and the first switch, 'providing for the primary transformer winding Current. 1 5 · The liquid crystal display system according to claim 14 'wherein the feedback control is 98924.doc 200537407, and the cold cathode makes the cold cathode by maintaining a minimum overlap between the third switch and the first switch. The fluorescent lamp maintains the predetermined minimum power. 16 · The liquid crystal display system according to claim 11, wherein the feedback signal represents a voltage of the cold cathode fluorescent lamp, and when the voltage exceeds a predetermined threshold for a predetermined period of time, the light is turned on. status. 17. The liquid crystal display system according to claim 11, further comprising: a first capacitor coupled to the primary transformer winding and a ground potential; and g—a second surface coupled to the primary transformer winding and a voltage input Electricity 18. The liquid crystal display system according to claim 11, further comprising: an input voltage source coupled to the switch and providing current to the switch. 19. The liquid crystal display system according to claim 11, wherein the input voltage source is a power source. 20. The liquid crystal display system according to claim 11, wherein the feedback signal represents the current flowing through the cold cathode fluorescent lamp and when the current is below a predetermined threshold value, the lighting state is indicated. . 21. —The liquid crystal display system includes: a liquid crystal display panel; a cold cathode fluorescent lamp that illuminates the liquid crystal display panel; a primary transformer winding; the secondary transformer winding is coupled to the cold cathode fluorescent lamp; The cold-cathode fluorescent lamp provides a current; a primary transformer winding, the primary transformer winding is coupled to the 98924.doc 200537407 secondary transformer winding to provide a magnetic flux for the secondary transformer winding; a first switch, so The first switch is coupled to the primary transformer winding, allowing current to flow through the primary transformer winding in a first direction; a second switch, the second switch is coupled to the primary transformer winding. A second direction flows through the primary transformer winding; a third switch, the third switch is coupled to the primary transformer winding and the first switch, and when there is between the third switch and the first switch In an overlapped state, providing current to the primary transformer winding; and a feedback control loop that is switched to the cold cathode fluorescent lamp, said The feedback control loop receives a feedback signal from the cold cathode fluorescent lamp, and maintains a minimum weight of the cold cathode fluorescent lamp by maintaining a minimum weight between the third switch and the first switch. A predetermined minimum power. 22. The liquid crystal display system according to claim 21, further comprising: an input voltage source coupled to the first switch, the first switch, the first switch and the first switch The second switch provides current. 23. The liquid crystal display system according to claim 22, wherein the input voltage source is a power source. 24 .: A method for controlling power to a cold cathode glory lamp in a factory liquid crystal display system. The method includes the following steps: providing a pulse signal to a transistor as a conduction path of a primary transformer winding; The cold-cathode fluorescent light generates a feedback signal from a lamp coupled to the primary transformer 98924.doc 200537407, which signal indicates the electrical state of the cold-cathode fluorescent lamp; the signal received from the cold-cathode fluorescent lamp is received. The anti-cathode signal; and adjusting the power provided to the cold cathode fluorescent lamp only when the feedback # sign indicates that the cold cathode fluorescent lamp is turned on. 25. The method according to claim 24, wherein the feedback signal represents a voltage across the cold cathode fluorescent lamp, and when the voltage is below a predetermined threshold, 'represents the cold cathode fluorescent lamp Light up. # 26. The method according to claim 24, wherein the feedback signal indicates a current that does not pass through the cold cathode fluorescent lamp, and when the current is higher than a predetermined threshold, the cold cathode fluorescent lamp is indicated. Lighting of lights. 27. The method according to claim 24, further comprising the following steps: when the feedback 彳 § number indicates non-lighting, maintaining to a predetermined minimum value of the power of the cold cathode fluorescent lamp. 28. The method according to Shenqing Patent Hongwei 27, further comprising the following steps: providing a second pulse signal to a second transistor as a second conducting path of the primary transformer winding; providing a A third pulse signal is given to a third transistor as the second conduction path of the primary transformer winding; it is maintained at a minimum / overlap amount between the first transistor and the second transistor. 29. The method according to claim 24, further comprising the following steps: ‘when the feedback signal indicates non-lighting in a predetermined time interval, cut off to the power of the cold cathode fluorescent lamp. 98924.doc