TW200614898A - Manufacturing method of multi-layer print wiring and multi-layer print wiring board - Google Patents

Manufacturing method of multi-layer print wiring and multi-layer print wiring board

Info

Publication number
TW200614898A
TW200614898A TW094118689A TW94118689A TW200614898A TW 200614898 A TW200614898 A TW 200614898A TW 094118689 A TW094118689 A TW 094118689A TW 94118689 A TW94118689 A TW 94118689A TW 200614898 A TW200614898 A TW 200614898A
Authority
TW
Taiwan
Prior art keywords
wiring board
print wiring
layer print
layer
manufacturing
Prior art date
Application number
TW094118689A
Other languages
Chinese (zh)
Other versions
TWI340616B (en
Inventor
Hitoshi Takii
Noriki Hayashi
Yoshio Oka
Original Assignee
Sumitomo Electric Industries
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries filed Critical Sumitomo Electric Industries
Publication of TW200614898A publication Critical patent/TW200614898A/en
Application granted granted Critical
Publication of TWI340616B publication Critical patent/TWI340616B/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The goal of this invention is to provide a kind of method for multi-layer print wiring board manufacturing and multi-layer print wiring board manufactured by such method. It uses simpler processes to produce multi-layer print wiring board in high productivity and no bending problem occurred while in sticking and achieves large interlayer sticking strength by means of IVH, a manufacturing method of multi-layer printed wiring board. It is characterized in insulation board, conductance circuit disposed on such 1 surface, single face wiring substrate having projected bump of obtained conductive substance which is formed in the via hole of said insulation board to fill conductive substance and glue sheet, glue sheet layer having through hole with larger diameter than via hole at the corresponding position of said via hole and other wiring board substrate, making said projected bump insert into said through hole to overlap and thus proceed laminating press totally.
TW094118689A 2004-06-10 2005-06-07 Manufacturing method of multi-layer print wiring and multi-layer print wiring board TWI340616B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004172095 2004-06-10
JP2004368632 2004-12-21
JP2005052321A JP4305399B2 (en) 2004-06-10 2005-02-28 Multilayer printed wiring board manufacturing method and multilayer printed wiring board

Publications (2)

Publication Number Publication Date
TW200614898A true TW200614898A (en) 2006-05-01
TWI340616B TWI340616B (en) 2011-04-11

Family

ID=36960830

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094118689A TWI340616B (en) 2004-06-10 2005-06-07 Manufacturing method of multi-layer print wiring and multi-layer print wiring board

Country Status (4)

Country Link
JP (1) JP4305399B2 (en)
KR (1) KR101116079B1 (en)
CN (1) CN1722940B (en)
TW (1) TWI340616B (en)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4992310B2 (en) * 2006-06-16 2012-08-08 富士通株式会社 Manufacturing method of laminated substrate
US20100040986A1 (en) * 2006-09-22 2010-02-18 Masatoshi Yamaguchi Process for manufacturing light guide
JP5217640B2 (en) * 2008-05-30 2013-06-19 富士通株式会社 Method for manufacturing printed wiring board and method for manufacturing printed circuit board unit
US8453322B2 (en) * 2008-08-14 2013-06-04 Ddi Global Corp. Manufacturing methods of multilayer printed circuit board having stacked via
CN101772267A (en) * 2008-12-30 2010-07-07 深圳玛斯兰电路科技实业发展有限公司 Improvement method for wrinkled copper foil in compacting process of high-rise plates
JP5581828B2 (en) * 2010-06-09 2014-09-03 富士通株式会社 Multilayer circuit board and substrate manufacturing method
JP5593863B2 (en) * 2010-06-09 2014-09-24 富士通株式会社 Multilayer circuit board and substrate manufacturing method
US9949360B2 (en) 2011-03-10 2018-04-17 Mediatek Inc. Printed circuit board design for high speed application
JP5464760B2 (en) * 2011-10-21 2014-04-09 株式会社フジクラ Multilayer circuit board manufacturing method
EP2846615A4 (en) 2012-04-26 2016-05-11 Ngk Spark Plug Co MULTILAYER WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
CN103458629B (en) * 2012-05-30 2016-12-21 碁鼎科技秦皇岛有限公司 Multilayer circuit board and preparation method thereof
CN103458630B (en) * 2013-08-09 2016-12-28 高德（无锡）电子有限公司 A kind of method overcoming printed circuit board (PCB) copper-clad base plate thin plate operation to limit
CN105518824A (en) * 2013-09-06 2016-04-20 张于纯 Application of liquid glass
JP5979516B2 (en) * 2015-02-18 2016-08-24 パナソニックＩｐマネジメント株式会社 Printed wiring board and manufacturing method thereof
CN107509316B (en) * 2017-08-23 2023-07-07 苏州市吴通电子有限公司 A PCB board hole slag removal head
CN110366329A (en) * 2018-04-10 2019-10-22 电连技术股份有限公司 A kind of manufacturing method and multilager base plate of multilager base plate
WO2023272650A1 (en) * 2021-06-30 2023-01-05 华为技术有限公司 Packaging substrate and manufacturing method therefor, chip packaging structure, and electronic apparatus
CN116033653A (en) * 2021-10-25 2023-04-28 礼鼎半导体科技秦皇岛有限公司 Circuit board and manufacturing method thereof
CN114025491A (en) * 2021-11-03 2022-02-08 苏州统硕科技有限公司 Line forming method capable of realizing line densification

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4444435B2 (en) * 2000-03-06 2010-03-31 ソニーケミカル＆インフォメーションデバイス株式会社 Printed wiring board and method for manufacturing printed wiring board
JP3826731B2 (en) * 2001-05-07 2006-09-27 ソニー株式会社 Multilayer printed wiring board and method for manufacturing multilayer printed wiring board

Also Published As

Publication number Publication date
JP4305399B2 (en) 2009-07-29
CN1722940A (en) 2006-01-18
KR20060046303A (en) 2006-05-17
CN1722940B (en) 2010-08-11
JP2006203148A (en) 2006-08-03
KR101116079B1 (en) 2012-02-13
TWI340616B (en) 2011-04-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees