TW200636730A - Flash memory device - Google Patents

Flash memory device

Info

Publication number
TW200636730A
TW200636730A TW094144933A TW94144933A TW200636730A TW 200636730 A TW200636730 A TW 200636730A TW 094144933 A TW094144933 A TW 094144933A TW 94144933 A TW94144933 A TW 94144933A TW 200636730 A TW200636730 A TW 200636730A
Authority
TW
Taiwan
Prior art keywords
memory device
flash memory
memory cells
coupled
group
Prior art date
Application number
TW094144933A
Other languages
Chinese (zh)
Other versions
TWI309829B (en
Inventor
Hee-Sik Park
Kyeong-Bock Lee
Byung-Soo Park
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020050037101A external-priority patent/KR100680485B1/en
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200636730A publication Critical patent/TW200636730A/en
Application granted granted Critical
Publication of TWI309829B publication Critical patent/TWI309829B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

A flash memory device comprises a first group of dummy memory cells disposed between source selection transistors, which are coupled to a source selection line, and memory cells coupled to a first wordline. The flash memory device further comprises a second group of dummy memory cells disposed between drain selection transistors, which are coupled to a drain selection line, and memory cells coupled to the last wordline. The flash memory device is configured to prevent program disturbance in deselected cell strings and degradation of programming/erasing speeds in a selected cell string.
TW094144933A 2004-12-27 2005-12-16 Flash memory device TWI309829B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020040112829A KR100739946B1 (en) 2004-12-27 2004-12-27 NAND flash memory device with dummy word lines
KR1020050037101A KR100680485B1 (en) 2004-11-30 2005-05-03 Nonvolatile Memory Devices

Publications (2)

Publication Number Publication Date
TW200636730A true TW200636730A (en) 2006-10-16
TWI309829B TWI309829B (en) 2009-05-11

Family

ID=36994227

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094144933A TWI309829B (en) 2004-12-27 2005-12-16 Flash memory device

Country Status (3)

Country Link
KR (1) KR100739946B1 (en)
CN (1) CN100501869C (en)
TW (1) TWI309829B (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100704025B1 (en) * 2005-09-09 2007-04-04 삼성전자주식회사 A nonvolatile semiconductor memory device having dummy cells arranged in a cell string
US7978522B2 (en) 2006-01-09 2011-07-12 Samsung Electronics Co., Ltd. Flash memory device including a dummy cell
USD589322S1 (en) 2006-10-05 2009-03-31 Lowe's Companies, Inc. Tool handle
KR100874911B1 (en) * 2006-10-30 2008-12-19 삼성전자주식회사 Read method of flash memory array to improve read disturb characteristics
US7489547B2 (en) * 2006-12-29 2009-02-10 Sandisk Corporation Method of NAND flash memory cell array with adaptive memory state partitioning
US7773429B2 (en) 2007-02-22 2010-08-10 Hynix Semiconductor Inc. Non-volatile memory device and driving method thereof
KR100919362B1 (en) * 2007-02-22 2009-09-25 주식회사 하이닉스반도체 Flash memory device and driving method thereof
KR100854914B1 (en) 2007-04-06 2008-08-27 주식회사 하이닉스반도체 Flash memory device and operation method thereof
KR100896190B1 (en) 2007-06-11 2009-05-12 삼성전자주식회사 Erasing Method of Nonvolatile Memory Device
US7539058B2 (en) * 2007-07-17 2009-05-26 Macronix International Co., Ltd. Non-volatile memory and operating method thereof
KR100894784B1 (en) * 2007-09-10 2009-04-24 주식회사 하이닉스반도체 Program method of flash memory device
KR101360136B1 (en) 2008-04-18 2014-02-10 삼성전자주식회사 Flash memory device and operating method thereof, and memory system including the same
KR101478149B1 (en) * 2008-10-20 2015-01-05 삼성전자주식회사 Flash memory device with dummy transistors
US8755227B2 (en) * 2012-01-30 2014-06-17 Phison Electronics Corp. NAND flash memory unit, NAND flash memory array, and methods for operating them
US8976594B2 (en) 2012-05-15 2015-03-10 Micron Technology, Inc. Memory read apparatus and methods
US9087601B2 (en) * 2012-12-06 2015-07-21 Sandisk Technologies Inc. Select gate bias during program of non-volatile storage
US9064577B2 (en) 2012-12-06 2015-06-23 Micron Technology, Inc. Apparatuses and methods to control body potential in memory operations
US8995188B2 (en) * 2013-04-17 2015-03-31 Micron Technology, Inc. Sharing support circuitry in a memory
KR102083506B1 (en) 2013-05-10 2020-03-02 삼성전자주식회사 3d flash memory device having dummy wordlines and data storage device including the same
KR102102224B1 (en) * 2013-10-01 2020-04-20 삼성전자주식회사 Storage and programming method thereof
US9953703B2 (en) 2015-10-16 2018-04-24 Samsung Electronics Co., Ltd. Programming method of non volatile memory device
CN107958689B (en) * 2016-10-17 2020-08-18 旺宏电子股份有限公司 Operation method of memory array
US10176880B1 (en) 2017-07-01 2019-01-08 Intel Corporation Selective body reset operation for three dimensional (3D) NAND memory
CN109979509B (en) * 2019-03-29 2020-05-08 长江存储科技有限责任公司 Three-dimensional memory and programming operation method thereof
EP3891747B1 (en) * 2019-12-09 2023-08-09 Yangtze Memory Technologies Co., Ltd. Method of reducing program disturbance in memory device and memory device utilizing same
CN112018118B (en) * 2020-07-21 2024-08-06 长江存储科技有限责任公司 3D memory device, memory structure thereof and control method of memory structure
CN121438917A (en) 2023-06-25 2026-01-30 长江存储科技有限责任公司 Memory, storage system, and memory operation methods

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100311175B1 (en) * 1998-12-28 2001-12-17 김영환 Semiconductor memory
JP3359615B2 (en) 1999-04-23 2002-12-24 松下電器産業株式会社 Nonvolatile semiconductor memory device
US6740940B2 (en) 2001-11-27 2004-05-25 Samsung Electronics Co., Ltd. Semiconductor memory devices having dummy active regions
JP4005895B2 (en) 2002-09-30 2007-11-14 株式会社東芝 Nonvolatile semiconductor memory device

Also Published As

Publication number Publication date
TWI309829B (en) 2009-05-11
CN1832046A (en) 2006-09-13
CN100501869C (en) 2009-06-17
KR20060074179A (en) 2006-07-03
KR100739946B1 (en) 2007-07-16

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees