TW200638517A - Method for fabricating semiconductor device - Google Patents

Method for fabricating semiconductor device

Info

Publication number
TW200638517A
TW200638517A TW094142755A TW94142755A TW200638517A TW 200638517 A TW200638517 A TW 200638517A TW 094142755 A TW094142755 A TW 094142755A TW 94142755 A TW94142755 A TW 94142755A TW 200638517 A TW200638517 A TW 200638517A
Authority
TW
Taiwan
Prior art keywords
cell
flash memory
eeprom
memory cell
chip
Prior art date
Application number
TW094142755A
Other languages
English (en)
Other versions
TWI297932B (en
Inventor
Yong-Sik Jeong
Original Assignee
Magnachip Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Magnachip Semiconductor Ltd filed Critical Magnachip Semiconductor Ltd
Publication of TW200638517A publication Critical patent/TW200638517A/zh
Application granted granted Critical
Publication of TWI297932B publication Critical patent/TWI297932B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0147—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW094142755A 2005-04-26 2005-12-05 Method for fabricating semiconductor device TWI297932B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050034713A KR100603694B1 (ko) 2005-04-26 2005-04-26 반도체 소자의 제조방법

Publications (2)

Publication Number Publication Date
TW200638517A true TW200638517A (en) 2006-11-01
TWI297932B TWI297932B (en) 2008-06-11

Family

ID=37184416

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094142755A TWI297932B (en) 2005-04-26 2005-12-05 Method for fabricating semiconductor device

Country Status (5)

Country Link
US (1) US7378315B2 (zh)
JP (1) JP4873940B2 (zh)
KR (1) KR100603694B1 (zh)
CN (1) CN100403521C (zh)
TW (1) TWI297932B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101098440B1 (ko) 2005-11-16 2011-12-27 매그나칩 반도체 유한회사 반도체 소자 제조방법
JP4789754B2 (ja) 2006-08-31 2011-10-12 富士通セミコンダクター株式会社 半導体装置の製造方法
CN102130065B (zh) * 2010-01-18 2013-09-11 上海华虹Nec电子有限公司 Eeprom的栅极制造方法及其制造的栅极
US20140353729A1 (en) * 2013-05-29 2014-12-04 United Microelectronics Corp. Semiconductor structure and method for forming the same
CN104752177B (zh) * 2013-12-27 2017-11-10 中芯国际集成电路制造(上海)有限公司 一种制作嵌入式闪存栅极的方法
CN104752361B (zh) * 2013-12-30 2019-02-12 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
CN104835791B (zh) * 2014-02-10 2018-03-16 中芯国际集成电路制造(上海)有限公司 一种eeprom存储器件以及制备方法
CN105374753B (zh) * 2014-07-07 2019-07-05 中芯国际集成电路制造(上海)有限公司 一种存储器的制造方法
CN105336698B (zh) * 2014-07-10 2018-11-16 中芯国际集成电路制造(上海)有限公司 半导体器件的制造方法
CN105355600A (zh) * 2014-08-20 2016-02-24 中芯国际集成电路制造(上海)有限公司 闪存的制作方法
CN105931992A (zh) * 2016-05-17 2016-09-07 上海华力微电子有限公司 在不同区域形成两种不同结构侧墙的工艺方法
CN106941104B (zh) * 2017-04-24 2019-09-17 上海华力微电子有限公司 一种结合耐高压晶体管的电荷捕获型非易失存储器制作方法
CN111834370B (zh) * 2019-04-19 2024-03-15 华邦电子股份有限公司 集成电路及其制造方法
KR102274881B1 (ko) 2019-07-05 2021-07-07 주식회사 키 파운드리 비휘발성 메모리 소자
KR102212751B1 (ko) 2019-07-26 2021-02-04 주식회사 키 파운드리 비휘발성 메모리 소자 및 그 제조방법

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10189775A (ja) * 1996-12-25 1998-07-21 Hitachi Ltd 不揮発性半導体記憶装置の製造方法
US6252799B1 (en) * 1997-04-11 2001-06-26 Programmable Silicon Solutions Device with embedded flash and EEPROM memories
JP3459546B2 (ja) * 1997-09-30 2003-10-20 三洋電機株式会社 半導体装置の製造方法
US5918124A (en) * 1997-10-06 1999-06-29 Vanguard International Semiconductor Corporation Fabrication process for a novel multi-storage EEPROM cell
US6486023B1 (en) * 1997-10-31 2002-11-26 Texas Instruments Incorporated Memory device with surface-channel peripheral transistor
US6043530A (en) * 1998-04-15 2000-03-28 Chang; Ming-Bing Flash EEPROM device employing polysilicon sidewall spacer as an erase gate
JP2000068484A (ja) * 1998-08-19 2000-03-03 Nec Corp 不揮発性半導体記憶装置及びその製造方法並びに不揮発 性半導体記憶装置を内蔵したマイクロコンピュータ及び その製造方法
JP3895069B2 (ja) * 1999-02-22 2007-03-22 株式会社東芝 半導体装置とその製造方法
JP4443008B2 (ja) * 2000-06-30 2010-03-31 富士通株式会社 半導体装置及びその製造方法
JP2002110823A (ja) * 2000-09-29 2002-04-12 Matsushita Electric Ind Co Ltd 半導体記憶装置及びその製造方法
JP4096507B2 (ja) * 2000-09-29 2008-06-04 富士通株式会社 半導体装置の製造方法
US6787419B2 (en) * 2003-01-14 2004-09-07 Ememory Technology Inc. Method of forming an embedded memory including forming three silicon or polysilicon layers
WO2004112139A1 (ja) * 2003-06-10 2004-12-23 Fujitsu Limited 半導体装置とその製造方法

Also Published As

Publication number Publication date
CN1855425A (zh) 2006-11-01
US7378315B2 (en) 2008-05-27
US20060246659A1 (en) 2006-11-02
JP2006310747A (ja) 2006-11-09
KR100603694B1 (ko) 2006-07-20
TWI297932B (en) 2008-06-11
CN100403521C (zh) 2008-07-16
JP4873940B2 (ja) 2012-02-08

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees