TW200710721A - General-purpose logic module and circuit with the same - Google Patents

General-purpose logic module and circuit with the same

Info

Publication number
TW200710721A
TW200710721A TW095113978A TW95113978A TW200710721A TW 200710721 A TW200710721 A TW 200710721A TW 095113978 A TW095113978 A TW 095113978A TW 95113978 A TW95113978 A TW 95113978A TW 200710721 A TW200710721 A TW 200710721A
Authority
TW
Taiwan
Prior art keywords
input output
general
logic module
purpose logic
inverting amplifier
Prior art date
Application number
TW095113978A
Other languages
Chinese (zh)
Inventor
Hiroyuki Ogino
Original Assignee
Univ Kyoto
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Kyoto filed Critical Univ Kyoto
Publication of TW200710721A publication Critical patent/TW200710721A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

To provide a programmable and optimally controllable general-purpose logic module and a circuit including the same. An integrated circuit 29 includes: a general-purpose logic module 25; a coupling section 26; and a calculation section 28. The general-purpose logic module 25 includes two input output control sections 23 and a storage section 24, and receives settings and control information. Each of the input output control sections 23 carries out a combination logic arithmetic operation of information received by an input output terminal 21 and input output control information received by an input output terminal 22. The storage section 24 stores a result of the combination logic arithmetic operation and outputs an affirmative or negative result. The storage section 24 includes a first inverting amplifier, a second inverting amplifier in cross-coupling to the first inverting amplifier, and a storage element comprising a ferroelectric or ferromagnetic body.
TW095113978A 2005-04-20 2006-04-19 General-purpose logic module and circuit with the same TW200710721A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005122047A JP4593346B2 (en) 2005-04-20 2005-04-20 General-purpose logic module and circuit having the same

Publications (1)

Publication Number Publication Date
TW200710721A true TW200710721A (en) 2007-03-16

Family

ID=37214685

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095113978A TW200710721A (en) 2005-04-20 2006-04-19 General-purpose logic module and circuit with the same

Country Status (3)

Country Link
JP (1) JP4593346B2 (en)
TW (1) TW200710721A (en)
WO (1) WO2006115062A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111327310A (en) * 2020-04-15 2020-06-23 联合华芯电子有限公司 A circuit and method for realizing multi-level logical OR operation

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009122598A1 (en) * 2008-04-04 2009-10-08 富士電機ホールディングス株式会社 Logic circuit
JP5716372B2 (en) * 2010-12-08 2015-05-13 富士通株式会社 Nonvolatile latch circuit and semiconductor integrated circuit
JP5863160B2 (en) * 2010-12-21 2016-02-16 ローム株式会社 Control circuit and data holding device using the same
US11165430B1 (en) * 2020-12-21 2021-11-02 Kepler Computing Inc. Majority logic gate based sequential circuit
WO2025182149A1 (en) * 2024-02-27 2025-09-04 博幸 荻野 Bidirectional logic element, operation device, and operation method

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5390143A (en) * 1993-05-17 1995-02-14 Micron Semiconductor, Inc. Non-volatile static memory devices and operational methods
JPH0993118A (en) * 1995-09-22 1997-04-04 Kawasaki Steel Corp Pass transistor logic circuit
JP2000293989A (en) * 1999-04-07 2000-10-20 Nec Corp Shadow ram cell using ferroelectric capacitor, non- volatile memory device, and its control method
JP3887241B2 (en) * 2001-12-28 2007-02-28 富士通株式会社 Programmable logic device, nonvolatile memory, and data reproduction method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111327310A (en) * 2020-04-15 2020-06-23 联合华芯电子有限公司 A circuit and method for realizing multi-level logical OR operation

Also Published As

Publication number Publication date
WO2006115062A1 (en) 2006-11-02
JP4593346B2 (en) 2010-12-08
JP2006303857A (en) 2006-11-02

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