TW200715531A - Semiconductor memory device and its fabrication method - Google Patents

Semiconductor memory device and its fabrication method

Info

Publication number
TW200715531A
TW200715531A TW095124514A TW95124514A TW200715531A TW 200715531 A TW200715531 A TW 200715531A TW 095124514 A TW095124514 A TW 095124514A TW 95124514 A TW95124514 A TW 95124514A TW 200715531 A TW200715531 A TW 200715531A
Authority
TW
Taiwan
Prior art keywords
memory device
semiconductor memory
extending
electrode
fabrication method
Prior art date
Application number
TW095124514A
Other languages
Chinese (zh)
Inventor
Tetsuya Ohnishi
Shigeo Ohnishi
Original Assignee
Sharp Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kk filed Critical Sharp Kk
Publication of TW200715531A publication Critical patent/TW200715531A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Shaping switching materials
    • H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8836—Complex metal oxides, e.g. perovskites, spinels

Landscapes

  • Semiconductor Memories (AREA)

Abstract

A semiconductor memory device has a memory cell area smaller than the minimum memory cell area defined by the minimum fabrication dimension of the fabrication process and is fabricated with a smaller number of photolithography steps. A fabrication method of the semiconductor memory device is also disclosed. The semiconductor memory device comprises a plurality of top electrodes (2) extending in the same direction and a plurality of bottom electrodes (1) extending in the direction perpendicular to the extending direction of the top electrodes (2) and has a cross-point structure in which a memory material element for storing data in a layer between the top electrode (2) and bottom electrode (1) is formed. The length of the memory material element in the extending direction of the top electrode (2) is determined by the line width of the bottom electrode (1) in a self-aligning fashion; the length in the extending direction of the bottom electrode (1) is determined by the line width of the top electrode (2) in a self-aligning fashion.
TW095124514A 2005-07-12 2006-07-05 Semiconductor memory device and its fabrication method TW200715531A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005202891 2005-07-12

Publications (1)

Publication Number Publication Date
TW200715531A true TW200715531A (en) 2007-04-16

Family

ID=37637002

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095124514A TW200715531A (en) 2005-07-12 2006-07-05 Semiconductor memory device and its fabrication method

Country Status (2)

Country Link
TW (1) TW200715531A (en)
WO (1) WO2007007608A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4221031B2 (en) * 2007-02-09 2009-02-12 シャープ株式会社 Nonvolatile semiconductor memory device and rewriting method thereof
KR20090026580A (en) * 2007-09-10 2009-03-13 삼성전자주식회사 Resistor Memory Device and Formation Method
JP2009130139A (en) * 2007-11-22 2009-06-11 Toshiba Corp Method for manufacturing nonvolatile semiconductor memory device
JP5422237B2 (en) * 2009-03-23 2014-02-19 株式会社東芝 Method for manufacturing nonvolatile memory device
JP5386528B2 (en) * 2011-02-21 2014-01-15 株式会社日立製作所 Semiconductor memory device and manufacturing method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693821B2 (en) * 2001-06-28 2004-02-17 Sharp Laboratories Of America, Inc. Low cross-talk electrically programmable resistance cross point memory
JP4103497B2 (en) * 2002-04-18 2008-06-18 ソニー株式会社 Memory device and method for manufacturing and using the same, semiconductor device and method for manufacturing the same

Also Published As

Publication number Publication date
WO2007007608A1 (en) 2007-01-18

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