TW200720967A - Method of power/ground circuit wiring-aided for circuit layout - Google Patents

Method of power/ground circuit wiring-aided for circuit layout

Info

Publication number
TW200720967A
TW200720967A TW094142154A TW94142154A TW200720967A TW 200720967 A TW200720967 A TW 200720967A TW 094142154 A TW094142154 A TW 094142154A TW 94142154 A TW94142154 A TW 94142154A TW 200720967 A TW200720967 A TW 200720967A
Authority
TW
Taiwan
Prior art keywords
circuit
power
ground
layer
wiring
Prior art date
Application number
TW094142154A
Other languages
Chinese (zh)
Other versions
TWI306208B (en
Inventor
Vam Chang
Yi-Hsin Hsieh
Original Assignee
Inventec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inventec Corp filed Critical Inventec Corp
Priority to TW094142154A priority Critical patent/TW200720967A/en
Publication of TW200720967A publication Critical patent/TW200720967A/en
Application granted granted Critical
Publication of TWI306208B publication Critical patent/TWI306208B/zh

Links

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A method of power/ground circuit wiring-aided for circuit layout comprises the following steps: firstly searching for more than one power circuit or more than one ground circuit according to a keyword of a net name; appointing a power layer corresponding to each of power circuits or a ground layer corresponding to each of ground circuits; setting a power layer or a ground layer as a circuit layer to undergo wiring; selecting a circuit layer to undergo wiring; and according to the selected circuit layer to undergo wiring, using a special display effect to highlight the power circuit corresponding to the power layer or the ground circuit corresponding to the ground layer so as to prevent any omission from happening.
TW094142154A 2005-11-30 2005-11-30 Method of power/ground circuit wiring-aided for circuit layout TW200720967A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW094142154A TW200720967A (en) 2005-11-30 2005-11-30 Method of power/ground circuit wiring-aided for circuit layout

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094142154A TW200720967A (en) 2005-11-30 2005-11-30 Method of power/ground circuit wiring-aided for circuit layout

Publications (2)

Publication Number Publication Date
TW200720967A true TW200720967A (en) 2007-06-01
TWI306208B TWI306208B (en) 2009-02-11

Family

ID=45071327

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094142154A TW200720967A (en) 2005-11-30 2005-11-30 Method of power/ground circuit wiring-aided for circuit layout

Country Status (1)

Country Link
TW (1) TW200720967A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8289727B2 (en) * 2010-06-11 2012-10-16 Taiwan Semiconductor Manufacturing Company, Ltd. Package substrate

Also Published As

Publication number Publication date
TWI306208B (en) 2009-02-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees