TW200737361A - Method of forming a semiconductor device - Google Patents

Method of forming a semiconductor device

Info

Publication number
TW200737361A
TW200737361A TW096101490A TW96101490A TW200737361A TW 200737361 A TW200737361 A TW 200737361A TW 096101490 A TW096101490 A TW 096101490A TW 96101490 A TW96101490 A TW 96101490A TW 200737361 A TW200737361 A TW 200737361A
Authority
TW
Taiwan
Prior art keywords
over
doped region
forming
dielectric
gate stack
Prior art date
Application number
TW096101490A
Other languages
English (en)
Inventor
Da Zhang
Bich-Yen Nguyen
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200737361A publication Critical patent/TW200737361A/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
TW096101490A 2006-02-08 2007-01-15 Method of forming a semiconductor device TW200737361A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/349,595 US7446026B2 (en) 2006-02-08 2006-02-08 Method of forming a CMOS device with stressor source/drain regions

Publications (1)

Publication Number Publication Date
TW200737361A true TW200737361A (en) 2007-10-01

Family

ID=38334585

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096101490A TW200737361A (en) 2006-02-08 2007-01-15 Method of forming a semiconductor device

Country Status (3)

Country Link
US (1) US7446026B2 (zh)
TW (1) TW200737361A (zh)
WO (1) WO2007092653A2 (zh)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1941296A (zh) * 2005-09-28 2007-04-04 中芯国际集成电路制造(上海)有限公司 应变硅cmos晶体管的原位掺杂硅锗与碳化硅源漏极区
CN100442476C (zh) * 2005-09-29 2008-12-10 中芯国际集成电路制造(上海)有限公司 用于cmos技术的应变感应迁移率增强纳米器件及工艺
US7732285B2 (en) * 2007-03-28 2010-06-08 Intel Corporation Semiconductor device having self-aligned epitaxial source and drain extensions
CN101364545B (zh) * 2007-08-10 2010-12-22 中芯国际集成电路制造(上海)有限公司 应变硅晶体管的锗硅和多晶硅栅极结构
US7936017B2 (en) * 2008-05-15 2011-05-03 International Business Machines Corporation Reduced floating body effect without impact on performance-enhancing stress
JP5562696B2 (ja) * 2009-03-27 2014-07-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
CN102024761A (zh) * 2009-09-18 2011-04-20 中芯国际集成电路制造(上海)有限公司 用于形成半导体集成电路器件的方法
US8404538B2 (en) * 2009-10-02 2013-03-26 Taiwan Semiconductor Manufacturing Co., Ltd. Device with self aligned stressor and method of making same
US8035141B2 (en) * 2009-10-28 2011-10-11 International Business Machines Corporation Bi-layer nFET embedded stressor element and integration to enhance drive current
US8278164B2 (en) 2010-02-04 2012-10-02 International Business Machines Corporation Semiconductor structures and methods of manufacturing the same
US8502316B2 (en) * 2010-02-11 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned two-step STI formation through dummy poly removal
US8236660B2 (en) 2010-04-21 2012-08-07 International Business Machines Corporation Monolayer dopant embedded stressor for advanced CMOS
US8299535B2 (en) 2010-06-25 2012-10-30 International Business Machines Corporation Delta monolayer dopants epitaxy for embedded source/drain silicide
CN102130011B (zh) * 2010-12-30 2016-08-10 复旦大学 一种晶体管的制造方法
CN103247624B (zh) * 2012-02-01 2016-03-02 中国科学院微电子研究所 一种半导体结构及其制造方法
JP5927017B2 (ja) * 2012-04-20 2016-05-25 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US8847315B2 (en) 2012-05-07 2014-09-30 Qualcomm Incorporated Complementary metal-oxide-semiconductor (CMOS) device and method
CN103632977B (zh) * 2012-08-29 2016-02-17 中芯国际集成电路制造(上海)有限公司 半导体结构及形成方法
US20150001628A1 (en) * 2013-06-27 2015-01-01 Global Foundries Inc. Semiconductor structure with improved isolation and method of fabrication to enable fine pitch transistor arrays
US9704872B1 (en) * 2016-01-07 2017-07-11 Micron Technology, Inc. Memory device and fabricating method thereof
CN119922955A (zh) * 2023-10-27 2025-05-02 华为技术有限公司 一种半导体器件及电子设备

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6383879B1 (en) 1999-12-03 2002-05-07 Agere Systems Guardian Corp. Semiconductor device having a metal gate with a work function compatible with a semiconductor device
US6531347B1 (en) * 2000-02-08 2003-03-11 Advanced Micro Devices, Inc. Method of making recessed source drains to reduce fringing capacitance
US6448180B2 (en) * 2000-03-09 2002-09-10 Advanced Micro Devices, Inc. Deposition of in-situ doped semiconductor film and undoped semiconductor film in the same reaction chamber
SG103846A1 (en) * 2001-02-28 2004-05-26 Semiconductor Energy Lab A method of manufacturing a semiconductor device
US6518106B2 (en) 2001-05-26 2003-02-11 Motorola, Inc. Semiconductor device and a method therefor
KR100426441B1 (ko) * 2001-11-01 2004-04-14 주식회사 하이닉스반도체 반도체 소자의 시모스(ｃｍｏｓ) 및 그의 제조 방법
US7019351B2 (en) * 2003-03-12 2006-03-28 Micron Technology, Inc. Transistor devices, and methods of forming transistor devices and circuit devices
US7208362B2 (en) * 2003-06-25 2007-04-24 Texas Instruments Incorporated Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel
KR100642747B1 (ko) * 2004-06-22 2006-11-10 삼성전자주식회사 Ｃｍｏｓ 트랜지스터의 제조방법 및 그에 의해 제조된ｃｍｏｓ 트랜지스터
US7112848B2 (en) * 2004-09-13 2006-09-26 Taiwan Semiconductor Manufacturing Company, Ltd. Thin channel MOSFET with source/drain stressors
US7718500B2 (en) * 2005-12-16 2010-05-18 Chartered Semiconductor Manufacturing, Ltd Formation of raised source/drain structures in NFET with embedded SiGe in PFET

Also Published As

Publication number Publication date
US7446026B2 (en) 2008-11-04
WO2007092653A3 (en) 2008-11-06
US20070184601A1 (en) 2007-08-09
WO2007092653A2 (en) 2007-08-16

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