TW200907894A - Pixel circuit - Google Patents

Pixel circuit Download PDF

Info

Publication number
TW200907894A
TW200907894A TW96128204A TW96128204A TW200907894A TW 200907894 A TW200907894 A TW 200907894A TW 96128204 A TW96128204 A TW 96128204A TW 96128204 A TW96128204 A TW 96128204A TW 200907894 A TW200907894 A TW 200907894A
Authority
TW
Taiwan
Prior art keywords
transistor
pixel circuit
receives
control
electrically connected
Prior art date
Application number
TW96128204A
Other languages
Chinese (zh)
Other versions
TWI371736B (en
Inventor
Zhi-Long Lin
Guan-Wen Zhou
Original Assignee
Univ Nat Cheng Kung
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Nat Cheng Kung filed Critical Univ Nat Cheng Kung
Priority to TW96128204A priority Critical patent/TW200907894A/en
Publication of TW200907894A publication Critical patent/TW200907894A/en
Application granted granted Critical
Publication of TWI371736B publication Critical patent/TWI371736B/zh

Links

Landscapes

  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A pixel circuit includes a first transistor, a second transistor, a switch, a capacitor and an OLED. Each transistor has a first terminal, a second terminal and a control terminal for determining whether the first and second terminals are connected with each other. The control terminal of the first transistor is electrically connected to one terminal of the capacitor. The first terminal of the first transistor, the second terminal of the second transistor and the other terminal of the capacitor are electrically connected with one another. The second terminal of the first transistor is electrically connected to the anode of the OLED. The cathode of the OLED receives a scanning signal. The control terminal of the second transistor receives a reference voltage. The first terminal of the second transistor receives a power signal. The switch receives a data voltage and is controlled by the power signal to determine whether to output the data voltage to the control terminal of the first transistor or not.

Description

200907894 九、發明說明: 【發明所屬之技術領域】 本發明是有關於-種像素電路,特別是指一種有機發 光二極體的像素電路。 【先前技術】 由於有機發光二極體(0LED)顯示器具有自發光、亮 度高、反應時間快及視角廣等優點,已逐漸地受到重視及 被使用。 >閱圖 0LED顯示^是藉由複數呈陣列式排列且 可顯現不同色彩的像素電路來達到顯示影像的功能,而且 是逐打或逐列循序掃描該等像素電路來決定每一像素電路 顯現的色形。母一像辛雷攸Aj人 像京電路包含—〇LED 1及-驅動電路2 ’其中’該驅動電路2輸出一嗯叙带 ^ m m 驅動電流Idrive到該OLED 1 ’以使該0LED 1發出強度盥該 驅勤電流Idrive大小相關的 光。 習知的第一種驅動雷 動冤路2包括一第—電晶體2〇1、一第 二電晶體202及一雷女u味 電203。該第一電晶體201及該第二電 晶體202是p型薄膜雷曰 守联电阳體(TFT),且每一電晶體201、 202具有一第— 鸲、一第二端及一決定該第一端及該第二端 是否導通的控制端。 ^第電日曰體201的控制端接收一掃描信I虎SCAN。該 第一電晶體201的筮 χ... 的第—端接收一資料電壓VDAT广該第一電 晶體201的第二婭 ^、讀第二電晶體202的控制端及該電容 203的一端電遠垃 ° s亥第二電晶體202的第一端及該電容 5 200907894 203的另一端電連接,並接收一第一電源電壓VDD。該第二 電晶體202的第二端及該OLED 1的陽極電連接。該OLED 1的陰極接收一第二電源電壓Vss。200907894 IX. Description of the Invention: [Technical Field] The present invention relates to a pixel circuit, and more particularly to a pixel circuit of an organic light-emitting diode. [Prior Art] Since the organic light-emitting diode (0LED) display has advantages such as self-luminous, high brightness, fast reaction time, and wide viewing angle, it has been gradually taken into consideration and used. >Reading the 0LED display ^ is to display the image by a plurality of pixel circuits arranged in an array and showing different colors, and scanning the pixel circuits step by step or column by column to determine the appearance of each pixel circuit Color form. The mother like the Xin Lei AJ person like the Beijing circuit contains - 〇 LED 1 and - drive circuit 2 'where 'the drive circuit 2 outputs a um ^ ^ drive current Idrive to the OLED 1 ' to make the 0LED 1 emit strength 盥The drive current Idrive is related to the size of the light. The first type of driving lightning circuit 2 includes a first transistor 2〇1, a second transistor 202, and a thunderbolt 203. The first transistor 201 and the second transistor 202 are p-type thin film Thunder-conserving electrical anodes (TFTs), and each of the transistors 201, 202 has a first 鸲, a second end, and a second A control end that is conductive at one end and the second end. ^ The control end of the first electric cell 201 receives a scan letter I tiger SCAN. The first end of the first transistor 201 receives a data voltage VDAT, the second transistor of the first transistor 201, the control terminal of the second transistor 202, and one end of the capacitor 203. The first end of the second transistor 202 and the other end of the capacitor 5 200907894 203 are electrically connected and receive a first power voltage VDD. The second end of the second transistor 202 is electrically connected to the anode of the OLED 1. The cathode of the OLED 1 receives a second supply voltage Vss.

該驅動電路2的時序如圖2所示。當該掃描信號SCAN 是低電位時,該第一電晶體201的第一端及第二端導通, 此時,該資料電壓VDATA被傳送到該第二電晶體202的控制 端,且該電容203根據該資料電壓VDATA改變其跨壓。當該 掃描信號SCAN是高電位時,該第一電晶體201的第一端 及第二端不導通,此時,該電容203保持其跨壓。該第二 電晶體202根據該電容203的跨壓,產生該驅動電流IThe timing of the drive circuit 2 is as shown in FIG. 2. When the scan signal SCAN is low, the first end and the second end of the first transistor 201 are turned on. At this time, the data voltage VDATA is transmitted to the control end of the second transistor 202, and the capacitor 203 The cross voltage is changed according to the data voltage VDATA. When the scan signal SCAN is high, the first end and the second end of the first transistor 201 are not turned on. At this time, the capacitor 203 maintains its voltage across. The second transistor 202 generates the driving current I according to the voltage across the capacitor 203.

DRIVE ,如下所示:DRIVE as follows:

其中,W202/L202是該第二電晶體202的寬長比,Wherein, W202/L202 is a width to length ratio of the second transistor 202,

Vc,203 是該電容203的跨壓 ’而 VTH,2〇2 是該第二電晶體202的臨 界電壓(threshold voltage)。 對於使用習知第一種驅動電路2的晝素電路而言,由 於不同的畫素電路之第二電晶體202的臨界電壓會不相同 ,當接收相同的資料電壓V DATA時’不 同的畫素電路所產生 的駆動電流Idrive 會不相同,導致所發出的光之強度也會不 相同。而且,由於每一傳送該第一電源電壓VDD的電源線 通常是依序電連接到多個晝素電路,且該電源線的電阻值 不為0,因電流流過而產生的壓降(IR drop )會使得不同的 6 200907894 I路所接收到的第一電源電壓Vdd不相同,當接收相 问的為料雷厭 J DATA時,不同的畫素電路所產生的驅動電流 drive會不相同導致所發出的光之強度也會不相同。 >閱圖3,習知的第二種驅動電路2,包括一第一電晶體 211、一黛一 及噹★乐—電晶體212及一電容213。該第一電晶體211 μ第二電晶體212是N哲TFT,且每_電晶體2ii、212 具有_宽一 碥、—第二端及一決定該第一端及該第二端是 否導通的控制端。 Λ第電阳體211的控制端接收一掃描信號SCAN。該 晶~電晶體21i的第—端接收—資料電壓%趟。該第一電 211的第—端、該第二電晶體212的控制端及該電容 13的-端電連接。該第二電晶體212的第一端接收一第一 源電壓VDD。3亥第二電晶體212的第二端、該電容⑴的 另一端及該〇LED 1的陽極電連接。該OLED 1的陰極接收 〜第二電源電壓Vss。Vc, 203 is the voltage across the capacitor 203 and VTH, 2 〇 2 is the threshold voltage of the second transistor 202. For a pixel circuit using the conventional first driving circuit 2, since the threshold voltages of the second transistors 202 of different pixel circuits are different, different pixels are received when receiving the same data voltage V DATA . The squirming current Idrive generated by the circuit will be different, resulting in different intensity of the emitted light. Moreover, since each power supply line that transmits the first power supply voltage VDD is usually electrically connected to a plurality of halogen circuits in sequence, and the resistance value of the power supply line is not zero, a voltage drop due to a current flowing (IR) Drop ) will make the first power supply voltage Vdd received by different 6 200907894 I roads different. When receiving the relevant material, the driving current drive generated by different pixel circuits will be different. The intensity of the light emitted will also be different. > Referring to Figure 3, a conventional second driving circuit 2 includes a first transistor 211, a first and a second transistor 212 and a capacitor 213. The first transistor 211 μ second transistor 212 is an N-type TFT, and each of the transistors 2ii, 212 has a width of one 碥, a second end, and a determination of whether the first end and the second end are conductive. Control terminal. The control terminal of the first electrical body 211 receives a scan signal SCAN. The first end of the crystal ~ transistor 21i receives - the data voltage % 趟. The first end of the first electrode 211, the control end of the second transistor 212, and the - terminal of the capacitor 13 are electrically connected. The first end of the second transistor 212 receives a first source voltage VDD. The second end of the second transistor 212 is electrically connected to the other end of the capacitor (1) and the anode of the xenon LED 1. The cathode of the OLED 1 receives a second supply voltage Vss.

β 3亥驅動電路2的時序如圖4所示。當該掃描信號scaN 气高電位時,該第-電晶體211的第—端及第二端導通,此 時,該資料電壓vDAT^傳送到該第二電晶體212的控制端 ,且該電容213根據該資料電壓ν〇ΑΤΑ改變其跨壓。當該掃 私6號SCAN疋低電位時,該第一電晶體a〗的第一端及 第二端不導通,此時,該電容213保持其跨壓。該第二電 晶體212根據該電容213的跨廢,產生該驅動電流—νΕ, &下所示: 200907894 drive^-tMC ~^-(v -V )2 2 ox τ VKC,213 yTH,212/ ^212 __ 1 w / = -ZUnCn ~^l(v -V -v y 2 〇x r ^ DATA y OLED yTH 212 / J2\2 其中,W212/L212是該第二電晶體212的寬長比,v 是該電容213的跨壓’ Vth,2i2是該第二電晶體212的::3 電壓’而V〇led是該OLED 1的跨壓。 對於使用習知第二種驅動電路2,的晝素電路而言,由 於不同的畫素電路之第二電晶體2〇2㈣界電壓會不相同 田接收相同的貝料電麼Vdata時’不同的畫素電路所產生 的驅動電流1°職會不相同,導致所發出的光之強度也會不 相同°而且’每-畫素電路的⑽D i會因為長時間操作而 材料老化,使得其跨壓會逐漸上升,進而導致該畫素電路 所產生的驅動電流Idrive變小。 參閱圖5’為了降低臨界電魔變異及電源電壓塵降的影 響,中華民國發明專利第228696號揭露了習知的第三種驅 動電路2”。該第三種驅動電路2”包括一第一電晶體功、 -第二電晶體222、一第三電晶體223、一第四電晶體224 、-第五電晶體225及一電容226。該第一至該第五電晶體 221〜225是P型TFT,且每一電晶體221〜225具有一第—端 、一第二端及一決定該第一端及該第二端是否導通的控制 端。 該第一電晶體221的控制端接收一目前掃描信號 SCANk。5亥第一電晶體22!的第一端接收—資料電壓 »亥第一電晶體221的第二端及該第二電晶體222的第— 200907894 端電連接(以下稱為A點)。該第二電晶體222的控制端、 該第二電晶體222的第二端、該第三電晶體223的第一端 、該第四電晶體224的控制端及該電容226的一端電連接 (以下稱為B點)。該第三電晶體223的控制端接收一先前 掃描訊號SCANu。該第三電晶體223的第二端接收一地電 壓。該第四電晶體224的第一端及該電容226的另一端電 連接,且接收一第一電源電壓VDD。該第四電晶體224的第 二端及該第五電晶體225的第一端電連接。該第五電晶體 225的控制端接收一控制信號CTRL。該第五電晶體225的 第二端及該OLED 1的陽極電連接。該OLED 1的陰極接收 一第二電源電壓Vss。 該驅動電路2”的時序如圖6所示。當該先前掃描信號 SCANy是低電位、該目前掃描信號SCANk是高電位而該 控制信號CTRL是高電位時,該第三電晶體223的第一端及 第二端導通,該第一電晶體221的第一端及第二端不導通 ,而該第五電晶體225的第一端及第二端不導通,此時, 該地電壓被傳送到B點,且該第四電晶體224不產生該驅 動電流Idrive。 當該先前掃描信號SCANk-i是南電位、該目前掃描信號 SCANk是低電位而該控制信號CTRL是高電位時,該第三 電晶體223的第一端及第二端不導通,該第一電晶體221 的第一端及第二端導通,而該第五電晶體225的第一端及 第二端不導通’此時’該資料電壓Vdata被傳送到A點’ 並透過該第二電晶體222提高B點的電壓,直到B點的電 200907894The timing of the β 3 hai drive circuit 2 is as shown in FIG. 4 . When the scan signal scaN is at a high potential, the first end and the second end of the first transistor 211 are turned on. At this time, the data voltage vDAT^ is transmitted to the control end of the second transistor 212, and the capacitor 213 The voltage across the data is changed according to the voltage ν〇ΑΤΑ. When the SCAN of the SUV is low, the first end and the second end of the first transistor a are not turned on. At this time, the capacitor 213 maintains its voltage across. The second transistor 212 generates the driving current according to the cross-dissipation of the capacitor 213, and the driving current is generated as follows: 200907894 drive^-tMC ~^-(v -V )2 2 ox τ VKC, 213 yTH, 212 / ^212 __ 1 w / = -ZUnCn ~^l(v -V -vy 2 〇xr ^ DATA y OLED yTH 212 / J2\2 where W212/L212 is the aspect ratio of the second transistor 212, v It is the voltage across the capacitor 213 'Vth, 2i2 is the voltage of the second transistor 212::3, and V〇led is the voltage across the OLED 1. For the use of the conventional second driving circuit 2, the halogen In terms of the circuit, since the voltage of the second transistor 2〇2(4) of different pixel circuits will be different, the same bedding power is received. When Vdata is used, the driving current generated by the different pixel circuits is different. , the intensity of the emitted light will be different. And 'the (10)D i of each pixel circuit will age due to long-term operation, so that the voltage across it will gradually rise, which will lead to the driving of the pixel circuit. The current Idrive becomes smaller. Referring to Figure 5', in order to reduce the influence of the critical electric magic variation and the power supply voltage dust drop, the Republic of China invention patent No. 228696 A third type of driving circuit 2" is disclosed. The third driving circuit 2" includes a first transistor, a second transistor 222, a third transistor 223, a fourth transistor 224, a fifth transistor 225 and a capacitor 226. The first to fifth transistors 221 225 225 are P-type TFTs, and each of the transistors 221 225 225 has a first end, a second end, and a The first end and the second end are connected to the control end. The control end of the first transistor 221 receives a current scan signal SCANk. The first end of the first transistor 22! receives the data voltage. The second end of the transistor 221 and the first -200907894 end of the second transistor 222 are electrically connected (hereinafter referred to as point A). The control end of the second transistor 222, the second end of the second transistor 222, The first end of the third transistor 223, the control end of the fourth transistor 224, and one end of the capacitor 226 are electrically connected (hereinafter referred to as point B.) The control terminal of the third transistor 223 receives a previous scan signal. The second end of the third transistor 223 receives a ground voltage. The first end of the fourth transistor 224 and the The other end of the capacitor 226 is electrically connected to receive a first power supply voltage VDD. The second end of the fourth transistor 224 is electrically connected to the first end of the fifth transistor 225. The control end of the fifth transistor 225 A control signal CTRL is received. The second end of the fifth transistor 225 is electrically connected to the anode of the OLED 1. The cathode of the OLED 1 receives a second supply voltage Vss. The timing of the driving circuit 2" is as shown in Fig. 6. When the previous scanning signal SCANy is low, the current scanning signal SCANk is high and the control signal CTRL is high, the first of the third transistor 223 The first end and the second end of the first transistor 221 are not turned on, and the first end and the second end of the fifth transistor 225 are not turned on. At this time, the ground voltage is transmitted. Go to point B, and the driving current Idrive is not generated by the fourth transistor 224. When the previous scanning signal SCANk-i is the south potential, the current scanning signal SCANk is low, and the control signal CTRL is high, the first The first end and the second end of the first transistor 221 are not turned on, and the first end and the second end of the first transistor 221 are turned on, and the first end and the second end of the fifth transistor 225 are not turned on. When the 'data voltage Vdata is transmitted to point A' and the voltage of point B is raised through the second transistor 222 until the power at point B is 200907894

壓=該資料電壓VDATA-|該第二電晶體222的臨界電壓I,且 該第四電晶體224不產生該驅動電流I DRIVE ° 當該先前掃描信號SCANw是高電位、該目前掃描信號 SCANk是高電位而該控制信號CTRL是低電位時,該第三 電晶體223的第一端及第二端不導通,該第一電晶體221 的第一端及第二端不導通,而該第五電晶體225的第一端 及第二端導通,此時,該電容226保持其跨壓,且該第四 電晶體224根據該電容226的跨壓,產生該驅動電流 Idrive *如下戶斤示·Voltage=the data voltage VDATA-|the threshold voltage I of the second transistor 222, and the fourth transistor 224 does not generate the driving current I DRIVE ° When the previous scan signal SCANw is high, the current scan signal SCANk is When the control signal CTRL is low, the first end and the second end of the third transistor 223 are not turned on, and the first end and the second end of the first transistor 221 are not turned on, and the fifth The first end and the second end of the transistor 225 are turned on. At this time, the capacitor 226 maintains its voltage across the capacitor, and the fourth transistor 224 generates the driving current Idrive according to the voltage across the capacitor 226.

其中,W224/L224是該第四電晶體224的寬長比,V C,226 是該電容226的跨壓,VB是B點的電壓,VTH,224是該第四 電晶體224的臨界電壓’而Vth,222是該第二電晶體222的 臨界電壓。由於該第二電晶體222與該第四電晶體224的 位置非常接近,其等的臨界電壓可視為相同,因此, T DRIVE = 5 M pCox — 224 ’(^DD-^DATA)。 224 對於使用習知第三種驅動電路2”的晝素電路而言,每 一畫素電路的第四電晶體224的臨界電壓對該驅動電流 Idrive 的影響會被該晝素電路的第二電晶體222的臨界電壓 10 200907894 消除。而且,藉士 a 口雷、卓㈣,母—傳送該第—電源電M ^的電源線 ⑼接收相同描掃信號SCANk·,、SCANk的畫素 電路,由於該箸查主^ ~ a素電路是同時被寫入資料電壓VD 钆 此時不會產生驅動 A且 览机Idrive ’流過該電源線的電流為〇, 使得該等畫素雷败 ^ /、電路所接收到的第一電源電壓VDD相同,可 X '肖除4第—電源電壓VDD的壓降對該等晝素電路之電容 :壓的影響。當接收相同的資料電壓VDATA時,不同的 旦素电路所產生的驅動電流會相同,導致所發出的光 之強度也會相同。 雖然该第三種驅動電路2”可以降低臨界電壓變異及電 源電壓壓降的影響,但是卻較該第—種驅動電@ 2及該第 一種驅動電路2,多使用三個電晶體,使得該OLED顯示器 的開口率(aperture ratio )(即有效發光顯示區域所佔的面 積比率)下降,造成光的使用效率變差。 【發明内容】 因此’本發明之目的即在提供一種像素電路,可以補 償臨界電壓變異的影響及消除電源電壓壓降的影響,且提 高開口率及0LED的使用壽命。 於是,本發明像素電路包含一第一電晶體、一第二電 晶體、一開關、一電容及一 0LED。每一電晶體具有一第一 端、一第二端及一決定該第一端及該第二端是否導通的控 制端。 該第一電晶體的控制端及該電容的一端電連接。該第 一電晶體的第一端、該第二電晶體的第二端及該電容的另 11 200907894 一端電連接。該第一電晶體的第二端及該OLED的陽極電 連接。a玄0LED的陰極接收一掃描信號。該第二電晶體的 控制端接收一參考電壓。該第二電晶體的第一端接收一電 源信號。該開關接收一資料電壓,並受該電源信號控制, 以決定是否輸出該資料電壓到該第一電晶體的控制端。 本發明之另一目的即在提供一種像素電路,可以補償 臨界電壓變異的影響及消除電源電壓壓降的影響。 於疋’本發明像素電路包含一第一電晶體、一第二電 晶體、一開關、一電容及一發光元件。每一電晶體具有一 第一鈿、一第一端及一決定該第一端及該第二端是否導通 的控制端。該發光元件具有一陽極及一陰極。 該第一電晶體的控制端及該電容的一端電連接。該第 一電晶體的第一端、該第二電晶體的第二端及該電容的另 —端電連接。該第一電晶體的第二端及該發光元件的陽極 電連接。該發光元件的陰極接收一掃描信號。該第二電晶 體的控制端接收-參考電壓。該第三電晶體的第—端接收 一電源信號。該開關接收—資料電壓,並受該電源信號控 制,以決定是否輸出該資料電壓到該第一電晶體的控制端 〇 本發明之另一目的即在提供一種像素電路,可以補償 臣™界電壓變異的影響及消除〇LED老化的影響,且提高開 口率及0LED的使用壽命。 於是,本發明像素電路包含一第一電晶體、一第二電 晶體、一開關、—電容及—OLED。每-電晶體具有-第_ 12 200907894 鳊、一第二端及一決定該第一端及該第二端是否導通的控 制端。 該第一電晶體的控制端及該電容的一端電連接。該第 一電晶體的第一端接收一電源信號。該第一電晶體的第二 端、該第二電晶體的第一端及該電容的另一端電連接。該 第二電晶體的控制端接收一參考電壓。該第二電晶體的第 一鈿及该OLED的陽極電連接。該〇led的陰極接收一掃 描信號◊該開關接收一資料電壓,並受該電源信號控制, 以決定是否輸出該資料電壓到該第一電晶體的控制端。 本發明之另一目的即在提供一種像素電路,可以補償 臨界電壓變異的影響及消除發光元件老化的影響。 於疋,本發明像素電路包含一第一電晶體、一第二電 晶體、一開關、一電容及一發光元件。每一電晶體具有一 第一端、一第二端及一決定該第一端及該第二端是否導通 的控制端。該發光元件具有一陽極及—陰極。 該第一電晶體的控制端及該電容的—端電連接。該第 一電晶體的第一端接收一電源信號。該第一電晶體的第二 端、該第二電晶體的第一端及該電容的另一端電連接。該 第二電晶體的控制端接收一參考電壓。該第二電晶體的第 二端及該發光元件的陽極電連接。該發光元件的陰極接收 -掃描信號。該開關接收一資料電壓,並受該電源信號控 制,以決定是否輸出該資料電壓到該第—電晶體的控制: 〇 【實施方式】 13 200907894 有關本發 以下配合參考 清楚地呈現。 明之前述及其他技術内容、特點與功效 圖式之二個較佳實施例的詳細說明中, ,在 將可 7 ’本發明像素電路之第一較佳實施例包含一 一電晶體31、. η ^ 弟一電晶體32、一開關30、一電容34月 一 OLED 35。兮 ^ h »亥開關30包括一第三電晶體33。該第— 第三電晶體31〜3 ^ 3疋P型TFT,且每一電晶體31〜33且 一第一端、一筮山 弟一知及一決定該第一端及該第二端是否導 通的控制端。 * S亥第二電晶體33的控制端及該第二電晶冑32的第一 端電連接’並接收-電源信號PVDD。該第三電晶體33的 第端接收資料電廢Vdata。該第三電晶體Μ的第二端 、該第-電晶體31的控制端及該電容34的—端電連接( 以下稱為C點)。該第一電晶體31的第一端、該第二電晶 體32的第二端及該電容34的另—端電連接(以下稱為d 點)。該第-電晶it 31的第二端及該〇LED 35的陽極電連 接。該OLED 35的陰極接收一掃描信號SCan。該第二電 晶體32的控制端接收一參考電壓vre。 該第一較佳實施例的時序如圖8所示,可以分為三個 階段: I.準備階段 當該電源信號PVDD是高電位且該掃 高電位時,該第三電晶體33的第一端及第二端;導通,: 該第二電晶體32的第-端及第二端導通’此時,d點的電 14 200907894 壓-該電源信號古 且該第-電曰體 、内‘位,該電容34保持其跨壓, WE。ΘΗ 丨產生-驅動該〇LE〇35的驅動電流 II·資料輸入階段 當該電源信號PVDD县彻φ / 疋低電位而該掃描仿妹d r1 δ at b 高電位時,該第三電 ▼抱1。说SCAN是 第-電日!* Μ 日日 、第一端及第二端導通,而該 禾一 €日日體32的第一唑这哲 感、, 第二端不導通,此時,該資料雷 壓Vdata被傳送到c軟,η机 町4貝tf電 的古點的電壓從該電源信號PVDD 的间電位被降低至該參考電 襄H β八 REF 1该苐二電晶體32的臨 界電壓卜該OLED 35被反向偏壓 產生該驅動雪4 T 每反且6亥第—電晶體31不 庄土成細劫冤成Idrive。 ΙΠ.發光階段 當該電源信號PVDD是其番办t 4 # 疋阿電位而該掃描信號SCAN是 低電位時’該第三電晶體33的第一端及第二端不導通,而 該第二電晶體32的第-端及第二端導通,此時,該電容μ 保持其跨壓,$〇哪35被順向偏壓,且該第—電晶體η 產生該驅動電流Idrive,如下所示: 2MpC〇xWherein, W224/L224 is the width to length ratio of the fourth transistor 224, VC, 226 is the voltage across the capacitor 226, VB is the voltage at point B, and VTH, 224 is the threshold voltage of the fourth transistor 224. Vth, 222 is the threshold voltage of the second transistor 222. Since the position of the second transistor 222 and the fourth transistor 224 are very close, the threshold voltages thereof can be regarded as the same, and therefore, T DRIVE = 5 M pCox - 224 '(^DD-^DATA). 224. For a pixel circuit using the conventional third driving circuit 2", the influence of the threshold voltage of the fourth transistor 224 of each pixel circuit on the driving current Idrive is affected by the second power of the pixel circuit. The threshold voltage 10 200907894 of the crystal 222 is eliminated. Moreover, the power line (9) transmitting the first power supply M ^ receives the same scanning signal SCANk·, SCANk pixel circuit due to the power supply (4) The circuit of the main circuit is written to the data voltage VD at the same time, and the current of the driver A is not generated, and the current flowing through the power line of the browser Idrive is 〇, so that the pixels are defeated. The first power supply voltage VDD received by the circuit is the same, and the voltage drop of the first power supply voltage VDD can be divided into four: the capacitance of the voltage circuit: the influence of the voltage. When receiving the same data voltage VDATA, different The driving current generated by the denier circuit will be the same, resulting in the same intensity of the emitted light. Although the third driving circuit 2" can reduce the influence of the threshold voltage variation and the voltage drop of the power supply voltage, it is better than the first Drive electric @ 2 and the first A driving circuit 2 that uses three transistors in a large amount such that an aperture ratio (i.e., an area ratio of an effective light-emitting display area) of the OLED display is lowered, resulting in deterioration of light use efficiency. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a pixel circuit that compensates for the effects of threshold voltage variation and eliminates the effects of voltage drop of the power supply voltage, and increases the aperture ratio and the lifetime of the OLED. Therefore, the pixel circuit of the present invention comprises a first transistor, a second transistor, a switch, a capacitor and an LED. Each of the transistors has a first end, a second end, and a control end that determines whether the first end and the second end are conductive. The control end of the first transistor and one end of the capacitor are electrically connected. The first end of the first transistor, the second end of the second transistor, and the other end of the capacitor 200907894 are electrically connected. The second end of the first transistor is electrically connected to the anode of the OLED. The cathode of a myo 0LED receives a scan signal. The control terminal of the second transistor receives a reference voltage. A first end of the second transistor receives a power signal. The switch receives a data voltage and is controlled by the power signal to determine whether to output the data voltage to the control terminal of the first transistor. Another object of the present invention is to provide a pixel circuit that compensates for the effects of threshold voltage variations and eliminates the effects of supply voltage drop. The pixel circuit of the present invention comprises a first transistor, a second transistor, a switch, a capacitor and a light-emitting element. Each of the transistors has a first turn, a first end, and a control end that determines whether the first end and the second end are conductive. The light emitting element has an anode and a cathode. The control end of the first transistor and one end of the capacitor are electrically connected. The first end of the first transistor, the second end of the second transistor, and the other end of the capacitor are electrically connected. The second end of the first transistor is electrically connected to the anode of the light emitting element. The cathode of the light emitting element receives a scan signal. The control terminal of the second transistor receives a reference voltage. The first terminal of the third transistor receives a power signal. The switch receives the data voltage and is controlled by the power signal to determine whether to output the data voltage to the control terminal of the first transistor. Another object of the present invention is to provide a pixel circuit capable of compensating for the voltage of the junction boundary The effect of variation and the elimination of the effects of aging of LEDs, and increased aperture ratio and OLED lifetime. Thus, the pixel circuit of the present invention comprises a first transistor, a second transistor, a switch, a capacitor, and an OLED. Each transistor has a - _ 12 200907894 鳊, a second terminal and a control terminal that determines whether the first terminal and the second terminal are conductive. The control end of the first transistor and one end of the capacitor are electrically connected. The first end of the first transistor receives a power signal. The second end of the first transistor, the first end of the second transistor, and the other end of the capacitor are electrically connected. The control terminal of the second transistor receives a reference voltage. The first turn of the second transistor and the anode of the OLED are electrically connected. The cathode of the LED receives a scan signal, and the switch receives a data voltage and is controlled by the power signal to determine whether to output the data voltage to the control terminal of the first transistor. Another object of the present invention is to provide a pixel circuit that compensates for the effects of threshold voltage variations and eliminates the effects of aging of the light-emitting elements. In the present invention, the pixel circuit of the present invention comprises a first transistor, a second transistor, a switch, a capacitor and a light-emitting element. Each of the transistors has a first end, a second end, and a control end that determines whether the first end and the second end are conductive. The light emitting element has an anode and a cathode. The control end of the first transistor is electrically connected to the terminal of the capacitor. The first end of the first transistor receives a power signal. The second end of the first transistor, the first end of the second transistor, and the other end of the capacitor are electrically connected. The control terminal of the second transistor receives a reference voltage. The second end of the second transistor is electrically connected to the anode of the light emitting element. The cathode of the illuminating element receives a -scan signal. The switch receives a data voltage and is controlled by the power signal to determine whether to output the data voltage to the control of the first transistor: 〇 [Embodiment] 13 200907894 Related to the present invention The following reference is clearly presented. In the detailed description of the two preferred embodiments of the foregoing and other technical contents, features and power diagrams, the first preferred embodiment of the pixel circuit of the present invention comprises a transistor 31, . ^ Brother a transistor 32, a switch 30, a capacitor 34 months OLED 35. The 开关 ^ h » hai switch 30 includes a third transistor 33. The first to third transistors 31 to 3 ^ 3 疋 P-type TFTs, and each of the transistors 31 to 33 and a first end, a 筮山弟 know and determine whether the first end and the second end The control terminal that is turned on. * The control terminal of the second transistor 33 and the first terminal of the second transistor 32 are electrically connected 'and receive the power supply signal PVDD. The first end of the third transistor 33 receives the data waste Vdata. The second end of the third transistor 、, the control terminal of the first transistor 31, and the terminal of the capacitor 34 are electrically connected (hereinafter referred to as point C). The first end of the first transistor 31, the second end of the second transistor 32, and the other end of the capacitor 34 are electrically connected (hereinafter referred to as point d). The second end of the first electro-optic crystal unit 31 and the anode of the x-ray LED 35 are electrically connected. The cathode of the OLED 35 receives a scan signal SCan. The control terminal of the second transistor 32 receives a reference voltage vre. The timing of the first preferred embodiment is as shown in FIG. 8, and can be divided into three phases: I. Preparation phase When the power supply signal PVDD is high and the sweep potential is high, the first of the third transistor 33 And the second end; the conduction, the second end of the second transistor 32 is electrically connected to the second end of the second transistor 32. At this time, the power of the d point is 14 200907894 - the power signal is ancient and the first electric body, the inner Bit, the capacitor 34 maintains its crossover, WE. ΘΗ 丨 generates-drives the driving current of the 〇LE〇35. II. Data input stage. When the power supply signal PVDD is φ / 疋 low and the scanning analogy d r1 δ at b is high, the third electric 1. Say SCAN is the first - electricity day! * Μ Day, the first end and the second end are turned on, and the first azole of the Japanese body 32 is philosophical, and the second end is not conductive. At this time, the data pressure Vdata is transmitted to the c. Soft, the voltage of the ancient point of the 4th tf electric power of the η machine is reduced from the potential of the power supply signal PVDD to the reference voltage H β VIII 1 The critical voltage of the second transistor 32 is reversed The bias voltage produces the drive snow 4 T per reverse and 6 haidi - the transistor 31 does not become a fine robber into Idrive.发光. Illumination phase When the power signal PVDD is its potential t 4 # 疋 A potential and the scan signal SCAN is low, the first end and the second end of the third transistor 33 are not conducting, and the second The first end and the second end of the transistor 32 are turned on. At this time, the capacitor μ maintains its voltage across, and the voltage 35 is forward biased, and the first transistor η generates the driving current Idrive, as shown below. : 2MpC〇x

T DRIVET DRIVE

、34 -|厂ττ/,31 丨 data, 34 -|factory ττ/,31 丨 data

K 77/,31 其中,w31/l31是該第_電晶體31的寬長比,v^是 該電容34的跨壓,VTH,31是該第—電晶體31的臨界電壓, 而VTH’32是該第二電晶體32的臨界電壓。由於該第一電晶 體Μ與該第二電晶體32的位置非常接近其等的臨界電 15 200907894 壓可視為相同,因此,K 77/, 31 wherein w31/l31 is the aspect ratio of the first transistor 31, v^ is the voltage across the capacitor 34, VTH, 31 is the threshold voltage of the first transistor 31, and VTH'32 It is the threshold voltage of the second transistor 32. Since the position of the first transistor Μ and the second transistor 32 is very close to its critical voltage, the pressure can be regarded as the same, therefore,

DRIVE 2DRIVE 2

Mpch-V麵)2Mpch-V surface) 2

L 31 在每一畫素電路中,該第一電晶體31的臨界電壓對該 驅動電流IDRIVE的影響會被該第二電晶體;32的臨界電壓消 除。而且,由於每一傳送該參考電壓VREF的信號線不會有 電流流過,該參考電壓VREF不會產生壓降,使得不同的晝 素電路所接收到的參考電壓VREF相同。當接收相同的資料 電壓VDATA時’不 同的晝素電路所產生的驅動電流I DRIVE 會 相同,導致所發出的光之強度也會相同。 當該電源信號PVDD的高電位=9V,該電源信號PVDD 的低電位=-18V,該掃描信號SCAN的高電位=9V,該掃描 信號SCAN的低電位=-6V,該參考電壓=-6V,該資料電壓 VDATA=-6.25V〜-8.75V,該第一電晶體 31的寬長比 =4μιη/25μηι,該第二電晶體32的寬長比=4μιη/60μηι,該第 三電晶體33的寬長比=4μιη/4μιη,該電容34的電容值 =0.5pF,且該等電晶體31〜33的臨界電壓偏移是0V、-0.3V 及+ 0.3 V時’該驅動電流ID RIV E的模擬結果如圖9所不。由 圖9可知,本實施例確實可以使不同的畫素電路所產生的 驅動電流Idrive相同。 值得注意的是,本實施例除了用於驅動該OLED 35之 外,也可以用於驅動其它受電流驅動的發光元件,例如發 光二極體(LED),且該等電晶體31〜33除了是P型TFT 之外,也可以是P型金屬氧化物半導體(PMOS)。 16 200907894 參閱圖10,本發明像辛雷 第— ^ 路之第一較佳實施例包含一 弟電晶體41、一第二電晶體 月—^ 电日日體42、—開關40、一電容44 ◦led 45。該開關4〇包衽—筮-兩η 诗馇_ 第二電晶體43。該第一及 °〆弟一電晶體41、42是Ν型tft,#结 ^ 疋ίΝ圭TFT ,該弟三電晶體43是Ρ 土 ur,且每一電晶體41〜43 一^具有一弟—端、一第二端及 -決定該第-端及該第二端是否導通的控制端。 ⑼該第三電晶體43的控制端及該第一電晶體41的第一 =书連接’並接收-電源信號PVDD。該第三電晶體43的 第端接收一貝料電壓Vdata。該第三電晶體的第二端 、s亥第一電晶體41的控制端及該電容44的一端電連接( 、下稱為E點)。s亥第一電晶體4丨的第二端、該第二電晶 體42的第一端及該電容44的另一端電連接(以下稱為f 點)。s亥第二電晶體42的控制端接收一參考電壓Vrej^該 第一電阳體42的第二端及該〇LED 45的陽極電連接。該 OLED 45的陰極接收一掃描信號scan。 5亥第二較佳實施例的時序如圖11所示,可以分為三個 階段: I·準備階段L 31 In each pixel circuit, the influence of the threshold voltage of the first transistor 31 on the driving current IDRIVE is eliminated by the threshold voltage of the second transistor; Moreover, since each of the signal lines transmitting the reference voltage VREF does not have a current flowing, the reference voltage VREF does not generate a voltage drop, so that the reference voltage VREF received by the different pixel circuits is the same. When receiving the same data voltage VDATA, the drive current I DRIVE generated by the different pixel circuits will be the same, resulting in the same intensity of the emitted light. When the high potential of the power supply signal PVDD = 9V, the low potential of the power supply signal PVDD = -18V, the high potential of the scan signal SCAN = 9V, the low potential of the scan signal SCAN = -6V, the reference voltage = -6V, The data voltage VDATA=-6.25V~-8.75V, the width ratio of the first transistor 31=4μιη/25μηι, the width ratio of the second transistor 32=4μιη/60μηι, the third transistor 33 The width to length ratio = 4μιη / 4μιη, the capacitance value of the capacitor 34 = 0.5pF, and the threshold voltage offset of the transistors 31 to 33 is 0V, -0.3V and +0.3 V 'the driving current ID RIV E The simulation results are shown in Figure 9. As can be seen from Fig. 9, this embodiment can surely make the driving current Idrive generated by different pixel circuits the same. It should be noted that this embodiment can be used to drive other current-driven light-emitting elements, such as light-emitting diodes (LEDs), in addition to driving the OLED 35, and the transistors 31 to 33 are in addition to In addition to the P-type TFT, a P-type metal oxide semiconductor (PMOS) may also be used. 16 200907894 Referring to FIG. 10, the first preferred embodiment of the present invention, such as the Sinley-Technology, includes a transistor 41, a second transistor, a solar cell, a switch 40, and a capacitor 44. ◦led 45. The switch 4 is 〇-衽-two η 馇 馇 _ second transistor 43. The first and the lower brothers a transistor 41, 42 are Ν type tft, #结^ 疋ίΝ圭 TFT, the third transistor 43 is the earth ur, and each transistor 41~43 has a brother a terminal, a second terminal, and a control terminal that determines whether the first terminal and the second terminal are conductive. (9) The control terminal of the third transistor 43 and the first transistor connection of the first transistor 41 and receive the power supply signal PVDD. The first end of the third transistor 43 receives a billet voltage Vdata. The second end of the third transistor, the control end of the first transistor 41 and the one end of the capacitor 44 are electrically connected (hereinafter referred to as point E). The second end of the first transistor 4A, the first end of the second transistor 42, and the other end of the capacitor 44 are electrically connected (hereinafter referred to as point f). The control terminal of the second transistor 42 receives a reference voltage Vrej, and the second end of the first electrical body 42 and the anode of the LED 45 are electrically connected. The cathode of the OLED 45 receives a scan signal scan. The timing of the second preferred embodiment of FIG. 5 is as shown in FIG. 11 and can be divided into three stages: I. Preparation stage

當該電源信號PVDD是低電位且該掃描信號SCAN是 低電位時’該第三電晶體43的第一端及第二端導通,且該 第二電晶體42的第一端及第二端導通,此時,該資料電壓 vdata被傳送到E點,F點的電壓=該掃描信號SC AN的低 電位+該OLED 45的跨壓,該OLED 45被順向偏壓,且該 第一電晶體41不產生一驅動該〇leD 45的驅動電流IDRIVE 17 200907894 II.資料輸入階段 當§亥電源信號PVDD是低電位而該掃描信號SCAN是 问電位時’该第三電晶體43 #第一端及第二端導通,而該 苐-電晶體42的第—端及第二端不導通,此時,該資料電 壓vDATA被傳送到E點,F點的電餘該掃描信號的 低電位+該OLED 45的瘀懕妯扭古s #点心 的5望被知回至该參考電壓vREF_該第 一電晶體42的臨界電壓,續〇τ Ρ1Ί 4 ,电&忒ULED 45被反向偏壓,且該第 一電晶體41不產生該驅動電流Idrive。 ΙΠ.發光階段 當該電源信號PVDD县古蕾# — 4身, υ疋间電位而該知描信號SCAN是 低電位時,該第二雷曰與12 & — 電曰曰體43的第-端及第二端不導通,而 〜第一電晶體42的第一端《笼_·#道、s J ^鲕及弟一端導通,此時,該電容44 跨壓,㈣㈣45被順向錢,且該第—電晶體Μ 生"亥艇動電流Lrive,如下所示: [drive 2^Cox^-(vc44-Vm4lf 2 ’兔When the power signal PVDD is low and the scan signal SCAN is low, the first end and the second end of the third transistor 43 are turned on, and the first end and the second end of the second transistor 42 are turned on. At this time, the data voltage vdata is transmitted to the E point, the voltage of the F point = the low potential of the scan signal SC AN + the voltage across the OLED 45, the OLED 45 is forward biased, and the first transistor 41 does not generate a drive current for driving the 〇leD 45 IDRIVE 17 200907894 II. Data input phase when the § hai power signal PVDD is low and the scan signal SCAN is the potential, 'the third transistor 43 # first end and The second end is turned on, and the first end and the second end of the 苐-transistor 42 are not turned on. At this time, the data voltage vDATA is transmitted to the E point, and the energy of the F point is low of the scan signal + the OLED The 5th look of 45 is known to return to the reference voltage vREF_ the threshold voltage of the first transistor 42, continued 〇τ Ρ1Ί 4, the electric & ULED 45 is reverse biased, And the first transistor 41 does not generate the driving current Idrive.发光. Illumination phase When the power signal PVDD county Gulei # 4 body, the inter-turn potential and the known signal SCAN is low, the second thunder and 12 & - the first body of the electric body 43 The terminal and the second end are not conductive, and the first end of the first transistor 42 "cage_·# channel, s J ^鲕 and the other end of the body are turned on. At this time, the capacitor 44 crosses the pressure, and (4) (four) 45 is turned to the money. And the first - transistor twins "Hills current Lrive, as follows: [drive 2^Cox^-(vc44-Vm4lf 2 'Rabbit

L ΤΑ '41 + VTH, ,42 Λ41, 其中,W41/L4i是該第一電晶體4 3 該電容44的於厭,, 長比Vc,44疋 而ν θ 4,VtH’41是該第一電晶體4!的臨界電塵, 體:1 …亥第二電晶體42的臨界電壓。由於該第-電晶 ,、該第二電晶體42的位置非常接 屢可視為相同,因此, 料其專的臨界電 18 200907894 I drlL ΤΑ '41 + VTH, , 42 Λ 41, where W41/L4i is the first transistor 4 3 of the capacitor 44, the length ratio Vc, 44 疋 and ν θ 4, VtH'41 is the first The critical electric dust of the transistor 4!, the body: 1 ... the threshold voltage of the second transistor 42. Due to the first-electrode crystal, the position of the second transistor 42 is very similar and can be regarded as the same. Therefore, the special critical voltage is 18 200907894 I drl

VE 2 ^η^οχ~^~(νϋΑΤΑ ~^REF )2 ^41 在母一晝素電路中,該第―電晶體41的臨界電壓對該 驅動電流IDRIVE的影響會被該第二電晶冑42的臨界電壓消 除田接收相同的育料電壓Vdata日夺,不同的畫素電路所產 生的驅動電流IDRIVE會相同,導致所發出的光之強度也會相 同而且♦畫素電路所產生的驅動電流IDRIVE不受該 OLED 45的跨壓影響,丨會因為該〇led 45材料老化而導 致該驅動電流idrive變小。 值得注意的是,本實施例除了用於驅動該QLED 45之 外’也可以用於驅動其它受電流驅動的發光元件,例如發 一才"體(LED )’且該等電晶體Μ、42除了是n型tft 之外也可以型金屬氧化物半導體(NM〇s),而該電 晶體43除了是P型TFT之外,也可以是pM〇s。 歸納上述,本發明的該等實施例可以消除該第一電晶 體的臨界電壓變異對該驅動電流b職的影響,也可以消除 電源電壓壓降或該〇LED老化對該驅動電流的影響。 另外,本發明的該等實施例較利用習知的第三種驅動電路 之像素電路少使用二個電晶體,可以提高開口率。而且, 本發明的該等實施例會使該〇LED在一段時間内被反向偏 壓’可以釋放該0LED内部累積的電荷,以提高該〇咖 的使用壽命。因此確實能達到本發明之目的。 ί隹以上所述者,僅為本發明之較佳實施例而已,當不 能以此限定本發明實施之範圍,即大凡依本發明申請專利 19 200907894 範圍及發明說明内容所作之簡 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 單的專效變化與修飾 皆仍 圖1是一種習知的像素電路之電路圖 圖2是圖1的像素電路之時序圖. 圖3是另一種習知的像素電路之電路圖; 圖4是圖3的像素電路之時序圖; 圖5是又一種習知的像素電路之電路圖; 圖6是圖5的像素電路之時序圖; 圖7是本發明像素電路的第-較佳實施例之電路 圖8是該第一較佳實施例之時序圖; 圖9是該第一較佳實施例之模擬圖; 1〇是本發明的第二較佳實施例之電路圖; U是該第二較佳實施例之時序圖 20 200907894 【主要元件符號說明】 3 0.........開關 31〜33····電晶體 34 .........電容VE 2 ^η^οχ~^~(νϋΑΤΑ ~^REF ) 2 ^41 In the mother-single circuit, the influence of the threshold voltage of the first transistor 41 on the driving current IDRIVE is affected by the second transistor The threshold voltage elimination field of 42 receives the same feed voltage Vdata, and the drive current IDRIVE generated by different pixel circuits will be the same, resulting in the same intensity of the emitted light and the drive current generated by the pixel circuit. IDRIVE is not affected by the voltage across the OLED 45, and the drive current idrive becomes smaller due to the aging of the 〇led 45 material. It should be noted that this embodiment can be used to drive other current-driven light-emitting elements, such as the one-handed body (LED), in addition to driving the QLED 45, and the transistors Μ, 42 In addition to the n-type tft, a metal oxide semiconductor (NM〇s) may be used, and the transistor 43 may be pM〇s in addition to the P-type TFT. In summary, the embodiments of the present invention can eliminate the effect of the threshold voltage variation of the first transistor on the driving current, and can also eliminate the voltage drop of the power supply or the effect of the LED aging on the driving current. Further, the embodiments of the present invention can increase the aperture ratio by using two transistors less than the pixel circuit of the conventional third driving circuit. Moreover, the embodiments of the present invention cause the xenon LED to be reverse biased over a period of time to release the charge accumulated within the OLED to increase the useful life of the enamel. Therefore, the object of the present invention can be achieved. The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the invention is based on the scope of the invention and the scope of the invention. Within the scope of coverage. [Simple diagram description] Single specific effect change and modification are still shown in Fig. 1 is a circuit diagram of a conventional pixel circuit. Fig. 2 is a timing chart of the pixel circuit of Fig. 1. Fig. 3 is a circuit diagram of another conventional pixel circuit. 4 is a timing diagram of a pixel circuit of FIG. 3; FIG. 5 is a circuit diagram of another conventional pixel circuit; FIG. 6 is a timing chart of the pixel circuit of FIG. FIG. 8 is a timing diagram of the first preferred embodiment; FIG. 9 is a schematic diagram of the first preferred embodiment; FIG. 9 is a circuit diagram of a second preferred embodiment of the present invention; Timing diagram of the second preferred embodiment 20 200907894 [Description of main component symbols] 3 0......switch 31~33····Optosystem 34 .........capacitance

35 .........OLED35 .........OLED

40.........開關 41〜43···,電晶體 44 .........電容 45 .........OLED 2140.........Switch 41~43···, transistor 44 .........capacitor 45 .........OLED 21

Claims (1)

200907894 十、申請專利範圍: 1. 一種像素電路,包含: 少 第電阳體及—第二電晶體,每一電晶體具有— 第端、一第二端及-決定該第-端及該第二端是否導 通的控制端; 一開關; 一電容;及 一有機發光二極體; 其中,該第一電晶體的控制端及該電容的一端電連 接,該第-電晶體的第一端、該第二電晶體的第二端及 該電谷的另—端電連接’該第-電晶體的第二端及該有 機發先二極體的陽極電連接,該有機發光二極體的陰極 接收-掃描信號,該第二電晶體的控制端接收一參考電 壓,該第二電晶體的第一端接收―電源信號,該開關接200907894 X. Patent application scope: 1. A pixel circuit comprising: a first electric anode and a second transistor, each transistor having - a first end, a second end and - determining the first end and the first a control terminal that is turned on at the two ends; a switch; a capacitor; and an organic light emitting diode; wherein the control end of the first transistor is electrically connected to one end of the capacitor, the first end of the first transistor, The second end of the second transistor and the other end of the electric valley are electrically connected to the second end of the first transistor and the anode of the organic first diode, and the cathode of the organic light emitting diode Receiving a scan signal, the control end of the second transistor receives a reference voltage, and the first end of the second transistor receives a power signal, and the switch is connected 收一身料電壓,並受該電源信號控制,以決定是否輸出 該貢料電壓到該第一電晶體的控制端。 2. 依據申請專利範圍第1項所述之像素電路,其中,該第 -電晶體及該第二電晶體皆是P型薄犋電晶體。 3. 依據中請專利範圍第丨項所述之像素電路,其中,該開 關包括-第三電晶體,該第三電晶體具有一第一端、— 第二端及一決定該第一端及該第二端是否導通的控制端 ,該第三電晶體的控制端接收該電源信號,該第三電晶 體的第-端接收該資料電Μ,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 22 200907894 4. 依據申請專利範圍第3項所述之像素電路, 六· ,該 电曰a體、5亥第二電晶體及該第三電晶體皆是p 電晶體。 I溥骐 5. 依據申請專利範圍第丨項所述之像素電路,龙 /、甲,該楚 二電晶體及該開關一次只有一個導通,且在該第—^曰 體=有產生電流來驅動該有機發光二極體時,該開關^曰 6. 依據申請專利範圍第5項所述之像素電路,其中,該第 —電晶體及該第二電晶體皆是p型薄膜電晶體。 依據申凊專利範圍第5項所述之像素電路,其中,該開 關包括一第三電晶體,該第三電晶體具有一第一端、一 第二端及一決定該第一端及該第二端是否導通的控制端 ’該第三電晶體的控制端接收該電源信號,該第三電晶 體的第一端接收該資料電壓,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 8.依據申請專利範圍第7項所述之像素電路,其中,該第 電晶體、該第二電晶體及該第三電晶體皆是P塑薄膜 t 曰.gdtr 阳體。 9· ~種像素電路,包含: 一第一電晶體及一第二電晶體,每一電晶體具有一 第一端、一第二端及一決定該第一端及該第二端是否導 通的控制端; 一開關; —電容;及 23 200907894 一發光元件,具有一陽極及一陰極; 其中’該第一電晶體的控制端及該電容的一端電連 接,該第一電晶體的第一端、該第二電晶體的第二端及 該電容的另一端電連接,該第一電晶體的第二端及該發 光兀*件的陽極電連接,該發光元件的陰極接收一掃描信 號,δ亥第一電晶體的控制端接收一參考電壓,該第二電 曰曰體的第一端接收一電源信號,該開關接收一資料電壓 並支該電源信號控制,以決定是否輸出該資料電壓到 該第—電晶體的控制端。 1 〇.依據申請專利範圍第9項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是Ρ型薄膜電晶體。 依據申明專利把圍第9項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是Ρ型金屬氧化物半導體。 12. 依據申請專利範圍第9項所述之像素電路,其中,該開 關包括一第三電晶體,該第三電晶體具有一第一端、一 第一鳊及一決定該第一端及該第二端是否導通的控制端 ’該第三電晶體的控制端接收該電源信號,該第三電晶 體的第一端接收該資料電壓,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 13. 依據申請專利範圍第12項所述之像素電路,其中,該第 電曰日體、S亥第二電晶體及該第三電晶體皆是ρ型薄臈 電晶體。 14. 依據申請專利範圍第12項所述之像素電路,其中,該第 一電晶體、該第二電晶體及該第三電晶體皆是ρ型金屬 24 200907894 氧化物半導體。 1 5.依據申請專利範圍第9項所述之像素電路,其中,1 二電晶體及該開關一次只有一個導通,且在該 ^ 電晶 體沒有產生電流來驅動該發光元件時,該開關才導通。 16. 依據申請專利範圍第15項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是P型薄膜電晶體。 17. 依據申請專利範圍第15項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是P型金屬氧化物半導體。 1 8.依據申請專利範圍第1 5項所述之像素電路,其中,該開 關包括一弟二電晶體’該第二電晶體具有一第一端、一 第二端及一決定該第一端及該第二端是否導通的控制端 ’該第三電晶體的控制端接收該電源信號,該第三電晶 體的第一端接收該資料電壓,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 1 9·依據申請專利範圍第1 8項所述之像素電路,其中,該第 一電晶體、該第二電晶體及該第三電晶體皆是P型薄膜 電晶體。 20·依據申請專利範圍第1 8項所述之像素電路,其中,該第 一電晶體、該第二電晶體及該第三電晶體皆是P型金屬 氧化物半導體。 21.—種像素電路,包含: 一第一電晶體及一第二電晶體,每一電晶體具有一 第一端、一第二端及一決定該第一端及該第二端是否導 通的控制端; 25 200907894 一開關; 一電容;及 一有機發光二極體; 其中’該第一電晶體的控制端及該電容的一端電連 接’該第一電晶體的第一端接收一電源信號,該第一電 晶體的第二端、該第二電晶體的第一端及該電容的另— 端電連接,該第二電晶體的控制端接收一參考電壓,該 第二電晶體的第二端及該有機發光二極體的陽極電連接 ’該有機發光二極體的陰極接收一掃描信號,該開關接 收—資料電壓,並受該電源信號控制’以決定是否輸出 該資料電壓到該第一電晶體的控制端。 22. 依據申請專利範圍第21項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型薄膜電晶體。 23. 依據申請專利範圍第21項所述之像素電路,其中,該開 關包括一第三電晶體,該第三電晶體具有一第一端、一 第二端及—決定該第一端及該第二端是否導通的控制端 ’§亥第二電晶體的控制端接收該電源信號,該第三電晶 體的第一端接收該資料電壓,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 24. 依據申凊專利範圍第23項所述之像素電路,其中,該第 一電s曰體及該第二電晶體皆是N型薄膜電晶體,而該第 三電晶體是P型薄膜電晶體。 25. 依據申清專利範圍第21項所述之像素電路,其中,該第 二電晶體及該開關不會同時不導通,且在該開關不導通 26 200907894 時,該第 一電晶體才產生電流來驅動_ 有機發光二極體 該第 26.依據申請專利範圍第25項所述之像素電路其中 一電晶體及該第二電晶體皆是N型薄勝+ '、 、電晶體。 27·依據申請專利範圍第25項所述之像素電路,其中,該開 關包括一第三電晶體’該第三電晶體具有一第一端、一 第二端A-決定該第-端及該第二端是否導通的控制端 ,該第三電晶體的控制端接收該電源信號,該第三電晶 體的第一端接收該資料電壓,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 28·依據申請專利範圍第27項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型薄臈電晶體,而該第 三電晶體是P型薄膜電晶體。 29.—種像素電路,包含: 第一電晶體及一弟二電晶體,每—電晶體具有一 第一端、一第二端及一決定該第一端及該第二端是否導 通的控制端; 一開關; 一電容;及 一發光元件,具有一陽極及一陰極; 其中,該第一電晶體的控制端及該電容的一端電連 接’該第一電晶體的第一端接收一電源信號,該第一電 晶體的第二端、該第二電晶體的第一端及該電容的另一 端電連接,該第二電晶體的控制端接收一參考電壓,該 27 200907894 第二電晶體的第二端及該發光元 货尤70件的陽極電連接,該 先7L件的陰極接收一掃描信 ^ L现该開關接收一資料電壓 ’並受該電源信號控制,以決宗β 兮贷^ 以决疋疋否輸出該資料電壓到 邊第一電晶體的控制端。 30.依據中請專利範圍第29項所述之像素電路其中該第 一電晶體及該第二電晶體皆Η型薄膜電晶體。^ 31·依據中請專利範圍第29項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是Ν型金屬氧化物半導體。 32.依據申請專利範圍第29項所述之像素電路其中,該開 關匕括第二電晶體,該第三電晶體具有一第一端、一 第f端及一決定該第一端及該第二端是否導通的控制端 ,5亥第二電晶體的控制端接收該電源信號,該第三電晶 體的第—端接收該資料電壓,該第三電晶體的第二端^ 連接到該第一電晶體的控制端。 33·依據申凊專利範圍第32項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型薄膜電晶體,而該第 二電晶體是p型薄膜電晶體。 34·依據申請專利範圍第32項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型金屬氧化物半導體, 而該第三電晶體是P型金屬氧化物半導體。 35.依據申請專利範圍第29項所述之像素電路,其中,該第 電曰曰體及該開關不會同時不導通,且在該開關不導通 時’該第一電晶體才產生電流來驅動該發光元件。 36·依據申請專利範圍第35項所述之像素電路,其中,該第 28 200907894 一電晶體及該第二電晶體皆是N型薄獏電晶體。 37·依據申請專利範圍第35項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型金屬氧化物半導體。 38.依據申請專利範圍第35項所述之像素電路,其中,該開 關包括一第三電晶體’該第三電晶體具有一第一端、一 弟一端及一決定該第一端及該第二端是否導通的控制端 ,該第三電晶體的控制端接收該電源信號,該第三電晶 體的第一端接收該資料電壓,該第三電晶體的第二端電 連接到該第一電晶體的控制端。 3 9 ·依據申請專利範圍第3 8項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型薄膜電晶體,而該第 三電晶體是P型薄膜電晶體。 40.依據申請專利範圍第3 8項所述之像素電路,其中,該第 一電晶體及該第二電晶體皆是N型金屬氧化物半導體, 而該弟二電晶體是P型金屬氧化物半導體 29A body voltage is received and controlled by the power signal to determine whether to output the tributary voltage to the control terminal of the first transistor. 2. The pixel circuit according to claim 1, wherein the first transistor and the second transistor are P-type thin germanium transistors. 3. The pixel circuit of claim 3, wherein the switch comprises a third transistor, the third transistor having a first end, a second end, and a first end and The control end of the third transistor receives the power signal, the first end of the third transistor receives the data electrode, and the second end of the third transistor is electrically connected to the control terminal The control end of the first transistor. 22 200907894 4. According to the pixel circuit of claim 3, the electro-optical body, the 5th second transistor and the third transistor are p-electrons. I溥骐5. According to the pixel circuit described in the scope of the patent application, the dragon/A, the transistor and the switch have only one conduction at a time, and in the first body = the current is generated to drive The pixel circuit of claim 5, wherein the first transistor and the second transistor are p-type thin film transistors. The pixel circuit of claim 5, wherein the switch comprises a third transistor, the third transistor has a first end, a second end, and a first end and the first The control terminal of the third transistor receives the power signal, the first terminal of the third transistor receives the data voltage, and the second terminal of the third transistor is electrically connected to the first The control end of the transistor. 8. The pixel circuit of claim 7, wherein the second transistor, the second transistor, and the third transistor are both P plastic film t 曰.gdtr. The pixel circuit includes: a first transistor and a second transistor, each transistor having a first end, a second end, and a determining whether the first end and the second end are conductive a control unit; a switch; a capacitor; and 23 200907894 a light-emitting element having an anode and a cathode; wherein 'the control end of the first transistor and one end of the capacitor are electrically connected, the first end of the first transistor The second end of the second transistor and the other end of the capacitor are electrically connected, the second end of the first transistor is electrically connected to the anode of the light emitting device, and the cathode of the light emitting element receives a scan signal, δ The control end of the first transistor receives a reference voltage, the first end of the second electrode receives a power signal, and the switch receives a data voltage and controls the power signal to determine whether to output the data voltage to The control terminal of the first transistor. The pixel circuit of claim 9, wherein the first transistor and the second transistor are both Ρ-type thin film transistors. The pixel circuit of claim 9, wherein the first transistor and the second transistor are both erbium-type metal oxide semiconductors. 12. The pixel circuit of claim 9, wherein the switch comprises a third transistor, the third transistor having a first end, a first turn, and a first end and the The control terminal of the third transistor receives the power signal, the first terminal of the third transistor receives the data voltage, and the second terminal of the third transistor is electrically connected to the first The control end of a transistor. 13. The pixel circuit of claim 12, wherein the second electrode, the second transistor, and the third transistor are p-type thin transistors. 14. The pixel circuit of claim 12, wherein the first transistor, the second transistor, and the third transistor are both p-type metal 24 200907894 oxide semiconductor. The pixel circuit according to claim 9, wherein the diode and the switch are only turned on at a time, and the switch is turned on when the transistor does not generate a current to drive the light emitting device. . 16. The pixel circuit of claim 15, wherein the first transistor and the second transistor are P-type thin film transistors. 17. The pixel circuit of claim 15, wherein the first transistor and the second transistor are both P-type metal oxide semiconductors. The pixel circuit of claim 15, wherein the switch comprises a second transistor, the second transistor has a first end, a second end, and a first end And the control end of the third transistor is configured to receive the power signal, the first end of the third transistor receives the data voltage, and the second end of the third transistor is electrically connected to The control end of the first transistor. The pixel circuit of claim 18, wherein the first transistor, the second transistor, and the third transistor are P-type thin film transistors. The pixel circuit of claim 18, wherein the first transistor, the second transistor, and the third transistor are all P-type metal oxide semiconductors. A pixel circuit comprising: a first transistor and a second transistor, each transistor having a first end, a second end, and a determining whether the first end and the second end are conductive Control terminal; 25 200907894 a switch; a capacitor; and an organic light emitting diode; wherein 'the control end of the first transistor and one end of the capacitor are electrically connected', the first end of the first transistor receives a power signal The second end of the first transistor, the first end of the second transistor, and the other end of the capacitor are electrically connected, and the control end of the second transistor receives a reference voltage, and the second transistor The second end and the anode of the organic light emitting diode are electrically connected. The cathode of the organic light emitting diode receives a scan signal, and the switch receives a data voltage and is controlled by the power signal to determine whether to output the data voltage to the The control end of the first transistor. 22. The pixel circuit of claim 21, wherein the first transistor and the second transistor are both N-type thin film transistors. The pixel circuit of claim 21, wherein the switch comprises a third transistor, the third transistor has a first end, a second end, and - the first end and the The control terminal of the second transistor that receives the second terminal receives the power signal, the first terminal of the third transistor receives the data voltage, and the second terminal of the third transistor is electrically connected to the The control end of the first transistor. The pixel circuit according to claim 23, wherein the first electric scorpion body and the second electromagnet are N-type thin film transistors, and the third electro-transistor is a P-type thin film electric Crystal. 25. The pixel circuit according to claim 21, wherein the second transistor and the switch are not non-conducting at the same time, and the first transistor generates current when the switch does not conduct 26 200907894. The pixel circuit according to claim 25, wherein one of the transistor and the second transistor are N-type thin wins + ', and a transistor. The pixel circuit of claim 25, wherein the switch comprises a third transistor, the third transistor has a first end, a second end A-determining the first end, and the The control terminal of the third transistor receives the power signal, the first end of the third transistor receives the data voltage, and the second end of the third transistor is electrically connected to the first The control end of a transistor. The pixel circuit of claim 27, wherein the first transistor and the second transistor are both N-type thin germanium transistors, and the third transistor is a P-type thin film transistor. 29. A pixel circuit comprising: a first transistor and a second transistor, each transistor having a first end, a second end, and a control for determining whether the first end and the second end are conductive a switch; a capacitor; and a light-emitting element having an anode and a cathode; wherein the control end of the first transistor and one end of the capacitor are electrically connected to the first end of the first transistor receiving a power source a signal, a second end of the first transistor, a first end of the second transistor, and another end of the capacitor are electrically connected, and a control end of the second transistor receives a reference voltage, the 27 200907894 second transistor The second end is electrically connected to the anode of the illuminating element 70, and the cathode of the first 7L piece receives a scanning signal, and the switch receives a data voltage ' and is controlled by the power signal to determine the β 兮^ In order to determine whether to output the data voltage to the control terminal of the first transistor. 30. The pixel circuit of claim 29, wherein the first transistor and the second transistor are thin film transistors. The pixel circuit of claim 29, wherein the first transistor and the second transistor are both bismuth metal oxide semiconductors. The pixel circuit of claim 29, wherein the switch comprises a second transistor, the third transistor has a first end, a f-th end, and a first end and the first The control terminal of the second transistor is connected to the control terminal of the second transistor, the first terminal of the third transistor receives the data voltage, and the second terminal of the third transistor is connected to the first terminal The control end of a transistor. The pixel circuit of claim 32, wherein the first transistor and the second transistor are both N-type thin film transistors, and the second transistor is a p-type thin film transistor. The pixel circuit of claim 32, wherein the first transistor and the second transistor are both N-type metal oxide semiconductors, and the third transistor is a P-type metal oxide semiconductor . The pixel circuit of claim 29, wherein the first electrode body and the switch are not non-conducting at the same time, and the first transistor generates current to drive when the switch is not conducting. The light emitting element. The pixel circuit according to claim 35, wherein the 28th 200907894 transistor and the second transistor are N-type thin germanium transistors. The pixel circuit of claim 35, wherein the first transistor and the second transistor are both N-type metal oxide semiconductors. The pixel circuit of claim 35, wherein the switch comprises a third transistor, the third transistor has a first end, a first end, and a first end and the first The control end of the third transistor receives the power signal, the first end of the third transistor receives the data voltage, and the second end of the third transistor is electrically connected to the first The control end of the transistor. The pixel circuit of claim 3, wherein the first transistor and the second transistor are N-type thin film transistors, and the third transistor is a P-type thin film transistor . 40. The pixel circuit of claim 3, wherein the first transistor and the second transistor are both N-type metal oxide semiconductors, and the second transistor is a P-type metal oxide. Semiconductor 29
TW96128204A 2007-08-01 2007-08-01 Pixel circuit TW200907894A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW96128204A TW200907894A (en) 2007-08-01 2007-08-01 Pixel circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW96128204A TW200907894A (en) 2007-08-01 2007-08-01 Pixel circuit

Publications (2)

Publication Number Publication Date
TW200907894A true TW200907894A (en) 2009-02-16
TWI371736B TWI371736B (en) 2012-09-01

Family

ID=44723555

Family Applications (1)

Application Number Title Priority Date Filing Date
TW96128204A TW200907894A (en) 2007-08-01 2007-08-01 Pixel circuit

Country Status (1)

Country Link
TW (1) TW200907894A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103137071A (en) * 2013-03-04 2013-06-05 陈鑫 Novel active pixel driving circuit with capacity for threshold value compensation
TWI400987B (en) * 2009-12-03 2013-07-01 Au Optronics Corp Organic light emitting diode display and driving circuit thereof
TWI410928B (en) * 2009-09-18 2013-10-01 Univ Nat Taiwan Science Tech Pixel structure, display panel and driving method thereof

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201506874A (en) 2013-08-14 2015-02-16 Chunghwa Picture Tubes Ltd Driving circuit of pixel of organic light emitting diode
CN109256092B (en) * 2018-10-18 2020-07-28 天津大学 Pixel driving circuit and driving method for realizing threshold voltage compensation based on OTFT

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI410928B (en) * 2009-09-18 2013-10-01 Univ Nat Taiwan Science Tech Pixel structure, display panel and driving method thereof
TWI400987B (en) * 2009-12-03 2013-07-01 Au Optronics Corp Organic light emitting diode display and driving circuit thereof
CN103137071A (en) * 2013-03-04 2013-06-05 陈鑫 Novel active pixel driving circuit with capacity for threshold value compensation

Also Published As

Publication number Publication date
TWI371736B (en) 2012-09-01

Similar Documents

Publication Publication Date Title
CN110322841B (en) TFT pixel threshold voltage compensation circuit initialized by light emitting device
JP4243760B2 (en) LED drive circuit
US10147356B2 (en) OLED pixel driving circuit and OLED display device
TWI394122B (en) Pixel structure, organic light emitting display and related method
CN107945737B (en) Pixel compensation circuit, driving method thereof, display panel and display device
JP4070696B2 (en) Light emitting display device, driving method of light emitting display device, and display panel of light emitting display device
US9336718B2 (en) Display device and method for driving same
TWI407406B (en) Pixel driving circuit of an organic light emitting diode
CN105575327B (en) A kind of image element circuit, its driving method and organic EL display panel
JPWO2010016316A1 (en) Display device and driving method thereof
TW200903417A (en) Display apparatus, method of driving a display, and electronic device
JP2012242830A (en) Pixel unit circuit, pixel array, panel and panel driving method
TW200428323A (en) Pixel circuit, display device, and pixel circuit driving method
CN109256092B (en) Pixel driving circuit and driving method for realizing threshold voltage compensation based on OTFT
TW200903423A (en) Pixel circuit and display device
US9335598B2 (en) Display device and method for driving same
CN110299108B (en) TFT compensation circuit for display device using reference current
CN116343647A (en) Pixel circuit, display panel and display device
TW200907894A (en) Pixel circuit
TWI378429B (en)
TW200528899A (en) Image display device
US9349323B2 (en) Display device and method for driving same
TW202001833A (en) Pixel circuit
TWI445436B (en) A driving circuit and a pixel circuit having the driving circuit
TWI389083B (en) Pixel driver and display device

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees