TW200914971A - Display device and sputtering target - Google Patents

Abstract

Provided is a display device wherein a conductive oxide film is arranged on an Al alloy film by being directly brought into contact with the film. The Al alloy film contains a Ni of 0.05-2.0 atm%, and an In and/or a Sn of 0.05-1.0 atm% in total. The display device makes it possible to eliminate a barrier metal layer, and is simplified without increasing the number of steps. The Al alloy film is not only directly and surely brought into contact with the conductive oxide film but also reduces electrical resistivity even when a relatively low heat treatment temperature is applied, and contact electrical resistivity is also reduced when the alloy film is directly brought into contact with the conductive oxide film. Furthermore, the display device has excellent heat resistance and corrosion resistance. A sputtering target for forming the Al alloy film is also provided.; The sputtering target contains a Ni of 0.05-2.0 atm% and an In and/or a Sn of 0.05-1.0 atm% in total.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sputtering device used for a liquid crystal display or the like to form a sputtering target of an A1 alloy film used in the display device. [Prior Art] From small mobile phones to more than 30 large-scale TVs, liquid crystal display devices (liquid crystal displays), which are used in various types of mobile phones, are classified into simple matrix liquid crystal display devices and matrix actives by the pixel method. Crystal display device. Among them, an active liquid crystal display device having a thin film transistor (hereinafter referred to as a TFT) as a switching element can be widely used because it can realize high-precision image quality and can also be used for high-speed images. The configuration and operation principle of a representative liquid crystal display device suitable for an active matrix type liquid device will be described with reference to Fig. 1 . In the case of using a hydrogenated amorphous germanium TFT substrate (in the case of an amorphous germanium TFT substrate) as an active semiconductor film, a description will be given, but it is not a case of using a polysilicon TFT substrate (hereinafter, it is called a poly In the case of a sand substrate). As shown in FIG. 1, the liquid crystal display 100 includes a τ FT base, a counter substrate 3 disposed opposite to the TFT substrate 1, and a TFT substrate 1 and a counter substrate 2 to be disposed. The light modulation layer functions as a liquid crystal layer 3. The TFT substrate 1 is disposed on the insulating glass substrate J a for use in the liquid crystal matrix of each of the flooding liquids, and the TFT14 is placed on the surface of the 200914971 TF Τ4, transparent pixel electrode. 5. The wiring portion 6 including the scanning line or the signal line. The transparent pixel electrode 5 is formed of a conductive oxide film such as an oxide-tin oxide film containing tin oxide (SnO) in an amount of about 1% by mass in indium oxide (?n2?3). The TFT substrate 1 is driven by the drive circuit 13 and the control circuit 14 connected via the TAB tape 12. The counter substrate 2 has a common electrode 7 formed on the insulating glass substrate 1b on the TFT substrate 1 side, a color filter 8 disposed at a position facing the transparent pixel electrode 5, and a color filter 8 disposed on the TFT substrate 1 side. The TFT 4 on the TFT substrate 1 and the light shielding film 9 disposed at a position opposed to the wiring portion 6 are provided. The counter substrate 2 further has an alignment film 11 for aligning liquid crystal molecules (not shown) contained in the liquid crystal layer 3 in a specific direction. Polarizing plates 10 a and 10 b are disposed on the outer sides of the TFT substrate 1 and the counter substrate 2 (the side opposite to the liquid crystal layer 3 side). The liquid crystal display 100 controls the alignment direction of the liquid crystal molecules in the liquid crystal layer 3 by the electric field formed between the counter electrode 2 and the transparent pixel electrode 5, and the light passing through the liquid crystal layer 3 is modulated. Accordingly, the image is displayed by controlling the amount of light transmitted through the counter substrate 2. Next, the structure and operation principle of a conventional amorphous germanium TFT substrate suitable for use in a liquid crystal display will be described in detail with reference to Fig. 2 . Fig. 2 is an enlarged view of an important part of A in Fig. 1. As shown in Fig. 2, a scanning line (gate wiring) 2 5 'scanning line 2 5 is formed on the glass substrate 1 a as a gate electrode for controlling τ ρ · τ Ο N, 0 FF 2 6 and function. A gate insulating film (yttrium nitride film) 27 is formed in such a manner as to cover the gate electrode 26. A signal line is formed in such a manner as to intersect with the scanning line 25 via the gate insulating film 2 7 -6 - 200914971 (source 汲 34, one of the signal lines 34 is partially used as the source electrode 28 of the TFT. An amorphous germanium channel semiconductor film, a signal line (source-drain wiring), and an interlayer film (protective film) 30 are sequentially formed on the pole insulating film 27. This type is also commonly referred to as a bottom gate amorphous germanium channel film from an intrinsic layer (referred to as an undoped layer) that is not doped with phosphorus (P), and a doped layer (n layer) that is doped with P in the gate. The pixel region on the pole insulating film 27 is provided with a transparent pixel electrode 5 formed by an IT film containing SnO in a female case. The electrode electrode 29 is electrically connected to the transparent pixel electrode 5. When the gate voltage is supplied to the gate electrode TFT4 via the scanning line 25, the gate electrode TFT4 is turned "ON", and is supplied to the signal 5 through the source electrode 28 via the drain electrode 29. Then, when a specific level pressure is applied to the transparent pixel electrode 5, as described above with reference to Fig. 1, a potential difference is generated between the transparent pixel electrode electrodes 2, and the liquid crystal layer 3 is aligned to perform light. Modulation. The TFT substrate 1 is electrically connected to the transparent pixel electrode line (signal line for the pixel electrode), the source-drain wiring 34 electrically connected to the source electrode electrode 29, and electrically connected to the gate. · Scanning line 25 is low in resistivity, and it is easy to apply microfabrication. Any one of them is made of pure A1 or Al-Nd. The film of A1 alloy is called A1 film. As shown in the figure, 'a high-melting electrode line made of Mo, Cr, Ti, W, etc. is formed, and a work film (active insulating 矽 〇 〇 I layer) is also used.] Ι 203 203 TFT 26 TFT 26, I 3 4, the reason for driving the driving power 5 of the bright pixel and the signal 2 8 - the pole of the opposite liquid crystal molecule 5 (the following is a barrier metal layer 51, 52 formed by the second point metal body 200914971, 53. 54. For the transparent pixel electrode 5, the reason why the AI film is connected via the barrier metal layer 54 is that when the A1 film is in direct contact with the transparent pixel electrode 5, the contact resistance is increased, and the quality of the image is not displayed. The reason is that the A1 constituting the wiring directly contacting the transparent pixel electrode 5 is very easy to be Oxidation, due to oxygen generated during film formation of the liquid crystal display or oxygen added during film formation, an insulating layer of A1 oxide is formed on the interface between the A1 film and the transparent pixel electrode 5. Further, a transparent painting is formed. Although the IT Ο of the element electrode 5 is a conductive metal oxide, it is not possible to perform an electrical ohmic connection by forming the A1 oxide layer as described above. However, in order to form the barrier metal layer, in addition to the gate electrode or In addition to the source electrode and the sputtering device for film formation required for the formation of the drain electrode, it is necessary to additionally provide a film forming chamber for forming a barrier metal. With the mass production of the liquid crystal display, the price is lower. The problem of increasing manufacturing cost or decreasing productivity with the formation of a barrier metal layer cannot be ignored. Here, the applicant discloses that the barrier metal layer can be omitted, and the A1 can be directly and surely made without increasing the number of engineering. A method of contacting an alloy film with a transparent pixel electrode (Patent Document 1). In Patent Document 1, by using from 0 to 6 atomic percent, from Au, Ag, Zn, Cu, Ni, Sr, Ge, Sm and Bi The A1 alloy of at least one selected from the group consisting of the alloys at least partially present at the interface between the A1 alloy film and the transparent pixel electrode serves as a deposition layer or an agrochemical layer to solve the above problems. In Patent Document 1, at the time of, for example, an Al-Ni alloy, the resistivity after the heat treatment for 30 minutes at 250 V: 200914971 is low, and the Ni of A1-2 atomic percentage is 3.8 # Ω · cm, A1- 4 atomic percent of Ni is 5.8 / ζ Ω · cm, A1-6 atomic percentage of Ni is 6.5 / / Ω · cm. Thus, if the resistivity is suppressed to a lower A1 alloy film, the display device can be reduced It is very useful because it consumes electricity. Further, when the resistivity of the electrode portion is lowered, since the time constant determined by the product of the resistance and the capacitance becomes small, even when the display panel is enlarged, the display quality of the height can be ensured. However, any of the heat-resistant temperatures of the above Al-Ni-based alloys is low, and the maximum enthalpy is 1,500 to 200 °C. Here, Patent Document 2 discloses an A1 alloy film having a specific alloy composition and a conductive oxide film having a thin film transistor and a transparent pixel electrode, which are not in direct contact with a high melting point metal, and an A1 alloy composition at a contact interface thereof. A thin film transistor substrate in which a part or all of it is deposited or concentrated. The above-mentioned Al alloy film is an Al-α-X alloy containing 0.1 atomic percent or more and 6 atomic percent or less of the element belonging to the <2 group, and an element belonging to the group X of 0.1 atom% or more and 2.0 atomic percent or less. It is composed as an alloy component. Specifically, a thin film transistor substrate including a ruthenium alloy film is described, and the ruthenium alloy film contains at least one element selected from the group consisting of Ni, Ag, Zn, Cu, and Ge as a group α. Containing Mg, Cr, Mn, Ru, Rh, Pd, Ir, Pt, La, Ce, P r ' Gd, Tb, S m, Eu, Ho, Er, Tm, Yb, Lu, and Dy At least one element selected from the group is used as the group X. -9- 200914971 When the thin film transistor substrate is used, the barrier metal layer can be omitted, and the transparent pixel electrode composed of the A1 alloy film and the conductive oxide film can be directly and surely contacted without increasing the number of works. Further, even when a low heat treatment temperature of, for example, about 100 ° C or more and 300 ° C or less is applied, the electrical resistivity can be lowered and excellent heat resistance can be achieved. Specifically, it is described that even when a low-temperature heat treatment of, for example, 2 50 ° C for 30 minutes is employed, defects such as protrusions are not generated, and the resistivity of the A1 alloy film can be made Ω · cm or less. Patent Document 1: Japanese Laid-Open Patent Publication No. 2004-214606 (Patent Document 2) However, in recent years, from the viewpoint of improving yield and improving productivity, there is a case where a display device is manufactured. The tendency of the process temperature to be lowered. For example, the source-drain electrode material of the amorphous germanium TFT requires low resistivity and high heat resistance. The required specification has hitherto been a resistivity of 7 Ω·cm or less, and a heat-resistant temperature of about 250 °C. The heat-resistant temperature is determined by the highest temperature applied to the source-drain electrode in the manufacturing process, and the maximum temperature is the formation temperature of the insulating film formed on the electrode as a protective film. Recently, the film-forming technique has been used to obtain a desired insulating film even at a low temperature, and in particular, the protective film on the source-drain electrode is generally 250. (: Film formation on the left and right. The specifications required for such wiring materials are close to each other. The year is better and stricter. For the wiring material (A1 alloy film) where the electrode of the drain electrode and the transparent pixel electrode can be directly contacted, the heat resistance temperature is required to be 250 T. : degree 'and resistivity is -10 200914971 5.0 # Ω · cm or less, and the resistivity is quite low. Moreover, in recent years, the contact resistance when directly contacting the A1 alloy film and the transparent pixel electrode is lower than 1 〇〇〇 Ω (especially less than 200 Ω) is preferable. However, the wiring material of the A1 system capable of having a transparent pixel electrode having such low resistivity and high contact resistance is not disclosed above. In the case of the Al-Ni alloy, the heat resistance temperature of the Al-Ni alloy is as low as 150 ° C to 200 ° C, and the heat resistance is poor. When the Ni-based alloy is subjected to heat treatment at about 250 ° C, the deposition of the intermetallic compound of Ni serving as the conductive path is insufficient, so that the contact resistance becomes high. Here, the contact resistance is lowered, so that the conductive path is reduced. N i intermetallicization For the deposition of the material, the concentration of Ni in the alloy must be increased. However, when the amount of Ni is increased, the resistivity of the A1 alloy film itself becomes high, and it is difficult to achieve a low resistivity of 5 · 0 // Ω · cm or less. In the A1 alloy film of the conventional Al-Ni alloy or the like, when the process temperature is lowered to 250 ° C, the deposition and crystal growth of the intermetallic compound of N i cannot be sufficiently performed as described below. In addition, the deposition and crystal growth of the intermetallic compound other than N i cannot be sufficiently performed. Since Ni is hard to be concentrated on the surface of the A1 alloy film, it is difficult to reduce the contact resistance. The AL alloy film is generally formed by a sputtering method. However, by this method, the alloy component added to A1 exceeding the solid solubility limit exists in a forced solid solution state. Alloy element A1 alloy -11 - 200914971 The resistance is generally higher than that of pure A1. For this, the A1 alloy film containing the alloying element exceeding the solid solution limit, when heated, the alloy component is deposited as an intermetallic compound on the grain boundary, and when When it is hot, recrystallization of A1 is performed to cause crystal growth of A1. At this time, the deposition temperature of the intermetallic compound of the alloy component and the temperature of crystal growth differ depending on the alloying elements, but either of them is due to the alloy composition (intermetallic compound). The deposition and crystal growth cause the resistivity of the A1 alloy film to decrease. When the crystal grows due to heating, the compressive stress inside the film becomes large, but when it is heated and crystallized, it is unbearable after all, due to stress relaxation. A1 diffuses on the surface of the film to produce a protrusion. The alloying has an effect of suppressing the diffusion of A1 by the intermetallic compound deposited on the grain boundary, preventing the generation of the protrusion, and improving the heat resistance. In the past, the deposition of the alloy component and the progress of crystal growth have been attempted by such a phenomenon, and the compatibility between the electrical resistivity of the A1 alloy film and the high heat resistance has been reduced. However, when the process temperature is lower than about 250 °C as described above, the deposition of the intermetallic compound is not sufficiently caused in the conventional alloy composition, and as a result, crystal growth cannot be performed, and it is difficult to lower the specific resistance. Furthermore, when the process temperature drops to about 250 °C, the deposition of the metal gold compound is not sufficiently caused, and the crystal growth is not carried out, since Ni is difficult to be in the vicinity of the interface of the transparent pixel electrode in the A1 alloy film (at the time of film formation) The vicinity of the surface of A1 is concentrated, and it is impossible to form a conductive path, and it is difficult to reduce the contact resistance between the A1 alloy film and the transparent pixel electrode. That is, when the Al-Ni alloy film is heated, it is known that although an intermetallic compound of Ni is deposited in the A1 alloy film, the compound is easily deposited on the side of the glass substrate of the A1 alloy film in the transparent film. The electrode side is difficult to deposit. Therefore, it is considered that the Ni intermetallic compound is not deposited on the transparent pixel side in the A1 alloy film. Thus, the resistivity between the A1 alloy film and the transparent pixel electrode cannot be lowered. The contact resistance cannot be lowered. However, in order to make the transparent pixel side of the A1 alloy film, the metal compound of Ni which is a conductive path is deposited, and when the concentration of Ni in the alloy is increased, the intermetallic compound of Ni is a noble element with respect to A1, so that a base is also produced. The problem of sexual liquid corrosion. In the above description, the liquid crystal display device has been described as a representative. However, the above problem is not limited to the liquid crystal display device, and is also known to be common to the amorphous germanium TFT substrate. Further, the above problem 'is not seen in the case of using germanium (amorphous Si) when using polyfluorene (polycrystalline Si). The present invention has been made in view of such circumstances, and an object thereof is to provide a metal layer which can be omitted, and can be simplified without increasing the number of works, and not only the conductive oxide film is directly and surely contacted on the A1 alloy film, even if When the A1 alloy film is used for a relatively low heat treatment temperature, the resistivity of the A1 alloy film itself can be lowered, and the contact resistance of the A1 alloy film and the conductive oxide film can also be lowered, and more excellent heat resistance can be achieved. And corrosion resistance technology. Specifically, a display device including an A1 alloy film which is excellent in heat resistance and does not generate protrusions or the like even when a relatively low-temperature heat treatment condition of, for example, 250 ° C is used is provided. Defects, corrosion resistance are also good, and resistivity and contact resistance are lower than before. Further, a sputtering target for forming an A1 alloy film which is useful for the production of the display device is provided. The display device of the present invention which can solve the above-mentioned problems is a display device having a structure in which a conductive oxide film is directly in contact with an A1 alloy film, and has a Ni containing a 〇.5~2_〇 atom in the A1 alloy film. And a total of 0.05 to 1.0 atomic percent of in and / or Sn. Further, the above-mentioned A1 alloy film preferably contains at least one element selected from the group consisting of Nd, Gd, La and Y in an atomic percentage of 〇·〇5 to 〇5. The above-mentioned A1 alloy film is, for example, a constituent member of a thin film transistor; more specifically, a member of a gate electrode of the above-mentioned thin film transistor. Further, the A1 alloy film is, for example, a constituent member of a scanning line of the display device. The present invention also encompasses a sputtering target which is a sputtering target for forming an A1 alloy film, and contains Ni in an amount of 5 to 2.0 atoms and In and/or Sn in a total amount of 0.05 to 1% by atom. The sputtering target further preferably contains at least one element selected from the group consisting of Nd, Gd, La, and Y in an amount of 0.05 to 0.5 atomic percent, preferably as another element. According to the present invention, it is possible to provide a display device having an A1 alloy film which is directly in contact with the A1 alloy film and the conductive oxide film without passing through the barrier metal layer, and is relatively low even at a temperature of about 250 ° C. At the heat treatment temperature, the electrical resistivity is also relatively low, and the contact resistance with the conductive oxide film is also low, and excellent heat resistance and corrosion resistance are also ensured. In particular, in the present invention, even if the amount of Ni contained in the A1 alloy film is reduced as compared with the prior art, the contact resistance can be lowered, so that the photoelectricity of the A1 alloy film from -14 to 200914971 can be further lowered, and the uranium resistance is improved. . Further, the heat treatment temperature is a heat treatment temperature which is the highest temperature in the manufacturing process of, for example, a TFT (Thin Film Transistor) array, and means that the V VD film formation for various film formation in the manufacturing process of a general display device. The heating temperature of the substrate at the time, or the temperature of the heat treatment furnace when the protective film is thermally hardened. When the A1 alloy film used in the display device of the present invention is applied as a constituent member of, for example, a drain electrode, the barrier metal layer 54 shown in Fig. 2 can be omitted. Further, when the A1 alloy film used in the display device of the present invention is applied as a constituent member of the scanning line, the barrier metal layers 51 and 52 shown in Fig. 2 can be omitted. According to the present invention, a display device which is inexpensive and high in performance is obtained. [Embodiment] The present inventors have provided various electrodes which can be directly connected to a transparent pixel electrode composed of a conductive oxide film constituting a display device, or a source, a drain, a gate or the like of a thin film transistor, and even in When a heat treatment having a relatively low temperature of about 250 k is applied, a display device having a wiring material having a sufficiently low resistivity and a low contact resistance and having both excellent heat resistance and corrosion resistance is carefully examined. As a result, it is found that if the A1-N i alloy used as the A1 alloy film is contained in the case of I n and/or s η, the heat treatment can be performed even at a relatively low temperature of about 250 ton: The intermetallic compound of i is deposited on the interface with the conductive oxide film in the A1 alloy film, so that even if the amount of Ni contained in the a1 alloy film -15-200914971 is lower than in the past, the A1 alloy film and the conductive oxidation can be lowered. Further, by reducing the amount of Ni, the resistance of the A1 alloy film itself can be lowered, and the deterioration of corrosion resistance can be suppressed, and the present invention has been completed. The outline of the present invention is as follows. In other words, according to the present invention, the A1 alloy film is provided in direct contact with the conductive oxide film constituting the display device, and the alloy component of the A1 alloy film contains Ni and contains a specific amount of In and/or Sn. According to this, even if the heat treatment of the process after forming the A1 alloy film is performed at a relatively low temperature of about 250 ° C, the resistivity of the A1 alloy film itself can be lowered, and the transparent oxide film formed of the display device can be transparent. The contact resistance of each of the pixel electrodes, or the source, the drain, and the gate of the thin film transistor is suppressed to be low. Further, according to the present invention, since the alloy composition of the A1 alloy film contains In and/or Sn in addition to Ni, the low resistivity can be achieved even if the amount of Ni is increased. Therefore, it is possible to prevent the corrosion resistance from being deteriorated due to the increase in the amount of Ni. Further, according to the present invention, at least one of a specific amount of nd, Gd, La, and Y is contained in the A1 alloy film to enhance the heat resistance element, so that even if the temperature is 220 ° C to 30 (TC degree is performed, It is also possible to ensure that excellent heat resistance such as protrusions or the like does not occur. As described above, according to the present invention, it is possible to provide a display device including an A1 alloy film having direct contact with a conductive oxide film, and It has a relatively low electrical resistivity and a relatively low contact resistance, and has a relatively high heat resistance and good corrosion resistance. -16- 200914971 First, an A1 alloy film constituting the display device of the present invention will be described. The alloy composition of the A1 alloy film to be used contains 0.05 to 2.0 atomic percent of Ni, and a total of 0.05 to 1.0 atomic percent of I η and/or S η .

Ni is an element effective for reducing the contact resistance of the ruthenium alloy film and the conductive film. Since the Ni intermetallic compound is deposited on the conductive oxide film side of the A1 alloy film by containing Ni in the A1 alloy film, a conductive path is formed between the A1 alloy film and the conductive oxide film, and as a result, conductive oxidation is performed. The contact resistance of the film is lowered. However, the amount of Ni is less than 0.05 atomic%, and the amount of Ni is insufficient. As will be described later, even if the A1 alloy film contains a specific amount of In or Sn', the contact resistance cannot be lowered. Therefore, in the present invention, the amount of N i is preferably 〇 · 〇 7 atomic percentage or more 'more preferably 〇 · 1 atomic percentage or more. In order to reduce the above contact resistance, it is preferable to contain Ni as much as possible. However, when the Ni content is excessively contained, the resistivity of the A1 alloy film is too high. When the amount of Ni is increased, Ni is a noble element with respect to A1. 'Therefore, the uranium for the test liquid (such as the imaging liquid used in the production of the pattern). Therefore, in the present invention, the amount of N i is set to 2 · 0 atom% or less. The amount of N i is preferably 1.5 atom% or less, more preferably 1. 〇 atom. The following 'more preferably 0.5 atom% or less. However, the inventors of the present invention have found that when the process temperature is lowered to about 250 deg, the contact resistance of the conductive oxide film of the A 1 alloy film cannot be sufficiently lowered only by the inclusion of N i ' in the A1 alloy film. When the process temperature is lowered to 250t, the deposition of the intermetallic compound of Ni cannot be sufficiently caused to -17-200914971. Not only the crystal growth does not proceed, but Ni is difficult to be in the vicinity of the interface between the A1 alloy film and the conductive oxide film. The vicinity of the surface of A1 is concentrated, so that a conductive path is formed. That is, when it is an Al-Ni alloy wiring film, since the film is small, unlike the usual bulk material, the intermetallic compound of Ni is deposited in the film direction, and the deposition distribution makes it impossible to sufficiently reduce A1 and electricity. Contact resistance of the oxide film. For example, in the TFT element, after the A1 gold film is formed on a glass substrate or the like, heat is applied to form an insulator film such as tantalum nitride thereon. At this time, the A1 alloy film receives the heat history when heated. Then, in the present invention, a part of the insulating film is removed, and a conductive oxide film such as ITO is formed so as to directly contact the surface of the A1 alloy. However, when a conductive oxide film is formed on the surface of the A1 alloy film without a barrier metal layer, an insulating oxide film is formed on the surface of the A1 alloy film, and the contact resistance of the A1 alloy film and the conductive oxide film is remarkable. high. Here, in the present invention, by forming the A1 wiring film with Ni, an intermetallic compound of Ni or a self-concentrating layer of Ni is formed in the alloy film, and an insulating fine insulating layer is formed on the surface of the A1 alloy film. Membrane. However, after investigating the deposition distribution of Ni in the A1 alloy film, it was found that the amount of Ni in the conductive oxide film side of the A1 film was lower than the average concentration of the A1 alloy film. On the other hand, it was found that N i in the glass substrate side of the A1 alloy film was higher than the average Ni concentration of the alloy film. The reason why the Ni concentration distribution is generated in the A1 alloy film is because the film thickness of the A1 alloy film is small, so when heat is applied to form the insulator film, the heat influence is large, and the Ni boundary diffuses to the glass. The substrate side. Sexually thick and thickly guided to the hair mask to form a dense A1 resistance is gold Ni A1 degree shape industry 丄 -18-200914971 Here, the present invention prevents the Ni grain boundary from diffusing to the glass substrate side, and in order to make the metal of Ni The deposition state of the compound is uniform, and the A1 alloy film contains In and/or Sn as an alloy component.

In and Sn are in a temperature range of about 25 ° C, and are not dissolved in the Al alloy film containing Ni, and are deposited on the grain boundary elements. Further, In and Sn are elements having a strong affinity with Ni. Therefore, when the A1 alloy film containing Ni contains In or Sn as an alloy component, In or Sn doped with Ni at the grain boundary, forming a metal compound such as Ni-In or Ni-Sn or Ni-In-Sn. . As a result, Ni is appropriately doped by doping In or Sn, so that Ni can be prevented from diffusing to, for example, the glass substrate side, and an intermetallic compound of Ni can be deposited on the surface of the A1 alloy film. As a result, the contact resistance between the A1 alloy film and the conductive oxide film is lowered. In the present invention, the A1 alloy film containing Ni in the above range contains 0.05 to 1.0 atomic percent of In and/or Sn in total. When the total amount of In or Sn is less than 0.05 atomic%, the effect of depositing Ni on the surface of the A1 alloy film cannot be sufficiently exerted, and the contact resistance with the conductive oxide film cannot be lowered. Therefore, in the present invention, the A1 alloy film is contained in a total amount of 0.05 atomic percent of In and/or Sn. The total amount of In and/or Sn is preferably 0.1 atomic percent, more preferably 0.3 atomic percent. However, when In or Sn is excessively contained, for example, film peeling occurs in a lithography process, and it cannot be practically used. Therefore, in the present invention, the total amount of In and/or Sn is set to be 1.0 or less. The total amount of In and/or Sn is preferably 0.9 atomic percent or less, more preferably 〇 8 atomic percent or less. As described above, the composition of the A1 alloy film is set to a ternary system or a ternary system -19-200914971 (Al-Ni-In/Sn alloy), which has low electrical resistivity and low contact resistance, and can also prevent deterioration of corrosion resistance. 'But the heat resistance temperature of the A1 alloy film becomes low at about 150 °C. Therefore, when heated to about 2 50. (: When the film is roughened on the A1 alloy film, it is necessary to improve the heat resistance of the A1 alloy film by using the above-described A1 alloy film.) The present invention is intended to improve the A1 alloy gold film. The heat resistance is selected from the group consisting of Nd, Gd, La, and Y in a total of 原子.〇5~ 〇·5 atomic percent of the alloy composition of the above ternary or quaternary system. An element is preferred as other elements.

Nd, Gd, La, and Y are elements which act to increase the contact resistance of the A1 alloy film or to improve the heat resistance of the A1 alloy film without deteriorating the corrosion resistance, and to heat the A1 alloy film even at about 250 °C. It is also possible to prevent the formation of protrusions on the surface of the A1 alloy film. In order to effectively exert such an effect, at least one element selected from the group consisting of Nd, Gd, La, and Y is preferably contained in a total of 0.05 atomic percentage. More preferably, it is set to 0.1 atomic percentage or more in total. However, when it is excessively contained, the resistivity of the A1 alloy film itself becomes high, and the upper limit of the content of the solid content is set to 0.5 atomic percent. More preferably, it is 0.3 atomic percent or less, and more preferably less than 2 atomic percent.

Nd, Gd, La, and Y may be added separately, and any two or more types may be selected as desired. The A1 alloy film used in the present invention contains, in addition to the above-mentioned alloying elements (Ni, In, Sn, Nd' Gd, La, and Y), elements containing heat resistance of -20 to 200914971 liters other than the above (for example, from At least one selected from the group consisting of Mg, Cr, Μη, Ru, Ru, Pd, Ir, Pt, Ce, Pr 'Tb, Sm, Eu, Ho, Er, Tm, Yb, Lu, and Dy The at least one element selected from the group consisting of Ti, V, Zr, Nb, Mo, Hf, Ta, and W may be used. Further experiments were carried out to confirm that the effects of the present invention can be obtained even if these alloying elements are added. Hereinafter, preferred embodiments of the TF T substrate according to the present invention will be described with reference to the drawings. Hereinafter, a liquid crystal display device having an amorphous 矽TF substrate (Embodiment 1) or a polysilicon substrate (Embodiment 2) will be described as a representative. However, the present invention is not limited thereto, and may be suitable before The scope of the subject matter described below is appropriately changed and implemented, and any of these is also included in the technical scope of the present invention. Further, it has been experimentally confirmed that the A1 alloy film used in the present invention is also applicable to, for example, a reflective electrode for forming a reflective liquid crystal display device or the like, or a TAB connection electrode used for inputting and outputting signals to the outside. Material. (Embodiment 1) An embodiment of an amorphous germanium TFT substrate will be described in detail with reference to Fig. 3. Fig. 3 is a schematic cross-sectional explanatory view showing a preferred embodiment of a bottom drain type T F τ substrate according to the present invention. In the third drawing, the same reference numerals as in the above-mentioned second drawing of the conventional TFT substrate are shown. As is apparent from Fig. 2 and Fig. 3, the conventional TFT substrate is not 'on the scan line 25' on the gate electrode 26, and the source_drain wiring 34 is above or below the 'Fig. 2'. Each of the barrier metal layers 5 1 , 52 , 54 - 21 - 200914971 , 5 3 ' is formed in the TFT substrate of the first embodiment, and the barrier metal layers 41, 5 2, 5 4 can be omitted. In other words, when the first embodiment is used, the wiring material used for the source-drain electrode 29 of the TF 直接 can be directly contacted with the transparent pixel electrode 5 without the barrier metal layer being shielded as in the prior art. According to this, it is possible to achieve good TFT characteristics equal to or higher than the conventional TFT substrate (refer to Examples to be described later). Further, as shown in the first embodiment, the wiring material used in the present invention can be applied to a wiring material of a source-drain electrode in addition to a wiring material applied to a source-drain electrode and a gate electrode. The barrier metal layer 504 can be omitted. Further, when the wiring material is applied to the wiring material of the gate electrode, the barrier metal layers 5 1 and 5 2 may be omitted. Even in these embodiments, the liquid has been confirmed to have good TFT characteristics similar to those of the conventional TFT substrate. Next, an example of a method of manufacturing an amorphous germanium TFT substrate according to the present invention shown in Fig. 3 will be described with reference to Figs. 4 to 11 . Here, as a material used for the source-drain electrode, the gate electrode, and the wiring thereof, an alloy (specifically, A1-0.5 atomic percent Ni-0.5 atomic percent Gd alloy) is used. The thin film transistor is an amorphous germanium TFT which uses hydrogen as an amorphous layer. The same reference numerals as in Fig. 3 are given to Figs. 4 to 11 . First, an Al-0.5 atomic percent Ni-0.5 atomic percent In-〇_l atomic percentage Gd alloy having a thickness of about 200 nm is formed by a sputtering method on a glass substrate (transparent substrate) 1a. The film formation temperature of the sputtering was set to 100 °C. The gate electrode 26 and the scanning line 25 are formed by patterning the film (refer to Fig. 22-200914971, see Fig. 4). At this time, in the fifth drawing to be described later, in order to make the coverage of the gate 27 preferable, the edge of the laminated film may have a tapered shape of about 30° to 40°. Next, as shown in Fig. 5, a ruthenium oxide film (SiOx) insulating film 27 having a thickness of about 300 nm is used, for example, by a CVD method. The film formation temperature of the transistor CVD method is approximately set to . Next, the film formation temperature of the plasma CVD method was set to about 250 °C. The gate insulating film 27 is formed into a hydrogenated amorphous germanium film (a-Si-H) having a thickness of about 50 nm by a method such as a plasma CVD method, and a nitride film (SiNx) of about 300 nm. Next, the tantalum nitride film (S iNx ) was patterned by using the gate electrode 26 as the back surface of the mask as shown in Fig. 6, and the protective film was formed. Further, after forming an amorphous ruthenium film (n + a-Si-H) 56 having a thickness of about 50 mm of phosphorus, a hydrogenated amorphous ruthenium film (a-Si-H) is obtained as in the seventh step. 55 and n + type hydrogenated amorphous n + a-Si-H) 56 were patterned. Next, a G1-alloy film of a thickness of 50 nm left 1 film and a thickness of about 300 nm of A1-0.5 atomic percent Ι η -1·1 was formed thereon by sputtering. The film formation temperature of the sputtering was set to 10 ° C. The pattern is formed as shown in Fig. 8, and the signal electrode one electrode 28 is formed, and the drain electrode of the pixel electrode 5 is directly contacted, and the source electrode 28 and the drain electrode 29 are masked. The n + -type hydrogenated amorphous germanium film on the dry etching channel protective film (S i N x ) (n + a _ 5 6 〇 insulating film etching method or the like forms a gate 25 〇t, then, upper, shape and thickness light, For example, a tantalum film is formed by passing a n + -type hydrogen pattern (the Mo atom is ubiquitous, the source of the borrower is 29, and the Si-H is removed) -23- 200914971 Next, as shown in Fig. 9, for example, electricity is used. In the slurry CVD apparatus, a tantalum nitride film 30 having a thickness of about 30 nm is formed to form a protective film. The film formation temperature at this time is performed, for example, at about 22 (TC). Next, light is formed on the tantalum nitride film 30. After the resist layer 3 1 , a tantalum nitride film 30 is patterned, and a contact hole 3 2 is formed in the tantalum nitride film 30 by, for example, dry etching, etc., while being connected to the TAB on the gate electrode of the panel end portion. Part of the contact hole is formed (not shown). Then, after the ashing process performed by, for example, oxygen plasma, as in the first As shown in the figure, the resist layer 31 is peeled off using, for example, an amine-based stripping liquid. Finally, for example, as shown in Fig. 11, for example, as shown in Fig. 11, for example, a thickness of about 40 nm is formed. The ITO film is formed by patterning by performing wet etching to form the transparent pixel electrode 5. At the same time, in the portion where the TAB is connected to the gate electrode at the end of the panel, the ITO film is patterned by performing the bonding with the TAB. At this time, the TFT array is completed. The TFT substrate-based drain electrode 29 and the transparent pixel electrode 5 are directly in contact with each other, and the gate electrode 26 and the ITO film for TAB connection are also in direct contact with each other. Although the A1 alloy is formed on the glass substrate, the object of forming the A1 alloy film of the present invention is not limited to the glass substrate, and for example, it is an insulating film or an active semiconductor film (for example, an amorphous Si layer (amorphous germanium). The layer) or the poly-Si layer (polylayer) may be a barrier metal layer (for example, an M-layer film or a W film). Further, in the above, although an IT film is used as the Transparent pixel electrode 5, but even -24 - 200914971 It is also possible to use an IZO film (InOx-ZnOx-based conductive oxide film). The liquid crystal display device shown in Fig. 1 is completed by the method described below, for example, by using the TF substrate obtained as described above. On the surface of the TFT substrate 1 fabricated as described above, for example, polyimine is applied, and after drying, a rubbing treatment is performed to form an alignment film, and the other 'opposing substrate 2 is attached to the glass substrate by, for example, chromium (Cr). The patterns are formed in a matrix to form a light shielding film 9. Next, a red, green, and blue color filter 8 made of resin is formed in the gap between the light shielding films 9. On the light-shielding film 9 and the color filter 8, a transparent conductive film like an ITO film is disposed as a common electrode 7 to form a counter electrode. Then, for example, polyimine is applied to the uppermost layer of the counter electrode, and after drying, a rubbing treatment is performed to form an alignment film 11 . Then, the TFT substrate 1 and the surface of the alignment film 11 on which the counter substrate 2 is formed are disposed to face each other, and the resin substrate or the like is sealed, and the TFT substrate 1 is bonded to the sealing port of the liquid crystal. The opposite substrate 2 is used. At this time, the gap between the two substrates is kept substantially constant between the TFT substrate 1 and the counter substrate 2 so as to sandwich the spacers 15. The empty crystal cell thus obtained is placed in a vacuum, and is gradually returned to atmospheric pressure in a state where the sealing port is immersed in the liquid crystal, whereby the liquid crystal material containing the liquid crystal molecules is injected into the empty cell to form a liquid crystal layer, and the sealing is sealed. Entrance. Finally, the polarizing plate 10 is attached to both sides of the outer surface of the empty cell to complete the liquid crystal display. Next, as shown in Fig. 1, the drive 13-200914971 circuit 13 for driving the liquid crystal display device is electrically connected to the liquid crystal display, and is disposed on the side or back portion of the liquid crystal display. Then, the liquid crystal display is held by a holding frame 23 including an opening to be a display surface of the liquid crystal display, a backlight 2 2 constituting the surface light source, and a light guide plate 20 and a holding frame 23, and the liquid crystal display device is completed. (Embodiment 2) An embodiment of a polysilicon TFT substrate will be described with reference to Fig. 2'. Fig. 1 is a schematic cross-sectional explanatory view showing a preferred embodiment of a top gate type TFT substrate according to the present invention. In Fig. 2, the same reference numerals as in the second diagram showing the conventional TFT substrate are given. In the second embodiment, the polysilicon is used instead of the amorphous germanium, and the top gate type TFT substrate fulcrum is used instead of the bottom gate type, which is different from the above-described first embodiment. Specifically, in the polyfluorene TFT substrate of the second embodiment shown in Fig. 2, the active semiconductor film is made of a polyfluorene-free polyfluorene film (P〇ly-Si) and ion-implanted phosphorus (P) and iodine. The point formed by the polysilicon film (np〇ly-Si) of (As) is different from the amorphous austenitic TFT substrate shown in the above table 3. Further, the signal line is formed to intersect the scanning line via the interlayer insulating film (Si〇x). According to the second embodiment, the barrier metal layer 504 can be omitted. That is, the wiring material used for the source-drain electrode 29 of the TFT can be directly brought into contact with the transparent pixel electrode 5 by blocking the metal layer as in the past, and it is confirmed by experiments that it can be realized by experiments. Good TFT characteristics equal to or higher than the conventional TFT substrate. In the second embodiment, when the alloy crucible is used for the wiring material of the gate electrode -26-200914971, the barrier metal layers 5 1 and 5 2 can be omitted. Further, if the alloy is applied to the source When the wiring material of the gate electrode and the gate electrode is used, the barrier metal layers 5 1 , 5 2, and 5 4 may be omitted. It has been confirmed that even in these cases, good TFT characteristics equal to or higher than those of the conventional TFT substrate can be achieved. Next, an example of a method of manufacturing a polysilicon TFT substrate according to the present invention shown in Fig. 12 will be described with reference to Figs. 13 to 19 . Here, as the source-drain electrode and its wiring material, an A1 alloy (specifically, an A1-0.5 atomic ratio Ni-0.5 atomic percentage In_〇_丨 atomic percentage Gd alloy) was used. The thin film transistor is a poly germanium TFT using a polyfluorene film (poly_Si) as a semiconductor layer. From Fig. 13 to Fig. 19, the same reference numerals as in Fig. 2 are assigned. First, on the glass substrate 1a, a tantalum nitride film (SiNX) having a thickness of about 50 nm is formed by a plasma c VD method or the like at a substrate temperature of about 300 ° C. A tantalum film (si〇x) and a hydrogenated amorphous sand (a-Si-H) having a thickness of about 50 nm. Next, since the hydrogenated amorphous ruthenium film (a-Si-H) is polycondensed, heat treatment (about 470 ° C for about 1 hour) and annealing are performed. After performing the dehydrogenation treatment, the hydrogenated amorphous ruthenium film (a-Si-H) is irradiated with a laser having an energy of about 23 mJ/cm 2 using, for example, a quasi-molecular laser annealing device, to obtain a thickness of about 0.3 μm. Polyfluorene film (P〇ly-Si) (Fig. 13). Next, as shown in Fig. 14, a polysilicon film (poly-Si) is patterned by plasma etching or the like. Next, as shown in Fig. 15, a ruthenium oxide film (Si 〇 x ) having a thickness of about 1 〇〇 nm is formed, and a gate insulating film 27 of -27-200914971 is formed. On the gate insulating film 27, A1-0.5 atomic percent Ni-0.5 atomic percent of In-0.1 atomic percent Gd alloy film 26 and Mo film 52 having a thickness of about 50 nm are laminated by a thickness of about 200 nm by beach plating or the like. Thereafter, it is patterned by plasma uranium engraving or the like. According to this, the scanning line and the integrated gate electrode 26 are formed. Next, as shown in FIG. 16, the mask is formed by the photoresist 31. For example, an ion implantation apparatus or the like is used, for example, to dope lxl〇15 at about 50 keV. Phosphorus around /cm2 forms an n + -type polyfluorene film (n + poly-Si) in one part of the polyfluorene film (P〇ly-Si). Next, the photoresist 3 is peeled off, and the phosphorus is diffused by, for example, heat treatment at about 5 °C. Next, as shown in Fig. 17, a ruthenium oxide film (Si〇x) having a thickness of about 50,000 nm is formed at a substrate temperature of about 250 ° C by using, for example, a plasma CVD apparatus, and the like, after forming an interlayer insulating film, A contact hole is formed by dry etching the interlayer insulating film (Si Ox ) and the yttrium oxide film of the gate insulating film 27 by using a patterned mask. By sputtering, a Mo film having a thickness of about 50 nm and an A1-0.5 atomic percent Ni-〇·5 atomic percent In-0.1 atomic percentage Gd alloy film having a thickness of about 450 nm are formed, and then formed into a single signal line by patterning. Source electrode 28 and drain electrode 29. As a result, the source electrode 28 and the drain electrode 29 are each in contact with the n + -type polyfluorene film (n + poly-Si) via the contact hole. Then, as shown in Fig. 18, an interlayer insulating film is formed by a plasma CVD apparatus or the like to form a tantalum nitride film (S iNx ) having a thickness of about 5 nm at a temperature of about 20 ° C. After the photoresist layer 31 is formed on the interlayer insulating film, a nitride film (S i N X ) is patterned, and the contact hole 32 is formed in the tantalum nitride film (SiNx) by, for example, dry etching -28-200914971. Then, as shown in FIG. 19, after the ashing process by the oxygen plasma, for example, the photoresist is peeled off using an amine-based brake liquid or the like in the same manner as in the above embodiment, and then the pattern by wet etching is performed. The transparent pixel electrode 5 is formed by fabrication. In the poly germanium TFT substrate thus produced, the drain electrode 29 is in direct contact with the transparent pixel electrode 5. A-0.5 atomic percentage of Ni-0.5 atomic percentage of Indium-doped electrode 29 is deposited at the interface between the Gd alloy film and the pixel electrode 5 to deposit an intermetallic compound of Ni to reduce the contact resistance of the A1 alloy film and the pixel electrode. Moreover, since Ni is deposited as a monomer, the recrystallization of A1 is promoted, and the resistivity of the A1 alloy film itself is greatly reduced. Then, since the characteristics of the transistor are stabilized, it is, for example, about 2 2 ° ° C. When the heat treatment is performed for about 1 hour, the polysilicon TFT array substrate is completed. When the TFT substrate according to the second embodiment and the liquid crystal display device including the TFT substrate are used, the same effects as those of the TF T substrate according to the first embodiment described above are obtained. Further, the A1 alloy in the second embodiment can also be used as a reflective electrode of a reflective liquid crystal. Using the thus obtained TFT array substrate, the liquid crystal display device was completed in the same manner as the TFT substrate of the above-described first embodiment. EXAMPLES Hereinafter, the present invention will be specifically described by way of examples, but the present invention is not limited by the following examples, and may be modified as long as it is suitable for the scope of the above-mentioned -29-200914971. Any of these are included in the technical scope of the present invention. Also, the "-" in the table below indicates that it cannot be measured or evaluated. With respect to the A1 alloy film of various alloy compositions shown in Tables 1 and 2 (the residual portion is an unavoidable impurity), the Ni amount distribution in the vicinity of the surface of the A1 alloy film was measured as follows (the following (4), A1) The resistivity of the alloy film itself (the following (5)) and the contact resistance when the A1 alloy film is directly contacted to the transparent pixel electrode (the following (6)), and the uranium engraved A1 alloy film is measured. At the time of the etching rate, the uranium resistance (hereinafter (7)) was evaluated, and the density of the protrusions was measured while heating the A1 alloy film to evaluate the heat resistance (the following (8)). Further, lithography was also performed. Visual inspection in the following (9 (9) below.) Various characteristics of the A1 alloy film were evaluated by the following procedure (1) Indium tin oxide (ITO) containing 10% by mass of tin oxide added to indium oxide was used as the transparent pixel. (2) The formation condition of the A1 alloy film is a film formation method using DC sputtering method to set the surrounding gas to argon, the pressure to 3 mT 〇rr, and the thickness to 30 〇 nm 〇 (3) The amount of each alloying element in the AL alloy film is determined by ICP luminescence analysis (inductively coupled plasma luminescence analysis) (4) The distribution of the amount of Ni in the vicinity of the surface of the A1 alloy film was fabricated using the Marcus-type high-frequency glow discharge surface analysis device (GD-OES. JY-5 000 RF), and the gas pressure was set. It is 3 0 0 P a, the power is set to 2〇w', the frequency is set to 500Hz, and the duty cycle is set to 0.125 and -30-200914971. (5) The resistivity of the A1 alloy film is on the glass substrate. The A1 alloy film is formed by a line of 10 widths and spaces and is subjected to a heat treatment between 2 and 50 ° C for -20 minutes in a range of inert gas. The resistance is less than 5.0 // Ω · cm. When it is judged as qualified (〇)' above 5 · 0 /ζ Ω • cm, it is judged as unacceptable (X). (6) Contact resistance when directly contacting the A1 alloy film and the transparent pixel electrode is The Kelvin pattern (contact hole size: ΙΟμπι angle) as shown in Fig. 20 is subjected to 4-terminal measurement (current is made to flow into the ΙΤ〇_Α1 alloy film, and the voltage drop between the IΤ 〇-A1 alloy is measured by another terminal. Method). Specifically, let the current flow into the I-turn of Figure 20 by monitoring The voltage V between Vi-Vz is obtained by taking the contact resistance R of the contact portion C (contact portion C) as [R = (Vl - v2) / ι2]. The contact resistance is rated as qualified when 値 is less than 1000 Ω. When it is more than 1000 评定, it is judged as unqualified. Also, in Table 2 below, when the stage 値 is less than 200 Ω, it is rated as excellent ( ◎), and 値 is higher than 200 Ω lower than 1 〇〇〇. When Ω is rated as excellent (〇), when 値 is higher than 100 Ω, it is judged as unacceptable (X) ° (7) The etching rate at the time of etching the A1 alloy film by the developing liquid is formed on the glass substrate. After the A1 alloy film was applied to the mask, it was immersed in a developing solution (TMAH 2.3 8% solution) for 1 minute, and the amount of etching was measured using a palpation step meter. When the uranium engraving rate is lower than 100 nm / m 1 n, the corrosion resistance is excellent (◎), and when the uranium engraving rate is higher than l〇〇nm/min and less than 15 Onm/min, it is evaluated as Excellent corrosion resistance (〇)' When the etching rate was 150 nm/min or more, it was evaluated as poor tolerance to starvation (x). -31 - 200914971 (8) When the A1 alloy film is heated, the density of the protrusions is in the above (5), the surface shape of the A1 alloy film after the heat treatment is observed by an optical microscope, and the number of protrusions is measured to calculate the density of the protrusions. . The optical microscope observation was performed at a magnification of 500 times. The density of the protrusions is less than 1.0x1 〇1 ()/m2, and the heat resistance is excellent (qualified, 〇) when no surface roughness is generated, and the heat resistance is evaluated when the surface roughness is generated (C qualified, △), when the density of the protrusions is higher than 1.30 x 101 () / m 2 or more, the heat resistance is poor (failed 'x ). (9) The visual inspection in the lithography process was carried out by observing the film peeling and discoloration at the time of forming a wiring pattern having a width of ΐΟμηη. The visual inspection is judged as acceptable (〇) when the film is peeled off or discolored, and is judged as unacceptable (X) when it is judged to be film peeling or discoloration. In the comprehensive evaluation, all the properties evaluated in (5) to (9) above satisfy the qualification criteria 'Evaluation of contact resistance when the A1 alloy is self-resistance ◦, and directly contacted with the A1 alloy film and the transparent pixel electrode. For ◎ or 〇, the evaluation of the protrusion degree when heating the A1 alloy film is 〇 or △, and the evaluation of the appearance inspection in the lithography project is 〇 as the premise 'and the heat resistance is evaluated as 〇, and etching The rate is evaluated as the total evaluation ◎ (excellent), and the etch rate is evaluated as 〇', but the heat resistance is evaluated as Δ, which is evaluated as comprehensive evaluation △ (excellent). Further, when the qualification criteria of any of the characteristics (5) to (9) are not satisfied, the total evaluation X (failed) is taken. (Experimental Example 1) -32-200914971 A film was produced by using the A1 alloy film having the composition shown in Table 1 below as the A1 alloy film by the procedure of the above-described first embodiment. With respect to the obtained TFT element, the distribution of the amount of Ni in the vicinity of the surface of the A1 alloy film was investigated under the conditions shown in the above (4), and the amount of Ni from the surface of the film from 3 Onm was calculated and shown by the above (6). The conditional measurement measures the contact resistance when the A1 alloy film is in direct contact with the transparent pixel electrode. The results of the surface Ni amount and the contact resistance are shown in Table 1 below, and specifically, an example of the result of investigating the distribution of the amount of Ni in the vicinity of the surface of the A1 alloy film is shown. Forming on the glass substrate (a) A1-1.0 at% to 0.5 atom% In-O. 1 atom 5% Gd, (b) A1 -1 _ 0 atom% N i - 0.5 atom% Sn-0.1 atom% Gd or It is (c) eight-2.0 atomic %>^-0.35 atom% La, followed by heat treatment at 25 ° C for 30 min, and the heat-treated A1 alloy film is measured from the film surface using GD-OES under the above condition (4). The amount of Ni in the thick direction. The measurement results are shown in Fig. 221. From the 21st map, the amount of Ni at a position of 30 nm from the film surface was calculated, and this was defined as the amount of surface Ni. As is apparent from Fig. 21, when the Al-Ni alloy contains In or Sn (the above a and b), the amount of Ni in the region of 30 to 200 nm from the surface of the A1 alloy film is about 1 atomic percent, and Ni is also deposited and distributed. Near the surface of the A1 alloy film. In addition, it can be seen that when the Al-Ni alloy does not contain In or Sn (c), regardless of the content of 2.0 atom% 2Ni, the amount of Ni in the region of 20 to 200 nm from the surface of the yan alloy film is at most 〇_3 〇. At 8 atomic percent, most of the Ni was painted on the bottom side of the A1 alloy film. -33 - 200914971

N 〇. Composition of AL alloy film (unit of number at at%) Surface amount of Ni (at%) Contact resistance (Ω) 1 Al-0.02Ni < 0.01 8 3 05 2 Al-0.05Ni < 0.01 3 3 22 3 Al-0,3Ni 0.10 554 4 Α1-0.5ΝΪ 0.11 332 5 Al-1 .ONi 0.12 332 6 Al-2 .ONi 0.14 166 7 Al-2.0Ni-0.35La 0.14 127 8 Al-0.02Ni-0.2In 0.0 1 202 1 9 Al-0.05Ni-0.2In 0.04 279 10 Al-0.5Ni-0.2In 0.30 132 11 Al-0.02Ni-0.5In 0.02 1572 12 Al-0.05Ni-0.5In 0.05 267 13 Α1-0.5ΝΪ- 0.5In 0.3 1 125 14 Al-0.02Ni-0.2Sn 0.0 1 1982 15 Al-0.05Ni-0.2Sn 0.03 1 94 1 6 Al-0.5Ni-0.2Sn 0.33 145 17 Al-0.02Ni-0.5Sn 0.02 1730 18 Al -0.05Ni-0.5Sn 0.05 284 19 Al-0.5Ni-0.5Sn 0.42 13 8 From Table 1, the following can be considered. No. 1 to 6 are conventional examples (Al-Ni alloy) which do not contain In and/or Sn, and the amount of Ni on the surface side of the A1 alloy film decreases during heat treatment, and the amount of Ni decreases as compared with the average composition of the Ale alloy film. . Therefore, it can be seen that as the amount of Ni is smaller, the contact resistance is rapidly increased. Further, in order to increase the Ni content and reduce the contact resistance, a contact resistance of about 300 Ω is achieved, and the two-component alloys of A1 and Ni must be To -34- 200914971 Contains 0.5 atomic percent less Ni. On the other hand, in No. 8 to No. 1 and No. 1, 2, and 4, in the case of containing In or Sn, it is understood that the surface can be enlarged by adding In or Sn by a ternary alloy of A1 and Ni. The amount of Ni can lower the contact resistance compared to the ternary alloy. Therefore, when In or Sn is contained, even if the amount of Ni is 0.05 atomic percent, the contact resistance of about 300 Ω can be achieved, and the amount of Ni contained in the A1 c alloy film can be reduced. Further, No. 7 is a reference example, and in order to make the Al-Ni alloy contain La (heat-resistant upper element), when it is necessary to contain N 之. 6 of the amount of copper, even if it contains La, the amount of surface Ni Hardly change. (Experimental Example 2) A TFT element was produced by using the A1 alloy film having the composition shown in Table 2 below as the A1 alloy film by the procedure of the above-described first embodiment. With respect to the obtained TFT element, the resistivity, contact resistance, etching rate, and protrusion density (heat resistance) of the A1 alloy film were measured under the conditions shown in the above (5) to (9), and visual inspection was performed. The results are shown in Table 2 below. -35- 200914971 [Table 2]

Composition of No. A1 alloy film (unit of number at at%) Contact resistance Resistivity Etching rate Appearance inspection Heat resistance comprehensive evaluation 値 (Ω) Evaluation 値 (μΩ - cm) Evaluation 値 (nm / min) Evaluation 21 Α 1- 0.02ΝΪ 8305 X 3.2 〇35 〇〇XX 22 Al-0.05Ni 3322 X 3.2 〇42 〇〇XX 23 AI-0.3Ni 554 〇3.4 〇51 〇〇XX 24 Al-l.ONi 332 〇3.9 〇125 △ 〇Δ Δ 25 Al-2.0Ni 166 ◎ 4.2 〇132 △ 〇Δ Δ 26 Α1-3.0ΝΪ 128 ◎ 4.6 〇160 X 〇XX 27 Al-0.02Ni-0.5In 1572 X 3.6 〇52 〇〇Δ X 28 AI-0.05Ni -0.5In 267 〇3.6 〇56 〇〇△ 〇29 Al-0.3Ni-0.5In 221 〇3.8 〇61 〇〇Δ 〇30 AM.0Ni-0.5In 132 ◎ 4.4 〇131 Δ 〇Δ Δ 31 Al-1.0Ni -0.5In 124 ◎ 4.8 〇136 Δ 〇Δ Δ 32 Al-2.0Ni-0.5In 126 ◎ 5.3 X 155 X 〇Δ X 33 Al-3.0Ni-0.5Sn 1730 X 3.7 〇32 〇〇Δ X 34 Al-0.05 Ni-0.5Sn 289 〇3.8 〇45 〇〇A 〇35 Al-0.3Ni-0.5Sn 257 〇3.9 〇43 〇〇Δ 〇36 Al-l.0Ni-0.5Sn 134 ◎ 4.5 〇92 〇〇Δ 〇37 Al -2.0Ni-0.5Sn 125 ◎ 4.9 〇102 Δ 〇Δ Λ 38 Al-3.0Ni-0.5Sn 129 ◎ 5.5 X 157 X 〇Δ X 39 Al-0.5Ni-0.02In 329 〇3.5 75 〇〇XX 40 Al-0.5Ni-0.1In 147 ◎ 3.7 82 〇〇Δ 〇41 Al-0.5Ni-0.7In 132 ◎ 4.6 97 〇〇A 〇42 Al-0.5Ni-l.0In 137 ◎ 4.9 103 Δ 〇Δ Δ 43 Al-0.5Ni-0.5In-0.02Gd . . 116 Δ XX 44 Al-0.5Ni-0.5In-0.02Gd 135 ◎ 4.3 〇92 〇〇Δ 〇45 Al-0.5Ni-0.5In-0.1Gd 142 ◎ 4.4 〇85 〇〇〇◎ 46 AI-0.5Ni -0.5In-0.5Gd 139 ◎ 4.8 〇Ί2 〇〇〇◎ 47 Al-0.5Ni-0.5In-0.02La 132 ◎ 4.4 〇96 〇〇Δ 〇48 Al-0.5Ni-0.5In-0.lLa 128 ◎ 4.5 〇88 〇〇〇◎ 49 Al-0.5Ni-0.5In-0.5La 135 ◎ 4.9 〇75 〇〇〇◎ -36 - 200914971 The following is considered from Table 2. It can be seen that when the comparison No. 2 1 increases as the amount of Ni increases, the contact resistance decreases. However, as the increase increases, the resistivity increases. Further, it is understood that when the amount of Ni is increased, the amount of Ni is increased, and the corrosion resistance is deteriorated. When the etching rate is increased, it should be the case where the A1 alloy solution is dissolved, and Ni becomes an electrode to promote the A1 alloy film. No. 27 to 32 are the same as A1 shown in the above Nos. 1 to 6, and contain 0.5 atom. An example of a percentage of In. When each of Comparative Nos. 21 to 26 and No. 27 to 32 is the same, the contact resistance can be lowered by containing In. In particular, the effect of reducing the contact resistance caused by the inclusion of In is more remarkable. However, when the amount of Ni is the same, the In resistivity is slightly increased in addition to Ni, and it is understood that In is almost audible to the uranium engraving rate.

No. 33 to 38 are examples in which the amount of Ni is the same as that of the two films shown in the above Nos. 21 to 26, and contains 0.5 atomic percent of Sn. When each of Nos. 21 to 26 and No. 33 to 38 is used, the same effect as In can be obtained. That is, it is understood that the amount of Ni is the same, and Sn' is contained to reduce the contact resistance. In particular, the smaller the amount of Ni, the more the contact resistance is reduced. On the other hand, when Sn is contained except for Ni, the resistivity is high, and it is understood that S η hardly affects the etching rate. Νο_39~43 is an amount of In contained in Ni atom containing 0.5 atomic percent, in the range of 0.2 to 2.0 atomic percent to 26, when the amount of N i is etched, the film is in the image. Corrosion is caused by the alloy film phase. J knows the amount of Ni, and the amount of Ni is exerted. At that time, the electric current does not cause the shadow of the alloy, and the amount of Sn and Ni is slightly changed. The alloy of the alloy is changed to -37-200914971. It can be seen that when the amount of Ni is 0.5 atomic percent, the contact resistance becomes less than 200 Ω and the resistivity can be lowered to less than 5.0// Ω · cm by containing In in the range of 0·1 to 1 . ). However, when 2.0 in atom% of In is contained, film peeling occurs in the lithography process, so that it cannot be put into practical use. The film peeling should be excessively affected by the fact that In is segregated on the surface of the film, and the adhesion to the object to be contacted is remarkably lowered.

No. 39 to 43 are selected from the group consisting of Ni which contains 0 to 5 atomic percent of Ni and In which contains 5% by atom of In, and which are composed of Nd, Gd, La, and Y which are elements for improving heat resistance. The example of the element is as shown in No. 27 to 32, and does not contain an element for improving heat resistance' or when the content of the heat-resistant element is increased as shown by Νο. 44 or No. 47. At the time of heat treatment between 0 t and X 2 0 minutes, although the density of the protrusions can be reduced to some extent, the surface is rough. Further, as in the case of No. 45, 46' 48, and 49, it is understood that when the elevated heat-resistant element is contained in a specific amount, the density of the projections can be reduced and the surface roughness can be suppressed. However, although the heat-resistant element has little influence on the contact resistance or the etching rate, since the specific resistance becomes large, when the element having the heat-resistant element is contained, the range of the desired heat resistance can be ensured as small as possible. Although the present invention has been described in detail with reference to the specific embodiments thereof, various modifications and changes may be made without departing from the spirit and scope of the invention. The present invention is incorporated by reference in its entirety to Japanese Patent Application No. JP 2 〇〇 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Further, the entire contents of which are incorporated herein by reference. [Industrial Applicability] According to the present invention, it is possible to obtain a display device which is excellent in productivity, inexpensive and high in performance. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic enlarged cross-sectional view showing a configuration of a representative liquid crystal display to which an amorphous germanium TFT substrate is applied. Fig. 2 is a schematic cross-sectional explanatory view showing the structure of a conventional amorphous 矽τ ρ T substrate. Fig. 3 is a schematic cross-sectional explanatory view showing the configuration of a TFT substrate according to the first embodiment of the present invention. Fig. 4 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in Fig. 3 in order. Fig. 5 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in Fig. 3 in order. Fig. 6 is an explanatory view showing an example of a manufacturing process of the TF T substrate shown in Fig. 3 in order. Fig. 7 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in Fig. 3 in order. -39- 200914971 Fig. 8 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in Fig. 3 in order. Fig. 9 is an explanatory view showing an example of a manufacturing process of the TF T substrate shown in Fig. 3 in order. Fig. 10 is an explanatory view showing an example of a manufacturing process of the TF T substrate shown in Fig. 3 in order. Fig. 1 is an explanatory view showing an example of a manufacturing process of the TF T substrate shown in Fig. 3 in order. Fig. 1 is a schematic explanatory view showing a configuration of a TFT substrate according to a second embodiment of the present invention. Fig. 1 is an explanatory view showing an example of the manufacturing process of the τ ρ τ substrate shown in Fig. 2 in order. Fig. 14 is an explanatory view showing an example of the manufacturing process of the τ F T substrate shown in Fig. 12K of Fig. 7K. Fig. 15 is an explanatory view showing an example of a manufacturing process of the TFτ substrate shown in Fig. 2 in order. Fig. 16 is an explanatory view showing an example of the manufacturing process of the τ F T substrate shown in Fig. 1 in the order of the sequence. Fig. 17 is an explanatory view showing an example of the manufacturing process of the τ F T substrate shown in Fig. 2 in order. Fig. 18 is an explanatory view showing an example of the manufacturing process of the TF T substrate shown in Fig. 2 in order. Fig. 19 is an explanatory view showing an example of the manufacturing process of the TF T substrate shown in Fig. 2 in order. -40- 200914971 Fig. 20 is a Kelvin pattern (TEG pattern) used for the measurement of the contact resistance between the A1 alloy film and the transparent conductive film. Fig. 2 is a graph showing the result of measuring the amount of Ni in the surface of the A1 alloy film in the film thickness direction. [Description of main component symbols] 1 : TFT substrate 2 : opposite electrode 3 : liquid crystal layer 4 : thin film transistor (TFT) 5 : transparent pixel electrode 6 : wiring portion 7 : common electrode 8 color filter 9 : light shielding film 10a, 10b: polarizing plate 1 1 : alignment film 12 : TAB tape 1 3 : drive circuit 1 4 : control circuit 1 5 : spacer 1 6 : sealing material 1 7 _· protective film -41 - 200914971 1 8 : diffusion plate 1 9 : cymbal 2 0 : light guide plate 2 1 : reflector 22 : backlight 23 : holding frame 24 : printed substrate 2 5 : scanning line 2 6 : gate electrode 2 7 : gate insulating film 2 8 : source electrode 2 9 : The drain electrode 3 0 : Protective film (矽 nitride film) 3 1 '· Photoresist layer 3 2 : Contact hole 3 3 : Contact hole 3 4 : Signal line (source-drain wiring) 51, 52 , 53, 54: barrier metal layer 55: undoped hydrogenated amorphous germanium film (a-Si-H) 56 : n + hydrogenated amorphous germanium film (n + a-Si-H) 1 〇 0 : liquid crystal Display-42 -

Claims (1)

200914971 X. Patent Application No. 1 A display device belonging to a display device having a structure in which a conductive oxide film is directly in contact with an A1 alloy film, characterized in that the A1 alloy film contains 〜. 5 to 2.0 atomic percent. Ni and the total amount of In and/or Sn containing 〇.05 to 1.0 atomic percent. 2. The display device according to claim 1, wherein the A1 alloy film further contains 0.05 to 0_5 atomic percent of at least one element selected from the group consisting of Nd, Gd, La, and Y. , as other elements. The display device according to claim 1 or 2, wherein the A1 alloy film is a constituent member of a thin film transistor. 4. The display device according to claim 1 or 2, wherein the A1 alloy film is a constituent member of the scanning line of the display device, and the display device according to claim 1 or 2 Wherein the above A1 alloy film is a drain electrode of a thin film transistor. 6. The display device according to claim 3, wherein the A1 alloy film is a drain electrode of a thin film transistor. 7. A sputtering target, belonging to a sputtering target for forming an A1 alloy film, characterized by: containing 0.05 to 2.0 atomic percent of Ni and a total of 0. 〇 5 to 1.0 atomic percent of 4 and/or Sn. 8. The sputtering target according to item 7 of the patent application, wherein a total of 原子.〇5~0_5 atomic percent is selected from the group consisting of Nd, Gd, La, and -43-200914971 γ At least one element, as another element - 44 -