TW201205802A - Semiconductor device and method for forming the same - Google Patents

Semiconductor device and method for forming the same Download PDF

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TW201205802A
TW201205802A TW099145764A TW99145764A TW201205802A TW 201205802 A TW201205802 A TW 201205802A TW 099145764 A TW099145764 A TW 099145764A TW 99145764 A TW99145764 A TW 99145764A TW 201205802 A TW201205802 A TW 201205802A
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trench
substrate
semiconductor device
recess
depth
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TWI440174B (zh
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Clement Hsingjen Wann
Chih-Hsin Ko
Cheng-Hsien Wu
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Taiwan Semiconductor Mfg
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  • Recrystallisation Techniques (AREA)
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  • Crystallography & Structural Chemistry (AREA)

Description

201205802 ^ 六、發明說明： 【發明所屬之技術領域】 本發明係有關於-種半導體裝置，特別是有關於一 種於蠢晶成長中使用倒梯形凹口（ invened卿⑽也】 recess 【先前技術】 可透過在一半導體基底上磊晶成長其他材料，例如 φ 二五（III_V)族材料，而提升半導體裝置的效能。磊晶 材料與半導體基底之間晶格結構的差異會在蟲晶層内= 成應力。磊晶層内的應力可改進積體電路的速度及效 能。舉例來說，為了進一步提升電晶體效能，因而使用 具有應變的通道區的半導體基底來製造電晶體。當η型 通道或Ρ型通道使用應變的通道區時，可增加載田子遷移 率（Carrierm〇biHty)而增加其效能。一般來說，希望能 夠在η型通道電晶體的通道區中沿源極至沒極方向產生 #伸張應變’以增加電子遷移率，而在ρ型通道電晶體的 通道區中沿源極至；:及極方向產生壓縮應變，以增加電洞 遷移率。 然而’在磊晶成長期間，由於不同材料的晶格結構 差異，而在磊晶層與半導體材料之間界面形成差排。-些差排從界面延伸通過蠢晶層。在—些情形中，差排可 能延伸至蠢晶層的表面。在上述情形中，差排延伸至或 接近於表面，差排會嚴重影響形成於_裝置的效能。 0503-A35159TWF/spii 201205802 【發明内容】 。 在本發明一實施例中，一種半導體裝置，包括：一 半導體基底’具有一溝槽及位於溝槽下方的一倒梯型凹 口，倒梯型凹口的侧壁具有（111 )晶面取向，溝槽的深 度與倒梯型凹口的側壁的長度比率等於或大於0.5 ;以及 一二五族蟲晶層，形成於溝槽及倒梯型凹口内。 本發明另一實施例中，一種半導體裝置，包括：一 半導體基底；多個第一溝槽，形成於半導體基底内並填 入一第一材料；一第二溝槽，位於半導體基底内且形成 於第一溝槽之間；一凹口，位於半導體基底内且位於第 二溝槽下方，凹口的側壁具有（111)晶面取向，第二溝 槽的深度大於或等於凹口側壁的長度的一半；以及一三 五知蟲晶層’形成於第二溝槽及凹口内。 .丰毛明又一實施例中，一種半導體裝置之製造方 法’包括：提供一基底；實施一第一蝕刻，以在基底内 2具有一第一深度的一溝槽；實施一第二餘刻，以在 :二：：成一凹口’第二蝕刻露出基底的。⑴晶面， 的（iu)晶面的側壁具有—第二距離，第一深 度為第二距離的至少一半； 五族材料。 1福日日取长一 L貫施方式】 且了 ΓI說明本發明實施例之製作與使用。缺而，3 實施例提供許多合適的發明概念而可 於廣泛的各種特定择旦 月 牙厅、。所揭示的特定實施例僅僅斥 0503-A35159TWF/spin 201205802 說明以特定方法製作及使用本發明，並非用以侷限本發 明的範圍。 第1圖係緣示出根據一實施例之一基底1 〇2，其内具 有溝槽隔離區104。基底102可包括：石夕塊材（bulk silicon )、摻雜或未摻雜的絕緣層上覆蓋半導體 (semiconductor-on-insulator，SOI)型基底或 SOI 基底的 主動（active)層。一般來說’ SOI包括形成於一絕緣層 上的一半導體材料層，例如矽。絕緣層可為埋入式氧化 φ ( buried oxide, BOX)層或氧化矽層。絕緣層形成於一基 底上’通常為矽基底或玻璃基底，然而也可使用其他基 底，例如多層或漸變（gradient)式基底。 溝槽隔離區104可透過先形成溝槽，接著在溝槽内 填入一介電材料而形成。在一實施例中，利用沉積及微 影技術’將一圖案化罩幕（未繪示）形成於基底102上， 例如一光阻罩幕及/或一硬式罩幕（hard mask)。之後， 實施钱刻製程’例如反應離子钮刻（reactive ion etch, 9 RIE)或其他乾蝕刻、非等向性濕蝕刻或任何適當的非等 向性蝕刻或圖案化製程’以在基底1〇2内形成溝槽。 形成之後，在溝槽内填入一介電材料而形成溝槽隔 離區104，如第1圖所气。舉例來說，介電材料可包括熱 氧化物或化學氣相沉積（chemical vapor deposition, CVD ) 氧化矽等等。也可包括組合的材料，例如氮化矽、氮氧 化矽、高介電常數材料、低介電常數材料、CVD多晶矽 或其他介電材料。可實施一平坦化製程，例如化學機械 研磨（chenical mechanical polish, CMP)或其他回蝕刻步 0503^A35159TWF/spin 5 201205802 驟’以平坦化介電材料的上表面以及基底l〇2 ，如第玉 圖所示。 第2圖係繪示出在溝槽隔離區1〇4之間的基底1〇内 形成一溝槽206。舉例來說，溝槽206可透過等向性乾麵 刻而形成。如第2圖所示，等向性乾蝕刻去除溝槽隔離 區104之間的基底1〇至一深度A。以下第3圖將有更詳 細的說明。控制深度A，使深度A與後續形成於基底1〇2 内的凹口的側壁表面的長度的比率大於或等於0.5。 第3圖係繪示出根據一實施例之實施一第二蝕刻， 以順著溝槽206底部形成一倒梯型凹口 310。以下將詳細 說明。在基底102内形成凹口 310,使基底102順著凹口 310 侧壁具有{111}表面取向（surface orientation)。生 了在凹口 310側壁形成{111}表面取向，基底1〇2需具有 (001 )表面取向。因此，透過使用具有（〇〇1 )晶向（Crystal orientation)的基底以及蝕刻而露出基底的（111)面， 可控制差排的方向及傳導，以提供表面上具有較少差排 的蠢晶層。 對溝槽206所實施的第二蝕刻係利用了結晶表面選 擇性非等向性濕蝕刻並可使用氫氧化四曱基録 (tetra-methyl ammonium hydroxide，TMAH)溶液，其體 積濃度（volume concentration)在1%至10%的範圍，而 溫度在15°C至50°C的範圍。在另一實施例中，也可使用 其他結晶表面選擇性濕蝕刻溶液，例如氫氧化銨 (ammonium hydroxide, NH3OH)、氫氧化鉀(potassium hydroxide, KOH)或胺基蝕刻溶液。上述選擇性濕蝕刻導 0503^A35159TWF/spin 6 201205802 致基底102順著溝槽206側壁露出{111}表面。如第3圖 所示’上述製程形成了一倒梯型凹口。 ° 第4圖係繪示出在凹口内磊晶成長一三五族材料 408。如第3圖所示，穿越差排（threading⑴心灿⑽） (如圖式中的線410所示）朝垂直於側壁表面的 方向延伸。在一實施例中，三五族磊晶層包括具有六方
晶體結構的氮化鎵（GaN)且形成於基底1〇2的（HD 表面上，磊晶材料408的穿越差排41〇朝GaN的（〇〇〇1) φ方向延伸。然而，當穿越差排41〇與（M〇〇)面相交， 穿越差排改變方向至（M〇〇)方向，其通常平行於凹口 側壁的{111}表面。 因此，選擇溝槽206的深度A，以容許穿越差排終 j於溝槽隔離區104的側壁，以提供表面實質上不具有 穿越差排的蟲晶材料。為了得到上述結構，深度a纽 或等於凹口 310的側壁長度（如帛4目的距離γ)的二 半0 第5圖係繪示出根據—實施例之最大深度d_的計 算（深度A的理論最大值），其中相同的部間隙使用相 同標號。平面A’表示GaN磊晶層的（M〇1)面，而平 面B，表示GaN磊晶層的（〇〇〇1)面。兩平面之間的角度 已知為62。。因此’最大深度‘與距離χ的關係取： 於以下的方程式： dmax =—- cos(54·7。) (方程式 1 ) 另外， (方程式2)
^ = tan(62°)x〇.5xF 〇503-A35159TWF/spin 201205802 因此，結合方程式1及2為 , _ 〇.5x7xtan(62°) u Π13Χ = ~ —^' COS丨 (54.7。） 1.627x7 (方程式3) 儘管深度A的理論最大值的計算如上，然而發現到 可最佳化成長條件而得到較小的深度A值。舉例來說， 發現到透過最佳化蝕刻及成長條件，深度A/Y的值約在 0.5至0.75的範圍。因此，在一實施例中，溝槽206具有 一深度A ’使深度A/Y大於或等於〇.5，而穿越差排41〇 終止於溝槽206的側壁。在一實施例中，透過控制乾钕 刻深度（蚀刻時間）及K0H或TMAH非等向性银刻深 度（蝕刻時間、溶液濃度及溫度），以控制凹口 31〇的 深度至小於200 nm。可在成長GaN之前，在石夕溝槽内形 成由A1N所構成的緩衝層（成長溫度為11〇〇°c、壓力為 lOOmbar並使用五族（Group-V)成長源（例如，NH3) 及三族（Group-Ill)前驅物（precursor)(例如，三曱基 鋁（trimethylaluminium))，且維持低的 V/III 比率（約 為650))。接著可在A1N緩衝層上成長GaN (成長溫 度為1120°C、壓力為200 mbar並使用五族成長源（例如， NH3 )及三族前驅物（例如，三曱基鎵（trimethylgalium))， 且維持相對高的V/III比率（約為1500))。 第6圖係‘繪示出倒梯型凹口的另一範例。在本範例 中，深度A延伸至溝槽隔離區1〇4的整個厚度。如此— 來’本實施例容許溝槽206及磊晶材料408延伸至溝槽 隔離區104的下方。調整溝槽隔離區1〇4的厚度以維持 上述的比率。 可以理解的是凹口側壁的長度Y1決定差排410如何 0503^A35159TWF/spin 8 201205802 晶層表面傳導。因此，較大的長度Y1具有較大的溝 θ隔離區104的厚度A，以容許有足夠的深度使差排終 止於隔離區而非磊晶材料4〇8的上表面。 雖然本發明已以較佳實施例揭露如上，然其並非用 =限定本發明，任何所屬技術領域中具有通常知識者， 在不脫離本發明之精神和範圍内，當可作更動、替代盘 满飾。再者’本發明之保護範圍並未侷限於說明書内所 =定實施例中的製程、機器、製造、物質組成、裝置、 本私1Ϊ驟’任何所屬技術領域中具有通常知識者可從 考谷中理解現行或未來所發展㈣製程、機 二集…物質組成、褒置、方法及步驟，只要可以在 施例中實施大體相同功能或獲得大體相同結 發明中。因此，本發明之保護範圍包括 上迷製程、機器、製造、物質組成、震置、方法及步驟。
0503-A35159TWF/spin 9 201205802 【圖式簡單說明】 =1至4 ®係繪不出根據—實施例之具有倒 口的铸«置製造方法中各個階段㈣㈣意圖。凹 貌示^圖5。圖係繪示出根據-實施例之凹口側壁的表面形 的半繪示出根據另—實施例之具有倒梯型凹口 【主要元件符號說明】 102〜基底； 104〜溝槽隔離區； 206〜溝槽； 310〜倒梯型凹口； 408〜磊晶材料/三五族材料； 410〜穿越差排； Α〜深度； A’、B’〜平面； dmax 〜 最大深度； X、γ〜距離； Y1〜長度。 0503^A35159TWF/spin 10

Claims (1)

  1. 201205802 七、申請專利範圍： 1. —種半導體裝置，包括： 一半導體基底，具有一溝槽及位於該溝槽下方的一 倒梯型凹口，該倒梯型凹口的側壁具有（m )晶面取向， 該溝槽的深度與該倒梯型凹口的側壁的長度比率等於或 大於0.5 ;以及 一二五族遙晶層，形成於該溝槽及該倒梯型凹口内。 2. 如申請專利範圍第1項所述之半導體裝置，其中該 # 半導體基底包括多個溝槽隔離區，而該溝槽的側壁包括 該等溝槽隔離區且該倒梯型凹口延伸於該等溝槽隔離區 的下方。 3·如申請專利範圍第1項所述之半導體裝置，其中該 半導體基底具有（111)晶面取向。 、Μ 一種半導體裝置，包括： 一半導體基底； 多個第一溝槽，形成於該半導體基底内並填入一 鲁一材料； 一第二溝槽，位於該半導體基底内且形成於該 一溝槽之間； 一凹口，位於該半導體基底内且位於該第二溝槽下 方，該凹口的側壁具有（1Π)晶面取向，該第^溝^的 深度大於或等於該凹口側壁的長度的一半；以及 一三五族磊晶層’形成於該第二溝槽及該凹口内。 各·如申請專利範圍第4項所述之半導體裝置，其中該 凹口延伸至肖等第—溝槽了方且該半導體基底具有 0503^A35159TWF/spin 11 201205802 > (111 )晶面取向。 6.—種半導體裝置製造方法，包括： 提供一基底； 實施一第一蝕刻，以在該基底内形成具有一第一深 度的一溝槽； 實施一第二蝕刻’以在該基底内形成一凹口，該第 二蝕刻露出該基底的（111)晶面，順著該基底的（m) 晶面的側壁具有一第二距離，該第一深度為該第二距離 的至少一半；以及 在該凹口内蟲晶成長一三五族材料。 7.如申請專利範圍第6項所述之半導體裝置製造方 法，更包括在實施該第一蝕刻之前，在該基底内形成多 個隔離區且在該等隔離區内填入一第一材並 一蝕刻包括等向性蝕刻。 ~ 8.如申明專利範圍帛6項所述之半導體裝置製造方 法，更包括在實施該第-餘刻之前，在該基底内形成多 個隔離區且在該等隔離區内填人u料，其中該等 隔離區的厚度大於該第一深度。 9.如申請專利範圍第 ...... ν貝所迷之半導體裝置製造方 法，其中該基底包括石夕塊材且具有⑽）表面取向。 =.如中請專利第6項所述之半導縣 二：至少使用氮氧化錢或氣氧化四甲基錢來實施該 0503^A35159TWF/spii 12
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US20120025201A1 (en) 2012-02-02
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