TW201216641A - A stretchable form of single crystal silicon for high performance electronics on rubber substrates - Google Patents
A stretchable form of single crystal silicon for high performance electronics on rubber substrates Download PDFInfo
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- H—ELECTRICITY
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- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/472—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having lower bandgap active layer formed on top of wider bandgap layer, e.g. inverted HEMT
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- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
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201216641 六、發明說明: 【發明所屬之技術領域】 本發明係關於用在橡膠基板上高效能電子組件之可延伸 形式之單晶石夕。 【先前技術】 自1994年一印製的全聚合物電晶體之第一次演示以來, 人們對在塑膠基板上包含可挽性積體電子裝置之一潛在的 新類別電子系統產生了巨大的興冑。[Gamier,F,201216641 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a single crystal stone in an extendable form of a high-performance electronic component for use on a rubber substrate. [Prior Art] Since the first demonstration of a fully polymerized transistor printed in 1994, there has been a tremendous rise in the potential for a new class of electronic systems that include a programmable integrated electronic device on a plastic substrate. helmet. [Gamier, F,
Hajlaoui, R., Yassar, A. ^ Srivastava, P., Science» ^265 卷’第1684·祕頁]近來,大量研究已針對發展新的用於 可撓性塑性電子裝置之導體、介電f及半導體元件之溶液 可處理材料。然而’可撓性電子裝置領域中之進步不僅由 新的溶液可處理材料的發展來驅動,而且由新裝置組件幾 何形態、高«置及裝置組件處理方法及可應用於塑膠基 板之尚解析度圖案化技術所驅動。預期此等材料裝置組 態及製造方法將在迅速出現之新型可撓性積體電子裝置、 系統及電路中起到關鍵作用。 對*T撓I1 生電子裝置領域之興趣是由此技術提供之若干重 要優勢而引起。首先,塑膠基板材料之機械耐用性提供不 易損壞及/或不易受到由機械應力引起之電子效能降級的 電子裝置。其次,此等基板材料之固有的可撓性允許將其 整合為許多形狀,從而提供不可能藉由脆性的習知的基於 矽之電子裝置來提供的大量有用裝置組態。最後,溶液可 處理組件材料與塑膠基板之組合使得藉由能在大基板面積 159867.doc 201216641 上以低成本產生電子裝置之連續、高速、印製技術的製造 成為可能》 然而’呈現良好電子效能之可撓性電子裝置之設計及製 •存在:¾干顯著挑戰。首先,用於製造習知的基於石夕之電 子裝置的已良好發展的方法與大部分塑膠材料不相容。舉 例而5 ,諸如單晶矽或鍺半導體之傳統的高品質無機半導 體組件通常藉由在某些溫度(>攝氏丨〇〇〇度)下生長薄膜來 處理,該等溫度顯著超過大部分塑膠基板的熔融或分解溫 X 另外大°卩分無機半導體在允許基於溶液之處理及傳 送之適宜溶劑中本質地不可溶。其次,儘管許多非晶系 矽、有機或混合有機-無機半導體可相容地併入塑膠基板 中,且可在相對較低溫度下處理,但是此等材料不具有能 提供具有良好電子效能之積體電子裝置之電子性質。舉例 而言,具有由此等材料製造之半導體元件的薄膜電晶體顯 不出比互補的基於單晶矽之裝置低大約三個數量級之場效 應遷移率》作為此等侷限性之結果,可撓性電子裝置目前 限於無需高效能的特定應用,諸如用於具有非發射性像素 之主動矩陣平板顯示器之開關元件中及發光二極體中。 在擴展塑膠基板上的積體電子裝置之電子效能能力方面 已獲得進步以將其適用性擴展至一更廣泛範圍之電子應 用。舉例而s,已出現若干新型薄膜電晶體設計, 其與塑膠基板材料上之處理相容且顯示出顯著高於且有非 晶系石夕、有機或混合有機-無機半導體元件之薄膜電晶體 之裝置效能特性。-類更高效能之可撓性電子裝置係基於 159867.doc 201216641 藉由對非晶切薄膜之脈衝雷射退火而製造之多晶石夕薄膜 -件雖然此類可撓性電子裝置提供增強之裝置電 子效此特性,但是對脈衝雷射退火之使用限制了此等裝置 製造的容易性及靈活性,進而顯著增加了成本。另一有希 :之新型更高效能之可撓性電子裝置是使用諸如奈米線、 奈:帶、奈米微粒及奈米碳管之溶液可處理奈米級材料作 為若干宏觀電子及微電子裝置中之主動功能性組件之裝 離散單結晶奈米線或奈米帶之使用已被評估為於塑膠基 板上提供顯示增強裝置效能特性之可印刷電子裝置的一可 能之手n Duan等人描述具有複數個作為半導體通道之可 選擇性定向之單結晶矽奈米線或Cds奈米帶的薄膜電晶體 設計[Duan,X·,Niu,c,Sah丨,v,㈤,】,Μι 】, Empedocles,S.及 Goldman,j,,第 425卷第 Μ· 278頁]。該等作者報告一據稱可與塑膠基板上之溶液處理 相容之製造過程中具有少於或等於15〇奈米之厚度的 單結晶梦奈米線或CdS奈米帶被分散於溶液中,且使用流 量定向對準方法將其組裝於—基板之表面上以產生薄膜電 晶體之半導體元件。由該等作者提供之—光學顯微圖暗示 所揭示之製造過程製備了呈大體上平行取向且間隔約遍 奈米至約麵奈米的多個奈米線或奈米帶之單層。儘管咳 等作者報告了㈣奈料或奈米帶之相對高的本質場效應 遷移率卜119 cm2 V1 s丨)’但是總的裝置場效應遷移率近 來已被判;t為比由Duan等人報告之本f場效應遷移率值小 159867.doc 201216641 "大約兩個數量級"。[Mitzi,D.B,Kosbar,L.L.,Murray, C.E., Copel, M. Afzali, A., Nature» ^ 4281 > ^ 299-303 頁J。此裝置場效應遷移率比習知單結晶無機薄膜電晶體 之裝置場效應遷移率低若干數量級,且可能係歸因於使用 Duan等人揭示之方法及裝置組態進行對準、緊密封裝及電 接觸離散奈米線或奈米帶中的實際挑戰。 亦已探索了將奈米晶體溶液用作多晶系無機半導體薄膜 之先驅體’以將其作為在塑膠基板上提供呈現更高裝置效 能特性之可印刷電子裝置之手段。幻一等人揭示一溶液 處理製造方法,其中具有約2奈米尺寸之栖化鎖奈米晶體 溶液在塑膠相容溫度下被處理以提供場效應電晶體之半導 體元件。[Ridley,B.A.,Nivi,B.及 Jac〇bs〇n, ; M, Sconce,第286卷,746-749 (1999)]該等作者報告一方 法,其中在硒化鎘奈米晶體溶液中的低溫晶粒生長提供包 含數百奈米晶體之單晶區域β雖然Ridley等人報告了相對 於具有有機半導體元件之比較裝置的改良之電子性質,但 是藉由此等技術達成的裝置遷移率(i:;1 cm2 比習知 單結晶無機薄膜電晶體之裝置場效應遷移率低若干數量 級。藉由Ridley等人之裝置組態及製造方法所達成之場效 應遷移率的限制可能是由在個別奈米微粒之間建立之電接 觸產生的。詳言之’對用以穩定奈米晶體溶液及防止凝聚 之有機端基的使用可阻止在鄰近奈求微粒之間建立良好電 接觸’此種良好電接觸對於提供高裝置場效應遷移率係必 要的。 159867.doc 201216641 “儘管D_等人及Ridley等人提供用於在塑膠基板上製造 薄膜電B曰體之方法,所描述之裝置組態係包含諸如電極、 、半導體及/或介電質的機械剛性裝置組件之電晶體。選用 具有良好機械性質之塑膠基板可提供能在延伸或扭曲定向 作的電子裝置,然而,預期此種形變會在個別剛性電 曰曰體裝置組件上產生機械應力。此機械應力可導致對個別 件之損傷’例如’裂紋,且亦可降級或中斷裝置組件之 間的電接觸。 此外,由Duan等人、Ri£Hey等人及其他人發展之基於塑 膠基板之電子系統是否提供對於許多重要裝置應用(包括 可撓性感測器陣列、電子紙,及可佩帶電子裝置)為必要 的機械延伸性並不明朗。雖然此等團隊展示了有能力承受 由撓曲引起之變形的電子裝置,但是此等基於塑膠基板之 系統不可能進行可觀的延伸而無損傷、機械失效或裝置效 忐之顯著降級。因此,此等系統不可能承受由膨脹或壓縮 引起之變形,或承受等形覆蓋高度起伏之表面(諸如具有 大曲率半徑的彎曲表面)所要求之變形。 如上述,預期可撓性電子裝置領域中之進步會在若干重 要新技術及已有技術中起到關鍵作用。然而,可撓性電子 裝·置技術之此等應用之成功極大地取決於新材料、褒置組 態及用於製造在撓曲、變形及彎曲構形中展示良好電子、 機械及光學性質的積體電子電路及裝置之商業上可行的製 造途徑之持續發展。特定言之,需要在延伸或收縮構形中 展不有用之電子及機械性質的高效能、可機械延伸的材料 159867.doc 201216641 及裝置組態。 【發明内容】 本發明提供可延伸半導體及可延伸電子裝置、裝置組件 及電路。如本文所使用,術語"可延伸"指材料、結構、裝 置及裝置組件能承受應變而無破裂或機械失效。本發明之 可延伸半導體及電子裝置係可延伸的,且因此能至少在某 種程度上延伸及/或壓縮而無損壞、機械失效或裝置效能 之顯著降級。較佳用於某些應用的本發明之可延伸半導體 及電子電路為可撓性的(除了為可延伸的之外),且因此能 顯著伸長、撓曲,彎曲或進行沿一或多個軸之其他變形。 本發明之有用的可延伸半導體及電子裝置能伸長、壓 縮、扭曲及/或膨脹而無機械失效。另外,本發明之可延 伸半導體及電子電路即使當承受顯著應變(諸如大於或等 於’力0.5/。,較佳1%且最好為2%的應變)時亦展示良好電子 效鲶。可撓性的可延伸半導體及電子裝置、裝置組件及電 路當處於撓曲、彎曲及/或變形狀態時亦顯示良好的電子 效能。因為本發明之可延伸半導體元件及可延伸電子裝 裝置、·且件及電路在撓曲、延伸、壓縮或變形的裝置定 ° β提供有用之電子性質及機械耐用性,所以其適合廣 泛範圍的裝置應用及裝置組態。 可延伸及/或可撓性半導體亦可(視情況)為可印 ㈣’且兄)可包含複合半導體元件,其具有一可操 :地與其他結構、材料及/或裝置組件(諸如介電材料及 電極及其他半導體材料及層)連接之半導體結構。本 159867.doc 201216641 發明包括具有可延伸及/或可撓性半導體之廣泛範圍之可 延伸及/或可撓性電子及/或光電子裝置,包括(但不限於) 電晶體、二極體、發光二極體(LED)、有機發光二極體 (OLED)、雷射器、微機電裝置及奈米機電裝置、微流體 裝置及奈米流體裝置、記憶體裝置,及系統層級積體電子 電路(諸如互補邏輯電路)。 在一個態樣中,本發明提供當處於撓曲、膨脹、壓縮、 彎曲及/或變形狀態中時可提供有用之功能性質之可延伸 半導體元件。如本文所使用,表述"半導體元件”及I,半導 體結構"在本文中等同地使用且泛指任何半導體材料、組 合物或結構,且特別包括高品質單晶及多晶半導體、經由 高溫處理製造之半導體材料、摻雜半導體材料、有機及無 機半導體及具有一或多種額外半導體組份及/或非半導體 組份(諸如,介電層或材料及/或導電層或材料)的複合半導 體材料及結構。 , 本發明之可延伸半f體元#包含一具有一支擇表面之可 撓性基板及一具有一曲線内表面(例如,由該半導體結構 之一彎曲構形提供的一曲線内表面)之半導體結構。在此 實施例中,言亥半導體結構之至少一部分曲線内表面與該可 挽性基板之支樓表面結合。具有本發明中有用之曲線内表 面之例示性半導體結構包含彎曲結構。在本文中,"彎曲 結構"指一具有由施加力而導致之曲線構形之結構。本發 明中之彎曲結構可具有-或多個折疊區域、&起區域及/ 或凹入區域。舉例而言,本發明中有用之彎曲結構可以一 159867.doc n 201216641 捲曲構形、一皺褶構形、一翹棱構形及/或一波狀(意即波 形)組態來提供β 鼕曲結構(諸如具有曲線内表面之可延伸彎曲半導體結 構及電子電路)可與諸如聚合物及/或彈性基板之可撓性基 板以其中該彎曲結構承受應變的構形來結合。在某些實 施例中’該彎曲結構(諸如一彎曲帶狀結構)承受等於或小 於約30 /β之應變,在較佳用於某些應用之實施例中承受等 :或J於約10/。的應變,及/或在較佳用於某些應用之實施 :列中承受等於或小於約1%之應變。在某些實施例中,該 彎曲結構(諸如一 f曲帶狀結構)承受選自約ι%至約3〇%之 範圍之應變。 $有用之實施例中’具有一曲線内表面之半導體結構 包含-至少部分地與該支撐可撓性基板結合的可轉移半導 、-牛在本文中,可轉移半導體元件,•係一能例如經由 :尤積技術刷技術、圖案化技術及/或其他材料轉移方 法自供體表面轉移至一受體表面之半導體結構。本方法 中有用之可轉移半導體元件、複合物及裝置包括(但不限 於)可印刷半導體元件。 適用之可撓性基板包括(但不限於)聚合物基板、塑膠基 板及/或彈性基板。舉例而t,在一實施例中,本發明包 含-經轉移且結合至一預應變之彈性基板之可轉移、且 (視睛况)可印刷之半導體元件。本發明之此態樣中的有用 之轉移方法包括印刷技術’如接觸印刷或溶液印刷。彈性 基板之隨後鬆他在該可轉移且(視情況)可印刷之半導體元 159867.doc 201216641 件上產生一應變,從而導致(例如經由該半導體元件之彎 曲及/或勉曲)該曲線内表面之形成。 在某些實施例中,製造(例如如上述)具有曲線内表面之 半導體元件,且隨後將其自用於產生其曲線表面之彈性基 板轉移至一不同可撓性基板且將其與該不同可撓性基板結 合。本發明之此態樣之有用實施例包括一可轉移且(視情 況)可印刷之半導體結構,其包含具有曲線内表面之彎曲 半導體帶、線、條、碟片、小板、方塊、柱或圓柱,該内 表面具有一皺褶、翹棱及/或波形组態。然而,本發明包 括可延伸半導體’其中該半導體元件未經由印刷構件而提 供至該可撓性基板及/或其中該半導體元件係不可印刷 的。 本發明包括可延伸半導體,該等可延伸半導體包含具有 由單一可撓性基板支撐之曲線内表面之單一半導體元件。 或者,本發明之可延伸半導體包含複數個可延伸半導體元 件,該等可延伸半導體元件具有由單一可撓性基板支撐之 曲線内表面。本發明之實施例包括可延伸半導體元件之陣 列或圖案’該等可延伸半導體元件具有由單—可撓性基板 支撐的曲線内表面。可選擇地1陣列或圖案中之可延伸 半導體元件具有良好界定的、預選擇之實體尺寸、位置及 相對空間取向。 本發明亦包括可延伸電子裝置、袭置組件及/或電路, 其包含-或多個可延伸半導體結構,及額外積體裝置組 件’諸如電觸點、電極、導電層、介電層’及/或額外半 159867.doc 201216641 導體層(例如,摻雜層,P-N接面等等)。在此實施例中, 可延伸半導體結構及額外積體裝置組件係可操作地輛合, 以便提供選擇之裝置功能性,且可彼此電接觸或絕緣。在 某些有用之實施例中,額外積體裝置組件(及該(等)可延伸 半導體)之至少一部分或所有部分具有曲線内表面,該等 曲線内表面係由可撓性基板之支撲表面來支撲,且提供於 f曲、構中,例如_^具有捲曲、波形、翹棱及/或皺褶 構形之彎曲結構。額外積體裝置組件及可延伸半導體之曲 線内表面可具有大體上相同或不同的輪廓形狀。本發明包 括實施例,其中可延伸裝置組件係經由展示本質可延伸性 之金屬互連件或亦具有波形、皺褶、彎曲及/或組棱構形 之金屬互連件來互連。 額外積體裝置組件之曲線内表面組態係藉由諸如捲曲、 波形、翹棱及/或皺褶組態之電子裝置的一總體上彎曲結 構提供於某些實施例中。在此等實施例中,彎曲結構使此 等裝置即使當承受顯著應變時也能展示良好電子效能,諸 如當處於延伸、壓縮及/或彎曲組態時保持與一半導體元 件之導電性或絕緣性。可延伸電子電路可使用與如此處描 述之彼等用以製造可延伸半導體元件之技術類似的技術來 製造。舉例而言,在一實施例中,包括一可延伸半導體元 件之可延伸裝置組件係獨立製造且然後互連^或者,一包 含半導體之裝置可以一平坦組態來製造,且隨後處理所得 平坦裝置以提供一總體上彎曲的裝置結構,其具有某些或 所有裝置組件之曲線内表面。 159867.doc 12 201216641 本發明包括可延伸電子裝置,該等電子裝置包含具有由 單—可撓性基板支撐之曲線内表面之單一電子裝置。或 者’本發明包括可延伸電子裝置陣列,該等陣列包含複數 個可延伸電子裝置或裝置組件,每一者具有由單一可撓性 基板支撐之曲線内表面。可選擇地,本發明之裝置陣列十 之可延伸電子裝置具有良好界定的、預選擇之實體尺寸、 位置及相對空間取向。 在本發明之某些實施例中,半導體結構或電子裝置之曲 線内表面係由一彎曲結構來提供。本發明之半導體及/或 電子裝置之彎曲結構及曲線内表面可具有提供可延伸性及 /或可撓性的任何輪廓形狀,包括(但不限於)以至少一個凸 起區域、至少一凹入區域或至少一個凸起區域與至少一個 凹入區域之一組合為特徵之輪廓形狀。本發明中有用之輪 廓形狀包括在一個或兩個空間維度上變化之輪廓形狀。: 用具有一内表面(其具有在多個空間維度上展示週期或非 週期變化之輪廓形狀)之彎曲結構有助於提供能在包括正 交的方向之多個方向上延伸、壓縮、撓曲或進行其他變形 之可延伸半導體及/或電子裝置。 有用之實施例包括由彎曲半導體結構及/或電子裝置提 供的曲線内表面’該半導體結構及/或電子裝置具 :包含複數個凸起及凹入區域之構形,例如以波形組態提 ,、之凸起與凹入區域之交替圖案。在一實施例中,可延伸 及/或可撓性半導體元件或電 情,個截面組件具有以大線内表面’或(視 大體上週期波形或者大體上非 159867.doc 201216641 週期波形為特徵之輪廓形狀,在本文甲,週期波形可包含 任何兩維或二維維度波形,包括(但不限於)一或多個正弦 波方波、Anes函數、高斯(Gaussian)波形、洛仁子 (L〇rentzian)波形,或此等波形之組合。在另一實施例中, 半導體或電子裝置之曲線内表面,或(視情況)整個截面組 件具有由複數個具有較大振幅及寬度之非週期翹棱組成的 輪廓形狀。在另一實施例中,半導體或電子裝置之曲線内 表面,或(視情況)整個截面組件具有由週期波形及複數個 非週期翹棱組成的輪廓形狀。 在一實施例中,本發明之可延伸半導體元件或電子裝置 包含一彎曲結構,諸如一具有沿其長度及(視情況)寬度之 至少一部分擴展的一週期或非週期波形構形之彎曲帶狀結 構。舉例而言,本發明包括彎曲結構,該等彎曲結構包括 具有一週期在約1微米與1〇〇微米之間且振幅在約5〇奈米與 約5微米之間的正弦波構形之彎曲帶狀結構。彎曲結構可 以其他週期波形構形提供,諸如沿此等結構之至少一部分 長度及/或寬度擴展之方波及/或高斯波形。包含彎曲帶狀 結構之可延伸及可撓性半導體元件及可延伸電子裝置可沿 著沿該半導體帶之長度擴展的轴(諸如沿該曲線内表面之 第一波形方向擴展之軸)膨脹、壓縮、彎曲及/或變形,且 (視情況)可沿一或多個其他轴(諸如沿該等彎曲結構及曲線 内表面之其他波形方向擴展之轴)膨脹、壓縮、彎曲及/或 變形。 在某些實施例中,本發明之此態樣之半導體結構及電子 159867.doc •14· 201216641 裝置的構形當受到機械應力或被施加力時會改變。舉例而 言’具有波形或翹棱構形之彎曲半導體結構及電子裝置之 週期及/或振幅可回應於所施加機械應力及/或力而改變。 在某些實施例中’此改變構形之能力提供了可延伸半導體 結構及電子電路膨脹、壓縮、撓曲、變形及/或彎曲而無 顯著機械損傷、破裂或實質性的電子性質及/或電子裝置 效能之降低的能力。 該半導體結構及/或可延伸電子裝置之曲線内表面可連 續地結合至該支撐表面(意即在沿該曲線内表面之大體上 所有點(例如約90%)處結合)。或者,該半導體結構及/或可 延伸電子裝置之曲線内表面可間斷地與該支撐表面結合, 其中忒曲線内表面在沿該曲線内表面的所選點處與該支撐 表面結合。本發明包括實施例,其中該半導體結構或電子 裝置之曲線内表面與該可撓性基板在離散點處結合,且在 該内表面與該可撓性基板之間的離散的結合點之間該内表 面具有一曲線構形。本發明包括具有一内表面之彎曲半導 體、。構及電子裝置,該内表面與該可撓性基板在離散點處 結合’其中該等離散的結合點藉由未與該可撓性基板直接 結合之翹棱區域而彼此隔離。 在本發明之某些可撓性半導體及/或可撓性電子裝] 中,僅半導體結構或電子裝置之内表面以一曲線構㈣ 供。或者’本發明包括以…f曲構形提供之可延伸半導是 及可延伸電子裝置’其中該彎曲半導體結構或電子裝置之 整個截面組件以-曲線構形提供,諸如波形、皺褶、輕核 159867.doc 201216641 在此等實施例中,該曲線構形擴展穿過該半 一 ★。’電子裝置之至少一部分的整個厚度。舉例而 s ’本發明之可延伸半導體包括具有波形、敏稽、龜棱及 /或捲曲組態之彎曲丰導 十带 考曲手導體帶或條。本發明亦包括組合物 裝置,其_整個半導體結構或電子裝置,或該半導 體構或電子裝置之至少大部分以_曲線構形提供,諸如 波形、皺褶或彎曲構形。 Μ些實㈣t ’該波形、㈣及/或可延伸構形提供 了一種調節本發明之組合物、材料及裝置之性質的適用性 的途徑。舉例而言,半導體之遷移率及其觸點之性質至少 部分地取決於應變。本發明中空間變化的應變有助於以有 利的方式調節材料及裝置性質。如另一實例,在波導中之 空間變化之應變引起空間變化之折射率性質(經由彈光效 應)’其亦可有利地用於不同類型光柵耦合器。 可延伸半導體結構及/或電子裝置之内表面與可撓性基 板的外表面之間的結合可使用任何可提供機械上有用之2 統的組合物、結構或結合機制來提供,該機械上有用之系 統應能承受延伸及/壓縮移位而無機械失效或電子.性質及/ 或效能之顯著降級且(視情況)能撓曲移位而無機械失效或 電子性質及/或效能的顯著降級。該半導體結構及/或電子 裝置與該可撓性基板之間的有用之結合提供了當處於多種 延伸、壓縮及/或撓曲組態或變形時展示有益的電子性質 之機械穩固結構。在本發明之此態樣之一實施例中,該半 導體結構及/或電子裝置之内表面之至少一部分與該可撓 159867.doc • 16- 201216641 性基板的外表面之間之結合係藉由該半導體結構或電子裝 置與該可撓性基板 < 外表面之間的共價及/或非共價鍵結 來提供。此等結構巾有狀例*性結合機制包括使用該半 導體結構或電子裝置與該可挽性基板之外表面之間的凡得 瓦爾力交互作用、偶極_偶極交互作用及/或氫鍵結交互作 用。本發明亦包括實施例,其中結合係藉由該半導體結構 或電子裝置與該可撓性基板之外表面之間的一黏接或層麗 層、塗層或薄膜來提供。有用之黏接層包括(但不限於)金 屬層聚S物層、部分聚合化聚合物前驅層,及複合材料 層。本發明亦包括使用具有一化學改質之外表面之可挽性 基板,以便利(例如)具有置於其外表面上之複數個羥基基 團的可撓性基板(諸如聚合物基板)與半導體元件或電子裝 置之結合。本發明包括可撓性半導體及電子電路,其中該 半導體結構或電子電路整體或部分地囊封於—囊封層或塗 層中’諸如一聚合物層。 該半導體結構或電子裝置之實體尺寸及組合物至少部分 地影響本發明之可延伸半導體元件的總體機械及電子性 質。如本文所使用,術語"薄"指一結構具有一小於或等於 約100微米之厚度,且對於某些應用較佳為小於或等於約 50微求之厚度。諸如薄半導體帶、小板及條或薄膜電晶體 之薄半導體結構或電子裝置之使用在某些實施例中係重要 的,以便利諸如波形、捲曲或彎曲曲線内表面之曲線内表 面之形成:從而提供能延伸、收縮及/或撓曲而無損傷、 機械失效或電子性質的顯著降級之構形。諸如薄可印刷半 159867.doc -17- 201216641 導體結構之薄半導體結構及電子裝置之使用對包含諸如單 晶及/或多晶無機半導體的脆性半導體材料之可延伸半導體 及可延伸電子裝置尤其有用。在一有用之實施例中該半 導體,纟σ構或電子電路具有在約1微米至約1厘米之範圍上選 擇之寬度及在約50奈米至約50微米的範圍上選擇之厚度。 該支撐可撓性基板之組合物及實體尺寸亦可至少部分地 景夕響本發明之可延伸半導體元件及可延伸電子裝置的總體 機械性質。有用之可撓性基板包括(但不限於)厚度選自約 0.1毫米至約1〇〇微米之範圍的可撓性基板。在一有用之實 施例中’該可撓性基板包含一聚(二甲基矽氧烷)pdms 層’且具有在約〇」毫米至約1〇毫米的範圍上選擇之厚 度。 本發明亦包括部分處理之可延伸半導體元件或部分處理 之可延伸半導體電路。舉例而言,在一實施例中,本發明 包括Si帶,其上具有ρη二極體裝置。以一波形構形提供之 Si帶被可選擇地提供於一 PDMS基板上。於此等(絕緣)二極 體之間提供互連件,.以使得該二極體輸出(例如,光電流) 能被放大’例如經由利用蔭罩(shad〇w mask)之金屬蒸鑛。 在一實施例中,在彈性體上製造複數個獨立的可延伸電晶 體。以某些方式連線個別電晶體(例如藉由蔭罩蒸鍍)以製 造其他有用之電路’例如由以特定方式連接之若干電晶體 組成之電路。對於此等狀況,該等互連金屬線亦為可延伸 的’因此吾人具有在彈性體上的完全可延伸電路。 在另一態樣中,本發明提供甩以製造一可延伸半導體元 159867.doc -18- 201216641 件之方法,其包含以下步驟:⑴提供具有内表面之可轉移 半導體結構,(2)提供處於一膨脹狀態之預應變彈性基板, 其中該彈性基板具有-外表面;(3)將該可轉移半導體結構 的内表面之至少一部分與處於膨脹狀態《預應變彈性基板 之外表面結合;及(4)允許彈性基板至少部分地鬆弛至一鬆 弛狀態,其中該彈性基板的鬆弛使該可轉移半導體結構之 内表面彎曲,進而產生具有一曲線内表面之可延伸半導體 元件。在本發明之此態樣之某些實施例中,該預應變彈性 基板沿第-軸膨膜,且視情況沿—相對該第一軸正交地定 位的第二軸膨脹。在一有用之實施例中,提供至該預應變 彈f·生基板之可轉移半導體元件係一可印刷半導體元件。 在另一態樣中,本發明提供一用以製造一可延伸電子電 路之方法,其包含以下步驟:⑴提供一具有一内表面之可 轉移電子電路;(2)提供處於一膨脹狀態之預應變彈性基 板,其中该彈性基板具有一外表面;(3)將該可轉移電子電 路的内表面之至少一部分與處於膨脹狀態之預應變彈性基 板之外表面結合;及(4)允許該彈性基板至少部分地鬆弛至 鬆弛狀態,其令該彈性基板的鬆弛使該電子電路之内表 面彎曲,it而產生該可延伸電子電路。在一有用之實施例 中,提供至該預應變彈性基板之可轉移電子電路係一可印 刷電子電路,諸如能經由印刷技術(諸如乾式轉移接觸印 刷)轉移之電子電路。在某些實施例中,電子電路包含複 數個積體裝置組件,包括(但不限於):一或多個半導體元 件(諸如可轉移、且(視情況)可印刷之半導體元件)、介電 159867.doc 201216641 元件、電極、包括超導元件之導電元件、及摻雜半導體元 件0 可選地’本發明之該態樣之方法可進一步包含自該支樓 彈性基板將該可延伸半導體或可延伸電子電路轉移至一接 收基板之步驟’該轉移之方式至少部分地保留該半導體元 件或電子電路的曲線内表面及/或彎曲結構。該半導體結 構或電子電路被轉移至一接收基板,該接收基板係可撓性 的諸如一聚合物接收基板,或一包含紙、金屬或半導體 之接收基板。在此實施例中,所轉移之可延伸半導體或可 延伸電子裝置可經由廣泛範圍之手段而與該接收基板(如 一可撓性、聚合物接收基板)結合,該等手段包括(但不限 於)使用黏接及/或層壓層、薄膜及/或塗層,諸如黏接層 (如聚醯亞胺膠層或者,所轉移的可延伸半導體或可延 伸電子裝置可經由所轉移的可延伸半導體或可延伸電子裝 置與接收基板之間之氫鍵結、共價鍵結、偶極-偶極交互 作用及凡付瓦爾力交互作用而與諸如可撓性、聚合物接收 基板的接收基板結合。 在實施例中,在製造具有由一彈性基板支撐之波形、 翹棱、皺相或捲曲構形之彎曲半導體結構及/或電子電路 '肖適§黏接層或塗層將此等結構轉移至另-基板 上。舉例而言,在—-¾1 J, , ^ 貫&例中,在一彈性體基板上製備波 形光伏打裝置,且然德(^丨 …曼(例如)使用聚醯亞胺作為膠層將其 轉移至金屬羯上。在該翼杏你>4 a* ^ ^ ^这等先伙打裝置與下層的金屬箔(其 可充▲集極之一,例如囍. 错由圖案化' 蝕刻以製造通孔以曝 159867.doc -20· 201216641 露金屬表面、金屬沈積物等等)之間建立電連接。此組態 之光伏打裝置之波狀表面可被利用以增強光捕獲(或減少 光反射)。舉例而言,為獲得更好之抗反射結果,可在此 波狀表面上作進-步處理,諸如使表面粗糙度遠小於波狀 半導體之波長。簡單說來,可將部分或全部處理之波狀/ 彎曲半導體/電路轉移至其他基板上(不限於pdms),且若 必要可藉由添加進—步處理來獲得更增強的使用效能。 可選地,本發明之方法可進一步包含囊封、覆蓋或層壓 該可延伸半導體或可延伸電子裝置之步驟。在此上下文 中,囊封在分層翹棱結構之狀況下包括其中該囊封材料被 提供於該等翹棱之凸起區域下以完全嵌入該翹棱結構的所 有側面的幾何形狀及構形。囊封亦包括在該彎曲半導體結 構或電子電路之凸起及未凸起特徵之頂部提供一囊封層, 諸如聚合物層。在一實施例中,將諸如PDMS預聚合物之 預聚合物洗鑄並固化於該可延伸半導體或可延伸電子裝置 上。對於.某些應用’囊封或覆蓋處理步驟有助於增強本發 明之可延伸半導體及電子裝置之機械穩定性及穩固性。本 發明包括當處於延伸、壓縮、彎曲及/或撓曲構形時展示 良好機械及電子效能之囊封、覆蓋及/或層壓之可延伸半 導體及電子裝置。 可選地’本發明之此態樣之方法包括在諸如聚合物基板 (例如,2D超薄聚合物基板)或無機基板(例如Si〇2)之供體 基板上組裝半導體元件、裝置組件及/或功能性裝置之步 驟°在此實施例中,然後將在該供體基板上組裝之結構轉 159867.doc •21- 201216641 移至預應變彈性體基板以形成可延伸材料、裝置或裝置組 件》在一實施例中,電晶體、電晶體陣列或具有電晶體之 電子裝置首先被組裝在供體基板上,例如經由使用可印刷 半導體元件之印刷技術。接著,將整個裝置及/或裝置陣 列轉移至預應變彈性基板(例如藉由接觸印刷法)以形成可 延伸波形及/或翹棱系統。當在轉移至可延伸彈性體支撐 物之前在一薄的、非彈性體材料(類似聚醯亞胺或苯幷環 丁烯或PET等等)上製備裝置互連件及製造實際尺寸電路較 為有利時此方法係有用的。在此類系統中,在組合電晶體 /聚合物膜/彈性體基板系統中將獲得非週期2 D波形或翹棱 結構。 對在本方法中有用的彈性基板進行預應變之方法包括在 與半導體結構及/或電子裝置接觸及結合之前及/或期間中 彎曲、捲曲、撓曲、及膨脹該彈性基板(例如,藉由使用 一機械平臺)。在多個方向上預應變彈性基板之一尤其有 用之方法包含在與半導體結構及/或電子裝置接觸及結合 之前及/或期間中藉由升高彈性基板的溫度而使該彈性基 板熱膨脹。在此等實施例中,彈性基板的鬆弛是藉由在與 該可轉移、且(視情況)可印刷之半導體元件或電子裝置接 觸及/或結合之後降低該彈性基板之溫度來達成。在某些 方法中,藉由引入約1%至約30%之應變來將該彈性基板預 應變。 在本文中,表述"彈性基板"指可延伸或變形且可返回至 其原始形狀而無實質上永久變形之基板。彈性基板通常承 159867.doc -22· 201216641 受實質上彈性的變形。本發 ♦今X月中有用之例示性彈性基板包 括(但不限於)彈性體及 坪·『生體展示彈性之聚合物及共聚 物之複合材料或混合物。在笨 在系些方法中,經由一提供該彈 性基板沿一或多個主轴膨胳 略服之機構來預應變該彈性基板。 舉例而言,可藉由沿篦_ ^ 第轴膨脹該彈性基板來提供預應 變。然而,本發明亦白紅υι_、fe 括’/σ複數個軸使該彈性基板膨脹之 方法,例如經由沿相對牯沾 丄 對彼此正父定位之第一及第二軸的膨 脹本方法中可用的經由提供彈性基板之膨服的機構而預 應變彈性基板之手段包㈣曲、捲曲、撓曲、整平、膨脹 或以其它方式錢料基板㈣。本發明純㈣由升高 該彈性基板之溫度進而接徂 運而柃供该彈性基板的熱膨脹而提供預 應變之手段。 本發明之方法亦能自*同於半導體材料之材料製造可延 伸元件、裝置及裝置組件。本發明包括將諸如絕緣體、超 導體’及半金屬之非半導體結構轉移並結合至—預應變彈 性基板之方法°允許彈性基板至少部分地鬆他會導致具有 曲線内表面之可延伸非半導體結構(例如具有波形及/或勉 棱輪廓形狀之非半導體結構)的形成。本發明之此態樣包 括具有彎曲結構之可延伸非半導體結構,該f曲結構諸如 以捲曲構形、皺褶構形、趣棱構形及/或以波形組態提供 之内表面及(視情況)外表面β 有 板 在本發明之可延伸半導體、電子裝置及/或裝置組件中 用之可撓性基板包括(但不限於)聚合物基板及/或塑勝基 。可延伸半導體包括包含一或多個可轉移 、(視情況)可 159867.doc 23- 201216641 印刷之半導體結構(諸如可印刷半導體元件)之組合物,其 由在製期間預應變的__彈性基板支撐,以產生該半導體 曲線内表面。或者,可延伸半導體包括包含一或多個可轉 移半導體結構(諸如可印刷半導體元件)之組合物,其由不 同於在製造期間預應變的彈性基板之可撓性基板支撐,以 產生k半導體曲線内表面。舉例而言’本發明包括可延伸 半導體中具有—曲線内表面之半導體結構被自該彈性 基板轉移至一不同可撓性基板。 【實施方式】 參看該等圖式,類似參考號指示類似元件且在多個圖式 中出現之相同參考號指相同元件。另外,在下文中,以下 定義適用: "可印刷"係關於能轉移、裝配、圖案化、組織及/或整合 至基板上或其中之材料 '結構、裝置組件及/或積體功能 裝置。在本發明之一實施例中,可印刷材料、元件、裝置 組件及裝置能經由溶液印刷或乾式轉移接觸印刷而轉移、 裝配、圖案化、組織及/或整合至基板上或其中。 本發明之”可印刷半導體元件"包含能(例如使用乾式轉移 接觸印刷及/或溶液印刷方法)裝配及/或整合至基板表面上 之半導體結構。在一實施例中,本發明之可印刷半導體元 件為整體單晶(unitary single crysta出ne)、多晶或微晶無機 半導體結構。在本文中,整體結構係具有機械相連之特徵 的單體兀件。本發明之半導體元件可為未摻雜或摻雜的, 可具有摻雜劑之選擇的空間分佈,且可以包括p及N型摻雜 159867.doc •24- 201216641 劑的複數個不同摻雜劑材料來摻雜。本發明包括:至少― 個截面尺寸大於或等於約1微米之微結構可印刷半導體元 件、及至少一個截面尺寸小於或等於約丨微米的奈米結構 可印刷半導體元件。在許多應用中有用之可印刷半導體包 含由對高純度塊體材料(諸如使用習知高溫處理技術產生 之高純度結晶半導體晶圓)之”由上而下,,處理而獲取之元 件。在一實施例中,本發明之可印刷半導體元件包含複合 結構’其具有—操作地連接至至少—個額外裝置組件或: 構(諸如導電層、介電層、電極'額外半導體結構或此等 之任何組合)之半導體。在一實施例中,本發明之可印刷 半導體元件包含可延伸半導體元件及/或異質半導體元 件。 π截面尺寸"指裝置、裝置組件或材料之截面之尺寸。截 面尺寸包括寬度、厚度、半徑及直徑。舉例而言具有帶 形狀之半導體元件以一長度及兩個截面尺寸:厚度及寬 度,為特徵。舉例而言,具有圓柱形狀之可印刷半導體元 件以一長度及截面尺寸:直徑(或者半徑),為特徵。 "由一基板支撐"指至少部分地存在於一基板表面或至少 部分地存在於-或多個位於該結構與該基板表面之間的中 間結構上之結構。術語"由一基板支樓,,亦可指部分或全部 嵌入基板之結構。 ”溶液印刷"用以指諸如可印刷半導體元件之—或多個妗 構藉以分散入一載體介質且以一協調的方式傳送至基板2 面之所選區域的過程。在一例示性溶液印刷方法中,結構 159867.doc -25- 201216641 被傳送至-基板表面之所選區域係藉由與經受圖案化之基 板表面的形態及/或實體特性無關之方法來達成。本發明 中可使用之溶液印刷方法包括(但不限於)嗔墨印刷、熱轉 移印刷,及毛細作用印刷。 "大體上縱向取向"指使得諸如可印刷半導體元件之元件 群體之縱轴的方向大體上與_所選對準軸平行的取向。在 此定義之上下文中’與-所選軸大體上平行指在與絕對平 行方向偏差ίο度範圍内的取向,較佳為在與絕對平行方向 偏差5度範圍内的取向。 "可延伸"指材料、結構、裝置或裝置組件承受應變而無 破裂之能力。在-例示性實施例中,一可延伸材料、結 構、裝置或裝置組件可承受大於約〇.5%之應變而無破裂, 對於某些應用較佳可承受大於約1%之應變而無破裂f且 對於某些應用最好可承受大於約3%的應變而無破裂。 術語"可撓性•,及"可彎曲"在本文中等同地使用,且指材 料、結構、裝置或裝置組件變形為一曲線形狀而不經受會 引入顯著應變的轉換之能力,該等顯著應變可諸如特徵化 材料、結構、裝置或裝置組件之失效點的應變。在一例示 性實施例中,可撓性材料、結構、裝置或裝置組件可變形 為曲線形狀而不引入大於或等於約5%之應變,對於某此 應用較佳不引入大於或等於約1%之應變,且對於某些應 用最好不引入大於或等於約0.5%之應變。 該術語"翹棱"指當薄元件、結構及/或裝置藉由在該元 件、結構及/或裝置之平面外的方向上彎曲而回應於—壓 159867.doc -26- 201216641 縮應變時發生的實體變形。本發明包括具有一或多個表面 之可延伸半導體、裝置及組件,該或該等表面具有包含一 或多個翹棱之輪廓形狀。 "半導體”指任何在極低溫度下係一絕緣體但在約300絕 對溫度下具有一明顯導電性之材料。在本文中,對術語半 導體之使用希望與此術語在微電子及電子裝置之技術領域 中的使用一致。適用於本發明之半導體可包含諸如矽、鍺 及金剛石之元素半導體,以及複合半導體,諸如第IV族複 合半導體(諸如Sic及SiGe)、第III-V族半導體(諸如AlSb、 AlAs、Ain、A1P、BN、GaSb、GaAs、GaN、GaP、InSb、 InAs、InN及InP)、第III-V族三元半導體合金(諸如AlxGai-xAs) 、第 II-VI族半導體(諸如 CsSe、CdS、CdTe、ZnO、ZnSe、 ZnS,及ZnTe)、第I-VII族半導體CuCl、第IV-VI族半導體 (諸如PbS、PbTe及SnS)、層半導體(諸如Pbl2、MoS2及 GaSe)、氧化物半導體(諸如CuO及Cu20)。術語半導體包括 以一或多種選擇之材料摻雜的外質半導體及本質半導體 (包括具有P型摻雜材料及η型摻雜材料的半導體)以提供適 用於給定應用或裝置之有利電子性質。術語半導體包括包 含半導體及/或摻雜劑之一混合物之複合材料。適用於本 發明之某些應用之特殊半導體材料包括(但不限於)Si、 Ge、SiC、A1P、AlAs、AlSb、GaN、GaP、GaAs、GaSb、 InP、InAs、GaSb、InP、InAs、InSb、ZnO、ZnSe、 ZnTe 、 CdS 、 CdSe 、 ZnSe 、 ZnTe 、 CdS 、 CdSe 、 CdTe 、 HgS、PbS、PbSe、PbTe、AlGaAs、AlInAs、AllnP、 159867.doc •27· 201216641Hajlaoui, R., Yassar, A. ^ Srivastava, P., Science» ^265 Volume '1684·secret page> Recently, a large number of studies have been directed to the development of new conductors for flexible plastic electronic devices, dielectric f And a solution of the semiconductor component can process the material. However, 'the advancement in the field of flexible electronic devices is not only driven by the development of new solution-processable materials, but also by the geometry of the new device components, the high-position and device component processing methods, and the resolution that can be applied to plastic substrates. Driven by patterning technology. It is expected that these material device configurations and manufacturing methods will play a key role in the rapid emergence of new flexible integrated electronic devices, systems and circuits. Interest in the field of *T flexible I1 electronics is caused by several important advantages offered by this technology. First, the mechanical durability of the plastic substrate material provides an electronic device that is less susceptible to damage and/or less susceptible to degradation in electronic performance caused by mechanical stress. Second, the inherent flexibility of such substrate materials allows for their integration into many shapes, providing a large number of useful device configurations that are not available by conventional, sturdy electronic devices based on brittleness. Finally, the combination of solution-processable component materials and plastic substrates makes it possible to produce continuous, high-speed, printed technology at low cost on large substrate areas 159867.doc 201216641. However, 'good electronic performance' The design and manufacture of flexible electronic devices: 3⁄4 dry significant challenges. First, well-developed methods for fabricating conventional electronic devices based on Shi Xi are incompatible with most plastic materials. For example, 5, conventional high quality inorganic semiconductor components such as single crystal germanium or germanium semiconductors are typically processed by growing a film at certain temperatures (> degrees Celsius), which temperatures significantly exceed most plastics. The melting or decomposition temperature of the substrate is further large. The inorganic semiconductor is substantially insoluble in a suitable solvent that allows for solution-based processing and transport. Second, although many amorphous germanium, organic or hybrid organic-inorganic semiconductors are compatiblely incorporated into plastic substrates and can be processed at relatively low temperatures, such materials do not have the ability to provide products with good electronic performance. The electronic properties of bulk electronic devices. For example, a thin film transistor having a semiconductor component fabricated from such materials exhibits a field effect mobility that is about three orders of magnitude lower than a complementary single crystal germanium-based device. As a result of these limitations, it is flexible. Sexual electronic devices are currently limited to specific applications that do not require high performance, such as in switching elements for active matrix flat panel displays with non-emissive pixels and in light emitting diodes. Improvements have been made in expanding the electronic performance capabilities of integrated electronic devices on plastic substrates to extend their applicability to a wider range of electronic applications. By way of example, several new thin film transistor designs have emerged which are compatible with the processing on plastic substrate materials and which exhibit significantly higher and more amorphous thin film transistors with organic or inorganic organic-inorganic semiconductor components. Device performance characteristics. - a more efficient flexible electronic device based on 159867.doc 201216641 A polycrystalline film produced by pulsed laser annealing of an amorphous cut film, although such flexible electronic devices provide enhanced The device electronically functions, but the use of pulsed laser annealing limits the ease of manufacture and flexibility of such devices, which in turn adds significant cost. Another new: high-performance flexible electronic device is the use of solutions such as nanowires, naphthalene, nanoparticle and carbon nanotubes to process nanoscale materials as a number of macroelectronic and microelectronic devices. The use of discrete single crystal nanowires or nanobelts in active functional components has been evaluated as a possible means of providing printable electronic devices that exhibit enhanced device performance characteristics on plastic substrates. A plurality of thin film transistor designs for selectively oriented single crystal germanium or Cds nanobelts as semiconductor channels [Duan, X·, Niu, c, Sah丨, v, (5),], Μι 】, Empedocles , S. and Goldman, j,, vol. 425, pp. 278]. The authors report that a single crystal Monai wire or CdS nanobelt having a thickness of less than or equal to 15 nanometers in a manufacturing process that is said to be compatible with solution processing on a plastic substrate is dispersed in the solution, And it is assembled on the surface of the substrate using a flow direction alignment method to produce a semiconductor element of the thin film transistor. The optical micrographs provided by the authors suggest that the disclosed manufacturing process produces a single layer of multiple nanowires or nanoribbons in substantially parallel orientation and spaced from about nanometers to about nanometers. Although cough et al. reported a relatively high intrinsic field-effect mobility of (4) nanomaterials or nanobelts, 119 cm2 V1 s丨)) but the total device field-effect mobility has recently been judged; t is compared to Duan et al. The reported f field effect mobility value is small 159867.doc 201216641 "about two orders of magnitude". [Mitzi, D.B, Kosbar, L.L., Murray, C.E., Copel, M. Afzali, A., Nature» ^ 4281 > ^ 299-303 Page J. The field effect mobility of this device is several orders of magnitude lower than that of the conventional single crystal inorganic thin film transistor, and may be due to alignment, tight packaging, and electricity using the method and device configuration disclosed by Duan et al. Contact the actual challenges in discrete nanowires or nanobelts. The use of a nanocrystal solution as a precursor to a polycrystalline inorganic semiconductor film has also been explored as a means of providing a printable electronic device exhibiting higher device performance characteristics on a plastic substrate. The phantoms disclose a solution processing process in which a solution of a xenon crystal having a size of about 2 nanometers is treated at a plastic compatible temperature to provide a semiconductor element of a field effect transistor. [Ridley, BA, Nivi, B. and Jac〇bs〇n, ; M, Sconce, Vol. 286, 746-749 (1999)] The authors report a method in a cadmium selenide nanocrystal solution Low temperature grain growth provides a single crystal region containing hundreds of nanocrystals. Although Ridley et al. report improved electronic properties relative to comparison devices with organic semiconductor components, device mobility achieved by such techniques (i : 1 cm2 The field effect mobility of devices with conventional single crystal inorganic thin film transistors is several orders of magnitude lower. The field effect mobility limitations achieved by Ridley et al.'s device configuration and manufacturing methods may be determined by individual Produced by electrical contact between the rice particles. In detail, the use of organic end groups to stabilize the nanocrystal solution and prevent coagulation prevents the formation of good electrical contact between adjacent particles. Contact is necessary to provide high device field-effect mobility. 159867.doc 201216641 "Although D_ et al. and Ridley et al. provide methods for fabricating thin film electrical B-body on plastic substrates, the described description The configuration is a transistor containing mechanically rigid device components such as electrodes, semiconductors, and/or dielectrics. The use of a plastic substrate with good mechanical properties provides an electronic device that can be oriented in an extended or twisted orientation, however, this is expected Deformation can create mechanical stresses on individual rigid electrical device components. This mechanical stress can cause damage to individual components, such as 'cracks, and can also degrade or interrupt electrical contact between device components. In addition, by Duan Whether the electronic substrate based on plastic substrates developed by et al., Ri£Hey et al. and others provides the mechanical extensibility necessary for many important device applications, including flexible sensor arrays, electronic paper, and wearable electronic devices. It is not clear. Although these teams demonstrated electronic devices capable of withstanding the deformation caused by deflection, such plastic substrate-based systems are unlikely to undergo significant extension without significant damage, mechanical failure, or significant degradation of device efficiency. Therefore, such systems are unlikely to withstand deformation caused by expansion or compression, or to withstand an isomorphous coverage height. Deformation required for a surface of a volt (such as a curved surface having a large radius of curvature). As noted above, advances in the field of flexible electronic devices are expected to play a key role in several important new technologies and prior art. The success of such applications in flexible electronic mounting technology is highly dependent on new materials, configuration, and fabrication of integrated electronics that exhibit good electrical, mechanical, and optical properties in flexure, deformation, and bending configurations. The continued development of commercially viable manufacturing circuits for circuits and devices. In particular, high-performance, mechanically extensible materials that exhibit unusable electrical and mechanical properties in extended or collapsed configurations 159867.doc 201216641 and device groups SUMMARY OF THE INVENTION The present invention provides extendable semiconductors and extendable electronic devices, device components, and circuits. As used herein, the term "extensible" means that materials, structures, devices, and device components are capable of withstanding strain without cracking or mechanical failure. The extendable semiconductor and electronic devices of the present invention are extensible and, therefore, extend and/or compress at least to some extent without damage, mechanical failure, or significant degradation in device performance. The extensible semiconductor and electronic circuits of the present invention, which are preferred for certain applications, are flexible (except for being extensible) and are therefore capable of significantly elongating, flexing, bending or performing along one or more axes Other variants. Useful extendable semiconductor and electronic devices of the present invention are capable of elongating, compressing, twisting, and/or expanding without mechanical failure. In addition, the extendable semiconductor and electronic circuits of the present invention exhibit good electronic efficacy even when subjected to significant strain (e.g., greater than or equal to a force of 0.5/, preferably 1% and preferably 2% strain). Flexible extensible semiconductor and electronic devices, device components, and circuits also exhibit good electrical performance when in a flexed, bent, and/or deformed state. Because the extendable semiconductor component and the extendable electronic device of the present invention, and the device and the circuit provide useful electronic properties and mechanical durability in flexing, extending, compressing or deforming, it is suitable for a wide range of applications. Device application and device configuration. The extendable and/or flexible semiconductor may also (as appropriate) be printable (four) 'and brother's) may comprise a composite semiconductor component having a operative interface with other structures, materials and/or device components (such as dielectric A semiconductor structure in which materials and electrodes and other semiconductor materials and layers are connected. The present invention includes a wide range of extensible and/or flexible electronic and/or optoelectronic devices having extendable and/or flexible semiconductors including, but not limited to, transistors, diodes, illumination Diodes (LEDs), organic light-emitting diodes (OLEDs), lasers, microelectromechanical devices and nanomechanical devices, microfluidic devices and nanofluid devices, memory devices, and system-level integrated electronic circuits ( Such as complementary logic circuits). In one aspect, the present invention provides an extensible semiconductor component that provides useful functional properties when in a flexed, expanded, compressed, bent, and/or deformed state. As used herein, the expression "semiconductor element" and ", semiconductor structure" are used equally herein and generally refer to any semiconductor material, composition or structure, and particularly include high quality single crystal and polycrystalline semiconductor, via high temperature. Processing of fabricated semiconductor materials, doped semiconductor materials, organic and inorganic semiconductors, and composite semiconductors having one or more additional semiconductor components and/or non-semiconductor components such as dielectric layers or materials and/or conductive layers or materials Materials and structures. The extendable half-f body # of the present invention comprises a flexible substrate having a surface selected and a curved inner surface (for example, a curved line provided by a curved configuration of the semiconductor structure) Semiconductor structure of the inner surface. In this embodiment, at least a portion of the curved inner surface of the semiconductor structure is bonded to the surface of the support of the susceptor substrate. An exemplary semiconductor structure having a curved inner surface useful in the present invention comprises Curved structure. In this paper, "bending structure" refers to a structure having a curved configuration caused by the applied force The curved structure in the present invention may have - or a plurality of folded regions, & regions and/or recessed regions. For example, the curved structure useful in the present invention may have a crimped configuration, a wrinkle, 159,867.doc n 201216641 a pleat configuration, a wavy configuration, and/or a wavy (ie, waveform) configuration to provide a beta winter structure (such as an extensible curved semiconductor structure having a curved inner surface and an electronic circuit) compatible with, for example, a polymer The flexible substrate of the flexible substrate is bonded in a configuration in which the curved structure is strained. In some embodiments, the curved structure (such as a curved ribbon structure) is subjected to strains equal to or less than about 30 / β. In embodiments that are preferred for certain applications, etc.: or J is at a strain of about 10/., and/or is preferably used in certain applications: the column is subjected to equal to or less than about 1%. Strain. In certain embodiments, the curved structure (such as an f-bend ribbon structure) is subjected to a strain selected from the range of from about 1% to about 3% by weight. In a useful embodiment, 'having a curved inner surface The semiconductor structure includes - at least partially A transferable semiconductor substrate in which a flexible substrate is bonded, in which a transferable semiconductor component can be transferred from a donor surface, for example, via: a technical brush technique, a patterning technique, and/or other material transfer methods. Semiconductor structures to a receptor surface. Useful transferable semiconductor components, composites, and devices useful in the methods include, but are not limited to, printable semiconductor components. Suitable flexible substrates include, but are not limited to, polymer substrates, Plastic substrate and/or elastic substrate. By way of example, in one embodiment, the invention comprises a transferable, and (in viewable) printable semiconductor component that is transferred and bonded to a pre-strained elastic substrate. Useful transfer methods in this aspect of the invention include printing techniques such as contact printing or solution printing. The elastic substrate is then subsequently produced on the transferable and (as appropriate) printable semiconductor element 159867.doc 201216641. Strain, resulting in the formation of the inner surface of the curve (e.g., via bending and/or distortion of the semiconductor component). In some embodiments, a semiconductor component having a curved inner surface is fabricated (eg, as described above) and subsequently transferred from a flexible substrate used to create its curved surface to a different flexible substrate and is otherwise flexible The substrate is bonded. Useful embodiments of this aspect of the invention include a transferable and (as appropriate) printable semiconductor structure comprising curved semiconductor strips, wires, strips, discs, plates, cubes, columns or columns having curved inner surfaces The cylinder has a corrugated, ribbed and/or wavy configuration on the inner surface. However, the invention includes an extendable semiconductor wherein the semiconductor component is not provided to the flexible substrate via a printing member and/or wherein the semiconductor component is unprintable. The present invention includes extendable semiconductors comprising a single semiconductor component having a curved inner surface supported by a single flexible substrate. Alternatively, the extendable semiconductor of the present invention comprises a plurality of extensible semiconductor elements having curved inner surfaces supported by a single flexible substrate. Embodiments of the invention include an array or pattern of extensible semiconductor elements. The extensible semiconductor elements have curved inner surfaces supported by a single-flex substrate. Optionally, the extensible semiconductor component in the array or pattern has a well defined, pre-selected physical size, location, and relative spatial orientation. The present invention also includes an extendable electronic device, a set of components and/or circuitry comprising - or a plurality of extensible semiconductor structures, and additional integrated device components such as electrical contacts, electrodes, conductive layers, dielectric layers and / or additional half 159867.doc 201216641 conductor layer (for example, doped layer, PN junction, etc.). In this embodiment, the extendable semiconductor structure and the additional integrated device components are operatively coupled to provide selected device functionality and are electrically or insulative to each other. In certain useful embodiments, at least a portion or all of the additional integrated device components (and the extendable semiconductor) have curved inner surfaces that are surfaced by a flexible substrate The bucks are provided and are provided in a curved structure, such as a curved structure having a curl, a wave shape, a warped edge, and/or a wrinkle configuration. The inner surface of the additional integrated device assembly and the extendable semiconductor may have substantially the same or different contour shapes. The present invention includes embodiments in which the extendable device components are interconnected via metal interconnects that exhibit substantial extensibility or metal interconnects that also have corrugations, wrinkles, bends, and/or ribs. The curved inner surface configuration of the additional integrated device assembly is provided in certain embodiments by a generally curved configuration of electronic devices such as crimp, wave, rib, and/or wrinkle configurations. In such embodiments, the curved structure enables such devices to exhibit good electrical performance even when subjected to significant strain, such as maintaining electrical or insulating properties with a semiconductor component when in an extended, compressed, and/or curved configuration. . The extendable electronic circuitry can be fabricated using techniques similar to those described herein for fabricating extensible semiconductor components. For example, in one embodiment, an extendable device component including an extendable semiconductor component is fabricated separately and then interconnected, or a device comprising a semiconductor can be fabricated in a flat configuration and subsequently processed into a resulting planar device To provide a generally curved device structure having curved inner surfaces of some or all of the device components. 159867.doc 12 201216641 The present invention includes extendable electronic devices including a single electronic device having a curved inner surface supported by a single flexible substrate. Or the invention includes an array of extendable electronic devices comprising a plurality of extendable electronic devices or device components, each having a curved inner surface supported by a single flexible substrate. Alternatively, the array of devices of the present invention can have well-defined, pre-selected physical dimensions, locations, and relative spatial orientations. In some embodiments of the invention, the inner surface of the curved surface of the semiconductor structure or electronic device is provided by a curved structure. The curved structure and curved inner surface of the semiconductor and/or electronic device of the present invention may have any contour shape that provides extensibility and/or flexibility, including but not limited to, at least one raised region, at least one recessed The region or at least one raised region is combined with one of the at least one recessed region as a characteristic contour shape. The contour shape useful in the present invention includes a contour shape that varies in one or two spatial dimensions. : Using a curved structure having an inner surface that exhibits periodic or aperiodic contour shapes in multiple spatial dimensions helps to provide extension, compression, and deflection in multiple directions including orthogonal directions Or other variants of extendable semiconductors and/or electronic devices. Useful embodiments include a curved inner surface provided by a curved semiconductor structure and/or an electronic device. The semiconductor structure and/or electronic device has a configuration including a plurality of raised and recessed regions, for example, in a waveform configuration. An alternating pattern of raised and recessed areas. In an embodiment, the extendable and/or flexible semiconductor component or the electrical cross-section component has a large-line inner surface 'or (as characterized by a substantially periodic waveform or a substantially non-159867.doc 201216641 periodic waveform) Contour shape, in this paper, the periodic waveform can contain any two-dimensional or two-dimensional dimensional waveform, including (but not limited to) one or more sine wave square waves, Anes function, Gaussian waveform, Lorientzian a waveform, or a combination of such waveforms. In another embodiment, the curved inner surface of the semiconductor or electronic device, or (as appropriate) the entire cross-sectional assembly has a plurality of non-periodic warping edges having a large amplitude and width. Contour shape. In another embodiment, the curved inner surface of the semiconductor or electronic device, or (as appropriate) the entire cross-sectional assembly has a contour shape consisting of a periodic waveform and a plurality of non-periodic warps. In an embodiment, The extendable semiconductor component or electronic device of the present invention comprises a curved structure, such as a portion having a length along its length and (as appropriate) A curved ribbon structure of a one-cycle or non-periodic waveform configuration. For example, the present invention includes a curved structure comprising a period between about 1 micrometer and 1 micrometer and an amplitude of about 5 〇. A curved ribbon-like structure of a sinusoidal configuration between nanometers and about 5 microns. The curved structure may be provided in other periodic waveform configurations, such as square and/or Gaussian waveforms extending along at least a portion of the length and/or width of such structures. An extendable and flexible semiconductor component and an extendable electronic device comprising a curved ribbon structure are expandable along an axis extending along a length of the semiconductor strip, such as an axis extending along a first waveform of the inner surface of the curve, Compressed, bent, and/or deformed, and (as appropriate) may expand, compress, bend, and/or deform along one or more other axes, such as an axis extending along the curved structures and other directions of the inner surface of the curved surface. In certain embodiments, the configuration of the semiconductor structure and electrons of this aspect of the invention may vary when subjected to mechanical stress or when a force is applied. For example, the period and/or amplitude of a curved semiconductor structure and electronic device having a wavy or warped configuration may be varied in response to applied mechanical stress and/or force. In some embodiments, this modified configuration Capabilities provide the ability to extend semiconductor structures and electronic circuits for expansion, compression, flexing, deformation, and/or bending without significant mechanical damage, cracking, or substantial degradation in electronic properties and/or performance of the electronic device. The inner surface of the curve of the extendable electronic device can be continuously bonded to the support surface (ie, bonded at substantially all points (eg, about 90%) along the inner surface of the curve). Alternatively, the semiconductor structure and/or The curved inner surface of the extendable electronic device can be intermittently coupled to the support surface, wherein the inner surface of the meandering curve is joined to the support surface at selected points along the inner surface of the curve. The invention includes an embodiment wherein a curved inner surface of the semiconductor structure or electronic device is bonded to the flexible substrate at discrete points, and between discrete bonding points between the inner surface and the flexible substrate The inner surface has a curved configuration. The invention includes a curved semiconductor having an inner surface. And an electronic device, the inner surface being bonded to the flexible substrate at discrete points wherein the discrete bonding points are isolated from each other by a raised edge region that is not directly bonded to the flexible substrate. In some flexible semiconductors and/or flexible electronic devices of the present invention, only the inner surface of the semiconductor structure or electronic device is provided in a curved configuration (4). Or 'the invention includes an extendable semiconductor provided in a curved configuration of ... and an extendable electronic device' wherein the entire cross-sectional component of the curved semiconductor structure or electronic device is provided in a curved configuration, such as a wave, wrinkles, light Core 159867.doc 201216641 In these embodiments, the curve configuration extends through the half one. The entire thickness of at least a portion of the electronic device. For example, the extensible semiconductor of the present invention comprises a curved conductor strip or strip having a waveform, a sensitive, a ribbed and/or a curled configuration. The invention also includes a composition device, wherein the entire semiconductor structure or electronic device, or at least a majority of the semiconductor structure or electronic device is provided in a curved configuration, such as a wavy, wrinkled or curved configuration. These waveforms, (4) and/or extendable configurations provide a means of adjusting the suitability of the properties of the compositions, materials and devices of the present invention. For example, the mobility of a semiconductor and the nature of its contacts depend, at least in part, on strain. The spatially varying strain in the present invention helps to adjust the material and device properties in a beneficial manner. As another example, the spatially varying strain in the waveguide causes spatially varying refractive index properties (via bounce effect)' which may also be advantageously used for different types of grating couplers. The bond between the inner surface of the extendable semiconductor structure and/or electronic device and the outer surface of the flexible substrate can be provided using any composition, structure or bonding mechanism that provides a mechanically useful structure that is mechanically useful The system shall be capable of withstanding extension and/or compression displacement without mechanical failure or significant degradation of electronic properties and/or performance and (as appropriate) flexing displacement without mechanical failure or significant degradation of electronic properties and/or performance. . The useful combination of the semiconductor structure and/or electronic device with the flexible substrate provides a mechanically robust structure that exhibits beneficial electronic properties when subjected to a variety of extension, compression, and/or flexing configurations or deformations. In one embodiment of this aspect of the invention, at least a portion of the inner surface of the semiconductor structure and/or electronic device is bonded to the outer surface of the flexible 159867.doc • 16-201216641 substrate. The semiconductor structure or electronic device and the flexible substrate < Covalent and/or non-covalent bonding between the outer surfaces is provided. Such structural towels have a pattern of sexual bonding including the use of the van der Waals interaction, dipole-dipole interaction and/or hydrogen bonding between the semiconductor structure or electronic device and the outer surface of the slidable substrate. Knot interaction. The invention also includes embodiments in which bonding is provided by a bond or layer, coating or film between the semiconductor structure or electronic device and the outer surface of the flexible substrate. Useful adhesive layers include, but are not limited to, metal layer poly S layers, partially polymerized polymer precursor layers, and composite layers. The invention also includes the use of a leutable substrate having a chemically modified outer surface to facilitate, for example, a flexible substrate (such as a polymer substrate) and a semiconductor having a plurality of hydroxyl groups disposed on an outer surface thereof. A combination of components or electronic devices. The present invention includes flexible semiconductors and electronic circuits in which the semiconductor structure or electronic circuit is wholly or partially encapsulated in an encapsulating layer or coating such as a polymeric layer. The physical dimensions and compositions of the semiconductor structure or electronic device at least partially affect the overall mechanical and electronic properties of the extensible semiconductor component of the present invention. As used herein, the term "thin" refers to a structure having a thickness of less than or equal to about 100 microns, and for some applications preferably less than or equal to about 50 microseconds. The use of thin semiconductor structures or electronic devices such as thin semiconductor strips, small plates and strip or thin film transistors is important in certain embodiments to facilitate the formation of curved inner surfaces such as waveforms, curls or curved inner surfaces: Thereby providing a configuration that can be extended, shrunk and/or flexed without damage, mechanical failure or significant degradation of electronic properties. The use of thin semiconductor structures and electronic devices such as thin printable half 159867.doc -17-201216641 conductor structures is particularly useful for extensible semiconductors and extendable electronic devices comprising brittle semiconductor materials such as single crystal and/or polycrystalline inorganic semiconductors . In a useful embodiment, the semiconductor, 纟 构 or electronic circuit has a width selected over a range of from about 1 micrometer to about 1 centimeter and a thickness selected from the range of from about 50 nanometers to about 50 micrometers. The composition and physical dimensions of the support flexible substrate can also at least partially illuminate the overall mechanical properties of the extendable semiconductor component and the extendable electronic device of the present invention. Useful flexible substrates include, but are not limited to, flexible substrates having a thickness selected from the range of from about 0.1 mm to about 1 μm. In a useful embodiment, the flexible substrate comprises a poly(dimethyloxane) pdms layer' and has a thickness selected from the range of from about 毫米 mm to about 1 mm. The invention also includes partially processed extendable semiconductor components or partially processed extendable semiconductor circuits. For example, in one embodiment, the invention includes a Si ribbon having a ρη diode device thereon. The Si strips provided in a waveform configuration are optionally provided on a PDMS substrate. Interconnects are provided between the (insulating) diodes such that the diode output (e.g., photocurrent) can be amplified', e.g., via metal smelting using a shadow mask. In one embodiment, a plurality of individual extensible electro-optics are fabricated on the elastomer. Individual transistors are wired in some manner (e.g., by shadow mask evaporation) to make other useful circuits, such as circuits composed of a number of transistors connected in a particular manner. For these conditions, the interconnecting wires are also extendable so that we have a fully extendable circuit on the elastomer. In another aspect, the invention provides a method of fabricating an extensible semiconductor element 159867.doc -18-201216641 comprising the steps of: (1) providing a transferable semiconductor structure having an inner surface, (2) providing a pre-strained elastic substrate in an expanded state, wherein the elastic substrate has an outer surface; (3) at least a portion of an inner surface of the transferable semiconductor structure is bonded to an outer surface of the pre-strained elastic substrate in an expanded state; and (4) The elastic substrate is allowed to at least partially relax to a relaxed state, wherein the relaxation of the elastic substrate bends the inner surface of the transferable semiconductor structure, thereby producing an extendable semiconductor component having a curved inner surface. In some embodiments of this aspect of the invention, the pre-strained resilient substrate expands along the first axis and optionally expands along a second axis that is orthogonally positioned relative to the first axis. In a useful embodiment, the transferable semiconductor component provided to the pre-strained substrate is a printable semiconductor component. In another aspect, the invention provides a method for fabricating an extendable electronic circuit comprising the steps of: (1) providing a transferable electronic circuit having an inner surface; (2) providing a pre-expansion state a strained elastic substrate, wherein the elastic substrate has an outer surface; (3) bonding at least a portion of an inner surface of the transferable electronic circuit to an outer surface of the pre-strained elastic substrate in an expanded state; and (4) allowing the elastic substrate At least partially relaxed to a relaxed state that causes the elastic substrate to relax causing the inner surface of the electronic circuit to bend, thereby creating the extendable electronic circuit. In a useful embodiment, the transferable electronic circuit provided to the pre-strained flexible substrate is a printable electronic circuit, such as an electronic circuit that can be transferred via a printing technique, such as a dry transfer contact print. In some embodiments, an electronic circuit includes a plurality of integrated device components, including but not limited to: one or more semiconductor components (such as transferable and (as appropriate) printable semiconductor components), dielectric 159867 .doc 201216641 Elements, electrodes, conductive elements comprising superconducting elements, and doped semiconductor elements 0 Optionally, the method of this aspect of the invention may further comprise extending the extensible semiconductor or the extensible from the substrate elastic substrate The step of transferring the electronic circuit to a receiving substrate 'receives at least partially retains the curved inner surface and/or curved structure of the semiconductor component or electronic circuit. The semiconductor structure or electronic circuit is transferred to a receiving substrate, such as a polymer receiving substrate, or a receiving substrate comprising paper, metal or semiconductor. In this embodiment, the transferred extendable semiconductor or extendable electronic device can be combined with the receiving substrate (such as a flexible, polymer receiving substrate) via a wide range of means including, but not limited to, Use of adhesive and/or laminate layers, films and/or coatings, such as adhesive layers (such as polyimide layers or transferable extensible semiconductors or extendable electronics via transferable extensible semiconductors) Alternatively, hydrogen bonding, covalent bonding, dipole-dipole interaction, and valence interaction between the extendable electronic device and the receiving substrate are combined with a receiving substrate such as a flexible, polymer receiving substrate. In an embodiment, the structure is transferred to a curved semiconductor structure and/or an electronic circuit having a waveform, a warp, a wrinkle or a crimped configuration supported by an elastic substrate. On the other side of the substrate. For example, in the case of -3⁄41 J, , , and , in the case of an elastomer substrate, a corrugated photovoltaic device is prepared, and Rand (man) (for example) uses poly Amine as a glue layer It is transferred to the metal crucible. In the wing apricot you > 4 a * ^ ^ ^ these first hit the device with the underlying metal foil (which can be charged ▲ one of the collectors, such as 囍. wrong by patterning 'etching Electrical connections are made between the fabrication of through holes to expose 159867.doc -20· 201216641 exposed metal surfaces, metal deposits, etc. The wavy surface of the photovoltaic device of this configuration can be utilized to enhance light capture (or reduce) Light reflection. For example, in order to obtain better anti-reflection results, a step-wise treatment can be performed on the wavy surface, such as making the surface roughness much smaller than the wavelength of the wavy semiconductor. In short, the portion can be Or all processed wavy/bent semiconductor/circuits are transferred to other substrates (not limited to pdms), and if necessary, additional processing can be obtained by adding further processing. Alternatively, the method of the present invention can be Further comprising the step of encapsulating, covering or laminating the extendable semiconductor or extendable electronic device. In this context, the encapsulation in the case of a layered rib structure includes wherein the encapsulation material is provided to the ridges Under the raised area Fully embedded in the geometry and configuration of all sides of the rib structure. The encapsulation also includes providing an encapsulation layer, such as a polymer layer, on top of the raised and unembossed features of the curved semiconductor structure or electronic circuit. In one embodiment, a prepolymer such as a PDMS prepolymer is cast and cured onto the extensible semiconductor or extendable electronic device. For certain applications, the 'encapsulation or coating process steps help to enhance the invention. Extendable mechanical stability and robustness of semiconductors and electronic devices. The present invention includes encapsulation, coverage, and/or lamination that exhibits good mechanical and electrical performance when in extended, compressed, bent, and/or flexed configurations. Extending semiconductor and electronic devices. Optionally, the method of this aspect of the invention includes assembling a semiconductor on a donor substrate such as a polymer substrate (eg, a 2D ultra-thin polymer substrate) or an inorganic substrate (eg, Si〇2). Steps of components, device components, and/or functional devices. In this embodiment, the structure assembled on the donor substrate is then transferred to 159867.doc •21-201216641 Elastomeric substrate to form an extensible material, device or device assembly. In one embodiment, a transistor, an array of transistors, or an electronic device having a transistor is first assembled on a donor substrate, such as via the use of a printable semiconductor component. Printing Technology. Next, the entire device and/or array of devices is transferred to a pre-strained elastic substrate (e.g., by contact printing) to form an extendable waveform and/or warp rib system. It is advantageous to fabricate device interconnects and fabricate actual size circuits on a thin, non-elastomeric material (like polythenimine or benzoquinone cyclobutene or PET, etc.) prior to transfer to the extensible elastomeric support. This method is useful. In such systems, a non-periodic 2D waveform or warped edge structure will be obtained in a combined transistor/polymer film/elastomer substrate system. The method of pre-straining an elastic substrate useful in the method includes bending, crimping, flexing, and expanding the elastic substrate before and/or during contact and bonding with the semiconductor structure and/or the electronic device (eg, by Use a mechanical platform). One method of pre-straining an elastic substrate in a plurality of directions is particularly useful for thermally expanding the elastic substrate by increasing the temperature of the elastic substrate before and/or during contact with and bonding with the semiconductor structure and/or electronic device. In such embodiments, the relaxation of the elastic substrate is achieved by lowering the temperature of the flexible substrate after contact and/or bonding with the transferable and (as appropriate) printable semiconductor component or electronic device. In some methods, the elastic substrate is pre-strained by introducing a strain of from about 1% to about 30%. As used herein, the expression "elastic substrate" refers to a substrate that can be extended or deformed and can be returned to its original shape without substantial permanent deformation. The elastic substrate is generally subjected to a substantially elastic deformation of 159867.doc -22· 201216641. The exemplary elastic substrates useful in the present X month include, but are not limited to, elastomers and composites or mixtures of polymers and copolymers exhibiting elasticity. In the simplistic method, the elastic substrate is pre-strained via a mechanism that provides the elastic substrate along one or more spindles. For example, the pre-deformation can be provided by expanding the elastic substrate along the 篦_^ axis. However, the present invention also includes a method of expanding the elastic substrate by a plurality of axes of '/σ, for example, by expanding the first and second axes positioned opposite each other along the opposite side. The means for pre-straining the elastic substrate by means of a mechanism for providing expansion of the elastic substrate comprises bending, crimping, flexing, leveling, expanding or otherwise smearing the substrate (4). The present invention purely (4) provides a means for pre-straining by raising the temperature of the elastic substrate and then transporting it to provide thermal expansion of the elastic substrate. The method of the present invention is also capable of fabricating extensible elements, devices and device components from materials of the same semiconductor material. The present invention includes a method of transferring and bonding a non-semiconductor structure such as an insulator, a superconductor', and a semimetal to a pre-strained elastic substrate. Allowing the elastic substrate to at least partially loosen it results in an extensible non-semiconductor structure having a curved inner surface (eg, Formation of a non-semiconductor structure having a shape of a wave and/or a beveled profile. This aspect of the invention includes an extendable non-semiconductor structure having a curved configuration, such as a crimped configuration, a pleated configuration, an interesting configuration, and/or an inner surface provided in a wave configuration and Case) External Surface β Having a Flexible Substrate for use in the extensible semiconductor, electronic device and/or device assembly of the present invention includes, but is not limited to, a polymer substrate and/or a plastic substrate. The extensible semiconductor comprises a composition comprising one or more transferable, (as appropriate) 129867.doc 23-201216641 printed semiconductor structures, such as printable semiconductor components, which are pre-strained during fabrication. Supported to create the inner surface of the semiconductor curve. Alternatively, the extendable semiconductor comprises a composition comprising one or more transferable semiconductor structures, such as a printable semiconductor component, supported by a flexible substrate different from the elastic substrate pre-strained during fabrication to produce a k-semiconductor curve The inner surface. For example, the invention includes a semiconductor structure having a curved inner surface in an extensible semiconductor that is transferred from the flexible substrate to a different flexible substrate. [Embodiment] Referring to the drawings, like reference numerals indicate like elements and the In addition, in the following, the following definitions apply: "printable" relates to materials that can be transferred, assembled, patterned, organized, and/or integrated onto or into a substrate 'structure, device components, and/or integrated functional devices. In one embodiment of the invention, printable materials, components, device components and devices can be transferred, assembled, patterned, organized and/or integrated onto or into a substrate via solution printing or dry transfer contact printing. The "printable semiconductor component" of the present invention comprises a semiconductor structure that can be assembled (eg, using dry transfer contact printing and/or solution printing methods) and/or integrated onto the surface of the substrate. In one embodiment, the printable of the present invention The semiconductor component is a monocrystalline single crystal, polycrystalline or microcrystalline inorganic semiconductor structure. Herein, the monolithic structure is a monolithic member having mechanically connected features. The semiconductor component of the present invention may be undoped. Hetero- or doped, may have a spatial distribution of dopant choices, and may include a plurality of different dopant materials doped with p and N-type doping 159867.doc • 24-201216641. The present invention includes: At least one microstructure-printable semiconductor component having a cross-sectional dimension greater than or equal to about 1 micron, and at least one nanostructure printable semiconductor component having a cross-sectional dimension of less than or equal to about 10,000 microns. Printable semiconductors useful in many applications include For top-down, high-purity bulk materials, such as high-purity crystalline semiconductor wafers produced using conventional high-temperature processing techniques, Processing elements of the acquisition. In one embodiment, the printable semiconductor component of the present invention comprises a composite structure that has operatively coupled to at least one additional device component or structure (such as a conductive layer, a dielectric layer, an electrode), an additional semiconductor structure, or the like. Any combination of semiconductors. In one embodiment, the printable semiconductor component of the present invention comprises an extendable semiconductor component and/or a hetero semiconductor component. The π section size " refers to the size of the section of the device, device component or material. The cross-sectional dimensions include width, thickness, radius, and diameter. For example, a semiconductor component having a strip shape is characterized by a length and two cross-sectional dimensions: thickness and width. For example, a printable semiconductor component having a cylindrical shape is characterized by a length and a cross-sectional dimension: diameter (or radius). "supported by a substrate" means a structure that exists at least partially on a substrate surface or at least partially on - or a plurality of intermediate structures between the structure and the substrate surface. The term " is a substrate, and may also refer to a structure in which part or all of the substrate is embedded. "Solution printing" is used to refer to a process such as a printable semiconductor component or a plurality of structures that are dispersed into a carrier medium and transported to a selected area of the substrate 2 in a coordinated manner. In an exemplary solution printing In the method, the structure 159867.doc -25 - 201216641 is transferred to the selected area of the substrate surface by a method independent of the morphology and/or physical properties of the surface of the substrate subjected to patterning. It can be used in the present invention. Solution printing methods include, but are not limited to, ink printing, thermal transfer printing, and capillary printing. "Generally longitudinal orientation" means that the direction of the longitudinal axis of a component group such as a printable semiconductor component is substantially The orientation in which the alignment axes are parallel is selected. In the context of this definition, the orientation with the selected axis is substantially parallel, indicating an orientation within a range of deviation from the absolute parallel direction, preferably within 5 degrees of the absolute parallel direction. Orientation "extensible" refers to the ability of a material, structure, device, or device component to withstand strain without cracking. In an exemplary embodiment, an extendable The material, structure, device or device assembly can withstand strains greater than about 〇.5% without cracking, and for some applications it is preferred to withstand strains greater than about 1% without cracking f and, for some applications, preferably withstand greater than About 3% strain without cracking. The term "flexibility•, and "flexible" is used equally herein and refers to the deformation of a material, structure, device, or device component into a curved shape without being subjected to Introducing the ability of significant strain transformations, such as strains that characterize the point of failure of a material, structure, device, or device component. In an exemplary embodiment, the flexible material, structure, device, or device component can Deformed into a curved shape without introducing a strain greater than or equal to about 5%, for which a strain greater than or equal to about 1% is preferably not introduced, and for some applications it is preferred not to introduce a strain greater than or equal to about 0.5%. The term "warping" refers to a response when a thin element, structure, and/or device is bent by a direction outside the plane of the element, structure, and/or device. 159867.doc -26- 201216641 Solid deformation occurring upon strain. The invention includes extendable semiconductors, devices and assemblies having one or more surfaces having a contour shape comprising one or more ridges. "Semiconductor" A material that is an insulator at low temperatures but has a significant electrical conductivity at about 300 absolute temperatures. In this context, the use of the term semiconductor is intended to be consistent with the use of this term in the art of microelectronics and electronic devices. Semiconductors suitable for use in the present invention may comprise elemental semiconductors such as ruthenium, iridium and diamond, and composite semiconductors such as Group IV composite semiconductors (such as Sic and SiGe), Group III-V semiconductors (such as AlSb, AlAs, Ain, A1P). , BN, GaSb, GaAs, GaN, GaP, InSb, InAs, InN, and InP), Group III-V ternary semiconductor alloys (such as AlxGai-xAs), Group II-VI semiconductors (such as CsSe, CdS, CdTe, ZnO, ZnSe, ZnS, and ZnTe), Group I-VII semiconductor CuCl, Group IV-VI semiconductors (such as PbS, PbTe, and SnS), layer semiconductors (such as Pbl2, MoS2, and GaSe), oxide semiconductors (such as CuO) And Cu20). The term semiconductor includes exogenous semiconductors and intrinsic semiconductors (including semiconductors having a P-type dopant material and an n-type dopant material) doped with one or more selected materials to provide advantageous electronic properties suitable for a given application or device. The term semiconductor includes composite materials comprising a mixture of semiconductors and/or dopants. Specific semiconductor materials suitable for use in certain applications of the invention include, but are not limited to, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AllnP, 159867.doc •27· 201216641
GaAsP、GaInAs、GaInp、A1GaAsSb、AiGainp 及GaAsP, GaInAs, GaInp, A1GaAsSb, AiGainp and
GalnAsP。夕孔矽半導體材料適用於本發明在感測器及諸 如發光一極體(LED)及固態雷射之發光材料領域中之應 用。半導體材料之雜質係不同於該(等)半導體材料自身或 任何提供至半導體材料之摻雜劑的原子、元素、離子及/ 或分子。雜質係可對半導體材料之電子性質造成負面影響 之存在於半導體材料中的不當物質,且包括(但不限於) 氧、碳,及包括重金屬之金屬。重金屬雜質包括(但不限 於)週期表上銅與紹之間之元素族、轉、納,及其所有離 子、複合物及/或錯合物。 "塑性"指任何合成或自然產生之材料或材料之組合,通 常當加熱時可將其模製或成型且硬化為—所要形狀。適用 於本發明之裝置及方法之例示性塑膠包括(但不限於)聚合 物、樹脂及纖維素魅#。在本文中,術語塑性用以包括 包含具有-或多種添加物之—或多種塑膠的複合塑性材 料’該等添加物可諸如結構增強劑、填充劑、纖維、增塑 劑、敎劑或可提供所要之化學或物理性質之添加物。 、質"及"介電材料"在本文中等同地使用,且指對電 "具咼阻抗之物質。適用之介電材料包括(但不限 於)s1〇2、Ta2〇5、Ti〇2、Zr〇2、Y2〇3、siN4、sTOBsT、 PLZT、PMN及 PZT。 "聚合物"指包含複數個通常稱為單體之重複化學基團之 分子。聚合物通常以高分子質量為特徵。本發明中可用之 聚合物可為有機聚合物或無機聚合物,且可處於非晶系、 159867.doc •28- 201216641 半非晶糸、晶體或部分晶體狀態。聚合物可包含具有相同 化學組成之單體或可包含具有不同化學組成的複數個單體 (諸如共聚物)。具有鏈結的單體鏈之交聯聚合物尤其適用 於本發明之某些應用。可用於本發明之方法、裝置及裝置 組件之聚合物包括(但不限於)塑膠、彈性體、熱塑性彈性 體、彈性塑膠、彈性塑膠、恆溫器(thermostat)、熱塑膠及 丙烯酸酯。例示性聚合物包括(但不限於)縮醛聚合物、生 物可降解聚合物、纖維素聚合物、含氟聚合物、耐綸、聚 丙烯腈聚合物、聚醯胺·醯亞胺聚合物、聚醯亞胺、聚芳 醋化合物、聚苯幷咪唑、聚丁烯、聚碳酸酯、聚酯、聚醚 醯亞胺、聚乙烤、聚乙烯共聚物及經改質聚乙歸、聚酮、 聚(曱基丙烯酸曱酯)、聚甲基戊烯、聚苯醚及聚苯硫醚、 聚苯二甲酿胺、聚丙烯、聚胺基甲酸酯、苯乙烯樹脂、硬 基树脂、乙稀基樹脂或其任何組合。 "彈性體"指可延伸或變形且返回至其原始形狀而無實質 上永久變形的聚合材料。彈性體通常經受實質上彈性變 形。適用於本發明之彈性基板至少部分包含一或多個彈性 體。適用於本發明之例示性彈性體可包含聚合物、共聚 物、複合材料或聚合物與共聚物之混合物。彈性體層指包 含至少一個彈性體之層。彈性體層亦可包括摻雜劑及其他 非彈性體材料。適用於本發明之彈性體可包括(但不限於) 熱塑性彈性體、苯乙烯類材料、烯烴材料、聚烯烴、聚胺 基甲酸酯熱塑性彈性體、聚醯胺、合成橡膠、pDMs、聚 丁二烯、聚異丁烯、聚(苯乙烯-丁二烯_苯乙烯)、聚胺基 159867.doc •29- 201216641 甲酸酯、聚氣丁二烯及聚矽氧。 ”良好電子效能"及”高效能"在本文中等同地使用,且指 裝置及裝置組件具有可提供諸如電子訊號開關及/或放大 之所要功能性的諸如場效應遷移率、臨限電壓及開-關比 例之電子特性。本發明之展示良好電子效能之例示性可轉 移、且視情況可印刷之半導體元件可具有大於或等於1〇〇 cm V s的本質場效應遷移率,對於某些應用較佳具有 大於或等於約300 cm2 的本質場效應遷移率。本發明 之展示良好電子效能之例示性電晶體可具有大於或等於約 100 cm V s的裝置場效應遷移率,對於某些應用較佳具 有大於或等於約300 cm2 V-i s-i的裝置場效應遷移率,且對 於某些應用最好具有大於或等於約8〇〇 cm2 V-, 一的裝置場 效應遷移率。本發明之展示良好電子效能之例示性電晶體 可具有小於約5伏特的臨限電壓及/或大於約1><1〇4之開·關比 例0 "大面積"指大於或等於約36平方英吋之面積,諸如用於 裝置製造之基板的一接收表面的面積。 "裝置場效應遷移率"指使用與電子裝置對應之輸出電流 資料計算得之諸如電晶體的電子裝置之場效應遷移率。抓 楊氏模數”係材料、裝置或層之一機械性質,其指一终 定物質之應力與應變的比例。揚氏模數可由以下陳述式^ 供: > 應變(ΔΙ (II) 159867.doc -30- 201216641 Ε %氏模數,L〇係平衡長度,从係在所施加應力 下之長度變化’F係所施加之力且A係施加力的面積。揚氏 模數亦可通過以下方程式根據Lamef數來表示: μ(3λ + 2μ) (III) λ + μ 其中λ及μ係Lame常數。高揚氏模數(或"高模數")及低揚 氏模數(或"低模數”)係對-給定材料、層或裝置中楊氏模 數之大小的相對描I在本發明中,高揚氏模數比低揚氏 模數更大,對於某些應用而言較佳約大聰,對於其他應 用而言最好約大100倍,且對於另一些應用而言最好約: 1000 倍。 在下文中,闞明本發明之裝置、裝置組件及方法之大量 特定細節以提供對本發明的準確性質之詳細說明。然而, 對於熟習此項技術者將顯而易見的是,無此等特定細節也 可實踐本發明。 本發明提供當延伸、壓縮、撓曲或者以其他方式變形時 能提供良好效能之可延伸半導體及電子電路。另外,本發 明之可延伸半導體及電子電路可經調適用於廣泛範圍的裝 置組態以提供完全可撓性的電子及光電子裝置。 圖1提供一展示本發明之可延伸半導體結構之原子力顯 微圖。該可延伸半導體元件700包含一具有一支撐表面710 之可撓性基板705(諸如聚合物及/或彈性基板)及—具有一 曲線内表面720之彎曲半導體結構715。在此實施例中,彎 曲半導體結構715之曲線内表面72〇之至少一部分與該可撓 159867.doc •31 · 201216641 性基板705之支撐表面71〇結合。曲線内表面可在沿内 表面720之經選擇點處或在沿内表面,的大體上所有點處 與支撐表面7H)結合^中所說明之例示性半導體結構包 含一具有一等於約100微米之寬度及-等於約100奈米之厚 度之單晶矽彎曲帶β I中說明之可撓性基板係一具有約i 毫米之厚度之PDMS基板。曲線内表面720具有一彎曲結 構其包3 /口 5亥帶之長度擴展之—大體上週期性的波形。 如圖1所示’該波之振幅約為5⑽奈米且該尖鋒間距約為2〇 微米。圖2展7F 了提供具有曲線内表面72G之料半導體結 構715之展開視圖的原子力顯微圖。圖3展示本發明之可延 伸半導體結構之-陣列的原子力顯微圖。對圖3中原子力 顯微圖之分析展示該# f曲半導體結構被I縮了約 〇爲圖4展示本發明之可延伸半導體結構之光學顯微 曲線内表面720之輪廓形狀允許幫曲半導體結構715沿變 形轴730膨脹錢縮而不經受大量機械應變。此輪摩形狀 亦可允許該半導體結構在不同於變形軸73〇方向的方向上 彎曲、撓曲或變形而無由應變引發之顯著機械損傷或效能 損失。本發明之半導體結構之曲線表面可具有提供,良好 機械性質(諸如可延伸性、可撓性及/或可寶曲性)及/或良 好電子效能(諸如當被撓曲、延伸或變形時展示良好場效 應遷移率)的任何輪廓形狀。例示性輪廓形狀可具有以下 特徵:具有複數個凸起及/或凹 波、高斯波、Aries函數、方波、 入區域’且具有包括正弦 洛仁子波、週期波、無週 159867.doc 32· 201216641 期波或此等波之任何組合之多種波形。適用於本發明之波 形可關於兩個或三個實體維度而變化。 ;圖5展示本發明之可延伸半導體結構的原子力顯微圖, .亥結構之半導體結構715結合至具有三維起伏圖案之可挽 性基板7〇5,該三維起伏圖案位於該基板之支撐表面710 上。該二維起伏圖案包含凹人區域75G及起伏特徵76〇β如 圖5所不’ f曲半導體結構715在凹入區域750中及起伏特 徵760上與支撐表面71〇結合。 _圖6展不-說明製造本發明之可延伸半導體結構之一例 示性方法的流程圖。在該例示性方法中,提供處於一膨脹 狀態之—預應變彈性基板。預應變可藉由該項技術中習知 之任何方法來達成,其包括(但*限於)輕壓及/或預彎曲該 彈性基板。預應變亦可經由熱方法,例如通過由升高該彈 性基板之溫度引發之熱膨脹來達成。經由熱方法之預應變 之-優勢係可達成沿複數個不同轴(諸如正交的轴)之膨 服。 本發明之此方法中可用之例示性彈性基板係、—具有等於 約1毫米的厚度之_S基板。該彈性基板可藉由沿-單-軸之膨脹或藉由沿複數個軸之膨脹來預應變。如圖㈣ 不可印刷半導體几件之至少一部分内表面與處於一膨服 狀態之預應變彈性基板的外表面結合。結合可藉由該半導 體表面之内表面之間的共價鍵結、藉由凡得瓦爾力、藉由 使用黏結劑或藉由此等方法之任何纪合來達成。在該彈性 基板係匪8之例示性實施財,該pDMs基板之支撐表面 159S67.doc -33- 201216641 經化學改質使得其具有複數個自其表面擴展的羥基以促進 與一矽半導體結構之共價鍵結。再參看圖6,在將該預應 變彈性基板與半導體結構結合之後,允許該彈性基板至少 部分地鬆弛至一鬆弛狀態。在此實施例中,該彈性基板之 鬆他使該半導體結構之内表面脊曲,進而產生一具有曲線 内表面的半導體元件。 如圖6中所示,該製造方法可視情況包括一第二轉移步 驟及視情況之鍵結步驟,其中將具有一曲線内表面72〇之 可轉移半導體元件715自該彈性基板轉移至另一基板,較 佳一可撓性基板,諸如一聚合物基板。此第二轉移步驟可 藉由使具有一曲線内表面720之半導體結構715之曝露表面GalnAsP. The sigma semiconductor material is suitable for use in the field of the present invention in the field of sensors and luminescent materials such as light-emitting diodes (LEDs) and solid-state lasers. The impurity of the semiconductor material is different from the semiconductor material itself or any atom, element, ion and/or molecule provided to the dopant of the semiconductor material. Impurities are undesirable materials present in semiconductor materials that can negatively affect the electronic properties of the semiconductor material, and include, but are not limited to, oxygen, carbon, and metals including heavy metals. Heavy metal impurities include, but are not limited to, the family of elements, turns, and nanos, and all their ions, complexes, and/or complexes between the copper and the periodic table. "Plastic" means any synthetic or naturally occurring material or combination of materials that is typically molded or shaped and hardened to the desired shape when heated. Exemplary plastics suitable for use in the devices and methods of the present invention include, but are not limited to, polymers, resins, and cellulose. As used herein, the term plasticity is used to include composite plastic materials comprising - or a plurality of additives - or a plurality of plastics - such additives may be such as structural enhancers, fillers, fibers, plasticizers, elixirs or may be provided Additives of desired chemical or physical properties. , """Dielectric materials" are used equivalently herein, and refer to materials that are electrically resistant. Suitable dielectric materials include, but are not limited to, s1〇2, Ta2〇5, Ti〇2, Zr〇2, Y2〇3, siN4, sTOBsT, PLZT, PMN, and PZT. "Polymer" refers to a molecule comprising a plurality of repeating chemical groups commonly referred to as monomers. Polymers are generally characterized by high molecular weight. The polymer usable in the present invention may be an organic polymer or an inorganic polymer, and may be in an amorphous state, 159867.doc • 28-201216641 semi-amorphous germanium, crystal or partially crystalline state. The polymer may comprise monomers having the same chemical composition or may comprise a plurality of monomers (such as copolymers) having different chemical compositions. Crosslinked polymers having a chained monomeric chain are especially useful in certain applications of the invention. Polymers useful in the methods, devices, and device components of the present invention include, but are not limited to, plastics, elastomers, thermoplastic elastomers, elastomers, elastomers, thermostats, thermoplastics, and acrylates. Exemplary polymers include, but are not limited to, acetal polymers, biodegradable polymers, cellulosic polymers, fluoropolymers, nylon, polyacrylonitrile polymers, polyamidoximine polymers, Polyimine, polyarylate, polybenzimidazole, polybutene, polycarbonate, polyester, polyetherimide, polyethylene bake, polyethylene copolymer and modified polyethylidene, polyketone , poly(decyl methacrylate), polymethylpentene, polyphenylene ether and polyphenylene sulfide, polyphthalamide, polypropylene, polyurethane, styrene resin, hard resin, Ethylene-based resin or any combination thereof. "Elastomer" refers to a polymeric material that can be stretched or deformed and returned to its original shape without substantial permanent deformation. Elastomers are typically subjected to substantial elastic deformation. The elastic substrate suitable for use in the present invention at least partially comprises one or more elastomers. Exemplary elastomers suitable for use in the present invention may comprise a polymer, a copolymer, a composite or a mixture of a polymer and a copolymer. The elastomer layer refers to a layer comprising at least one elastomer. The elastomer layer may also include dopants and other non-elastomeric materials. Elastomers suitable for use in the present invention may include, but are not limited to, thermoplastic elastomers, styrenic materials, olefin materials, polyolefins, polyurethane thermoplastic elastomers, polyamines, synthetic rubbers, pDMs, polybutenes. Diene, polyisobutylene, poly(styrene-butadiene-styrene), polyamine 159867.doc •29- 201216641 Formate, polybutadiene and polyfluorene. "Good electronic performance" and "high performance" are used equally herein, and means that the device and device components have such desirable functions as electronic signal switching and/or amplification, such as field effect mobility, threshold voltage. And the electronic characteristics of the on-off ratio. Exemplary transferable, and optionally printable, semiconductor devices of the present invention that exhibit good electronic performance can have an intrinsic field effect mobility greater than or equal to 1 〇〇 cm s, preferably greater than or equal to about some applications. The intrinsic field effect mobility of 300 cm2. Exemplary transistor exhibiting good electronic performance of the present invention can have a device field effect mobility greater than or equal to about 100 cm V s, and for some applications preferably a device field effect mobility greater than or equal to about 300 cm 2 Vi si And for some applications it is preferred to have a device field effect mobility greater than or equal to about 8 〇〇 cm 2 V-, one. An exemplary transistor of the present invention that exhibits good electronic performance can have a threshold voltage of less than about 5 volts and/or greater than about 1><1<4> open & close ratio 0 "large area" An area of about 36 square feet, such as the area of a receiving surface of a substrate for device fabrication. "Device field effect mobility" refers to the field effect mobility of an electronic device such as a transistor calculated using output current data corresponding to an electronic device. A mechanical property of a material, device, or layer that refers to the ratio of stress to strain of a final material. The Young's modulus can be given by the following statement: > strain (ΔΙ (II) 159867 .doc -30- 201216641 Ε% modulus, L〇 balance length, the length of the strain applied under the applied stress, the force applied by the F system and the area where the force applied by the A system. The Young's modulus can also pass The following equation is expressed according to the Lamef number: μ(3λ + 2μ) (III) λ + μ where λ and μ are Lame constants. High Young's modulus (or "high modulus") and low Young's modulus (or "Low modulus" is a relative depiction of the magnitude of Young's modulus in a given material, layer or device. In the present invention, the high Young's modulus is larger than the low Young's modulus, for some applications Preferably, about Da Cong, preferably about 100 times larger for other applications, and preferably about 1000 times for other applications. In the following, a number of specific details of the device, device components and methods of the present invention are illustrated. To provide a detailed description of the precise nature of the invention. However, for familiarizing the art It will be apparent that the invention may be practiced without such specific details. The present invention provides an extendable semiconductor and electronic circuit that provides good performance when extended, compressed, flexed, or otherwise deformed. The extended semiconductor and electronic circuitry can be adapted for a wide range of device configurations to provide fully flexible electronic and optoelectronic devices. Figure 1 provides an atomic force micrograph showing the extensible semiconductor structure of the present invention. Element 700 includes a flexible substrate 705 (such as a polymer and/or an elastic substrate) having a support surface 710 and a curved semiconductor structure 715 having a curved inner surface 720. In this embodiment, the curved semiconductor structure 715 At least a portion of the curved inner surface 72〇 is coupled to the support surface 71〇 of the flexible 159867.doc •31·201216641 substrate 705. The curved inner surface may be at a selected point along the inner surface 720 or along the inner surface. The exemplary semiconductor structure illustrated in generally all of the points in combination with the support surface 7H) comprises one having a ratio equal to about 100 micrometers. The width and - equal to about 100 nm in the single-crystal silicon with a thickness of the curved β I-based description of a flexible substrate having a thickness approximately the PDMS i millimeters. Curved inner surface 720 has a curved structure that extends the length of the package 3 / port 5 - the substantially periodic waveform. As shown in Figure 1, the amplitude of the wave is about 5 (10) nm and the pitch is about 2 微米 microns. Figure 2 shows a atomic force micrograph of an expanded view of a semiconductor structure 715 having a curved inner surface 72G. Figure 3 shows an atomic force micrograph of an array of extensible semiconductor structures of the present invention. The analysis of the atomic force micrograph in Fig. 3 shows that the #f curved semiconductor structure is reduced by about 〇 as shown in Fig. 4. The outline of the inner surface 720 of the optical microscopy curve of the extendable semiconductor structure of the present invention allows the semiconductor structure to be bent. 715 expands along the deformation axis 730 without undergoing substantial mechanical strain. This wheel shape also allows the semiconductor structure to be bent, flexed or deformed in a direction different from the direction of the deformation axis 73 without significant mechanical damage or loss of performance due to strain. The curved surface of the semiconductor structure of the present invention can be provided with good mechanical properties such as extensibility, flexibility and/or flexibility and/or good electronic performance such as when deflected, extended or deformed. Good field effect mobility) of any contour shape. An exemplary contour shape may have the following features: a plurality of protrusions and/or concave waves, a Gaussian wave, an Aries function, a square wave, an in-region 'and having a sinusoidal wavelet, a periodic wave, a weekless 159867.doc 32· 201216641 Period wave or multiple waveforms of any combination of these waves. Waveforms suitable for use in the present invention may vary with respect to two or three physical dimensions. Figure 5 shows an atomic force micrograph of the extensible semiconductor structure of the present invention, the semiconductor structure 715 of the structure being bonded to a redistributable substrate 7?5 having a three-dimensional relief pattern on the support surface 710 of the substrate on. The two-dimensional undulating pattern includes a concave region 75G and an undulating feature 76 〇β as shown in Fig. 5. The semiconductor structure 715 is bonded to the support surface 71 in the recessed region 750 and the undulating feature 760. Figure 6 is a flow chart showing an exemplary method of fabricating an extendable semiconductor structure of the present invention. In this exemplary method, a pre-strained elastic substrate in an expanded state is provided. Pre-straining can be achieved by any method known in the art including, but not limited to, light pressing and/or pre-bending the elastomeric substrate. The pre-strain can also be achieved via a thermal process, such as by thermal expansion caused by raising the temperature of the elastomeric substrate. The pre-strain-advantage via thermal method can achieve expansion along a plurality of different axes, such as orthogonal axes. An exemplary elastomeric substrate system useful in this method of the invention is a s-substrate having a thickness equal to about 1 mm. The elastic substrate can be pre-strained by expansion along a single-axis or by expansion along a plurality of axes. As shown in Fig. 4, at least a part of the inner surface of the non-printable semiconductor is bonded to the outer surface of the pre-strained elastic substrate in an expanded state. Bonding can be achieved by covalent bonding between the inner surfaces of the surface of the semiconductor, by van der Waals force, by the use of a binder, or by any means such as this. In an exemplary implementation of the elastic substrate system 8, the support surface 159S67.doc-33-201216641 of the pDMs substrate is chemically modified such that it has a plurality of hydroxyl groups extending from its surface to promote coexistence with a semiconductor structure. Price bond. Referring again to Figure 6, after the pre-strained elastic substrate is bonded to the semiconductor structure, the elastic substrate is allowed to at least partially relax to a relaxed state. In this embodiment, the elastic substrate loosens the inner surface of the semiconductor structure, thereby producing a semiconductor component having a curved inner surface. As shown in FIG. 6, the manufacturing method may optionally include a second transfer step and optionally a bonding step, wherein the transferable semiconductor device 715 having a curved inner surface 72A is transferred from the elastic substrate to another substrate. Preferably, a flexible substrate such as a polymer substrate is used. This second transfer step can be performed by having the exposed surface of the semiconductor structure 715 having a curved inner surface 720
之間的黏接層、塗 、塗層及/或薄膜。 本發明之可延伸半導體元件可有效地整合 裝置及裝置組件,諸如電晶體、二極體、 入大量功能性Adhesive layer, coating, coating and/or film between. The extensible semiconductor component of the present invention can effectively integrate devices and device components, such as transistors, diodes, and a large number of functionalities.
體更少受由撓曲、彎曲及 :’生的’且因此比習知剛性無機半導 曲及/或t形引起之結構損壞之影 159867.doc • 34 - 201216641 響其-人,因為f曲半導體結構可處於一輕微機械應變狀 態以提供一曲線内表面,所以本發明之可延伸半導體元件 與習知無應變剛性半導體相比可展示更高之本質場效應遷 移率。最後’因為可延伸半導體元件在裝置溫度循環中能 自由膨脹及收縮,所以其可能提供良好之熱性質。 圖7展不具有一波狀構形之縱向對準的可延伸半導體之 陣列之影像。如圖7所示’該等半導體帶被以週期波構形 提供且由一單一可撓性橡膠基板支撐。 圖8展示本發明之彳延伸+導體元件之一冑面影像,其 中半導體結構776由該可撓性基板777來支撐。如圖以斤 示’半導體結構776具有内表面,肖等内纟面具有一週期 性波之輪廓形狀。亦如圖8所示’該週期波構形擴展穿過 半導體結構776之整個截面尺寸。 本發明亦提供當延伸、撓曲或變形時具有良好效能之可 延伸電子電路、裝置及裝置陣列。與上述可延伸半導體元 件類似’本發明提供可延伸電路及電子裝置,#包含一具 有-支撐表面的可撓性基板’該支撐表面與一具有一曲線 内表面(諸如展示—波形結構之曲線内表面)的裝置、裝置 陣列^電路接觸。在此結構排列中,該裝置、裝置陣列或 電路、。構之至少—部分曲線内表面與該可撓性基板之支撐 表面結合。本發明之此態樣之裝置、裝置陣列或電路係一 。3複數個諸如半導體、介電質、電極、摻雜半導體及導 體之積體裝置組件的多組件元件。在—例示性實施例中, 具有小於約10微米之淨厚度之可撓性電路、裝置及裝置陣 159867.doc •35- 201216641 列包含複數個積體裝置組件,其至少一部分具有週期波曲 線結構。 在本發明之一有用之實施例中’提供包含複數個互連組 件的獨立式電子電路或裝置。該電子電路或裝置之一内表 面與一處於一膨脹狀態之預應變彈性基板接觸且至少部分 結合。預應變可藉由該項技術中已知之任何方法來逹成, 其包括(但不限於)輥壓及/或預彎曲該彈性基板,且可藉由 沿一單一軸之膨脹或藉由沿複數個軸的膨脹來預應變該彈 性基板《結合可直接藉由該電子電路或裝置之至少一部分 内表面與該預應變彈性基板之間的共價鍵或凡得瓦爾力I 實現,或藉由使用黏接劑或一中間結合層來達成。在使該 預應變彈性基板與該電子電路或裝置結合之後,允許該彈 性基板至少部分地鬆他至一鬆他狀態,其使該半導體結構 之内表面彎曲。該電子電路或裝置之 曲線内表面,其在某些有用的實施例中具有一二:生週 期波構形。本發明包括多個實施例,其中包含電子裝置或 電路之所有組件皆存在於—週期或無週期》皮組‘態中。— ::二:電路、襄置及裝置陣列之週期或無週期波組 其遵寸延伸或f曲組態而不在該等電路或裝置之個 上產生大應變。本發明之此態樣提供可延伸電子電 路、裝置及裝置陣列當處於彎 用之雷早㈣地、考曲、延伸或變形狀態時之有 用之電子性質。藉由本方法 -jr ^ m 风之週期波組態之週期可根 據以下來變化··⑴包含該電 洚厘谇W… 电吟次裝置的積體組件之集合之 淨厚度及⑻包含積體裝置 07材科之诸如揚氏模數及 159867.doc -36· 201216641 撓曲剛性之機械性質。 圖9A展示—說明製造可延伸薄膜電晶體之陣列之例示性 方法之流程圖。如圖9A所示,使用本發明之技術提供獨立 式可印刷薄媒電晶體之-陣列。將薄膜電晶體之陣列經由 乾式轉移接觸印刷方法以—曝露該等電晶體之内表面之方 式轉移至-PDMS基板。接著將所曝露内表面與處於一膨 脹狀態之室溫固化預應變PDMS層接觸。該預應變?麵層 之隨後完全固化使該等電晶體之内表面與該預應變叩⑽ 層結合。允許該預應變PDMS層冷卻且呈現一至少部分鬆 弛狀態。PDMS層之鬆弛將一週期波結構引入該陣列中之 電晶體,進而使得其變為可延伸的。圖9A中之插圖提供藉 由本方法製造之可延伸薄膜電晶體陣列之原子力顯微圖。 該原子力顯微圖展示了在延伸或變形狀態中提供良好電子 效能之週期波結構。 圖9B提供處於鬆弛及延伸組態之可延伸薄膜電晶體陣列 之光學顯微圖。以在該陣列上產生一約2〇。/。之淨應變而不 使該等薄膜電晶體破裂或損傷之方式延伸該陣列。經觀察 自一鬆弛組態至一應變組態之轉換為一可逆過程。圖93亦 提供針對施加至閘極之若干電位的汲極電流對汲極電壓的 圖’其展示該等可延伸薄膜電晶體在鬆弛及延伸組態皆展 示良好效能。 實例1:用於橡膠基板上的高效能電子組件之可延伸形 式之單晶矽 吾人已製造由構造為具有微尺度週期波狀幾何形狀之次 159867.doc •37- 201216641 微米單晶元件組成之可延伸形式的矽。當由一彈性體基板 支撐時,此"波狀"矽能可逆地延伸及壓縮至大應變而不損 傷矽。該等波之振幅及週期進行變化以適應此等變形,進 而避免矽自身之顯著應變。與矽直接整合之介電質、摻雜 劑之圖案、電極及其他元件產生完全形成的、高效能"波 狀金屬氧化物半導體場效應電晶體、pn二極體及其他褒 置’其用於可延伸或壓縮至類似大之應變水準之電子電 路。 電子學之進步主要由為增加電路運算速度及積體密度、 為減少其功率消耗及(對於顯示系統)為使大面積覆蓋成為 可此•所做出之努力驅使。近來之一方向尋求發展能在具有 不尋常外形尺寸之非習知基板上形成高效能電路的方法及 材料.紙狀顯示器及光學掃描儀之可撓性塑膠基板、焦平 面陣列之球狀曲線支撐及整合之機器人感測器的保形皮 膚。當以薄膜形式製備且放置在薄基板薄片上或基板層積 板中之中性機械平面附近時,許多電子材料能提供良好彎 曲度。在彼等狀態下,該等作用材料在彎曲期間經受之應 變可保持在引發破裂所需之典型位準(約1%)以下。對於當 操作時可撓曲、延伸或達到極端的彎曲水準之裝置或對於 彼專可#形包覆於具有複雜'曲線形狀之支撐物的裝置, 要求完全可延伸性,它是一更具挑戰性之特性。在此等系 統中,在電路位準之應變可超過幾乎所有已知電子材料, 尤其疋彼等用於已有應用之良好發展的電子材料,之破裂 極限。在某種程度上,此問題能以使用可延伸導線來互連 159867.doc •38· 201216641 由剛性隔離島(is〇Iated island)支撐之電子組件(例如電晶 體)之電路來避開。可以此策略獲取有價值之結果,儘管曰 其最適合可以相對低覆蓋面積之主動電子元件來達成的應 用。吾人報告-不同方法,纟中可延伸性直接以具有微米 級週期、"波”狀幾何形狀之高品質單晶石夕薄膜來達成。此 等結構經由波振幅及波長之變化而非經由該等材料自身中 之潛在破壞性應變來適應大壓縮及拉伸應變。將此等可延 伸·'波狀"矽元件與介電質、摻雜劑之圖案及薄金屬膜整合 可導致高效能、可延伸電子裝置。 圖10表示在彈性體(意即橡膠)基板上波狀單晶矽帶之製 造序列。第一步(頂部框)涉及用以在一絕緣物上矽(SC)I)晶 圓上界定一抗蝕層之光微影術,接著是用以移除頂部矽之 曝露部分的餘刻。用丙酮移除該抗蝕層且然後以濃縮氬氟 酸钱刻内埋的Si〇2層使該等帶自下層矽基板釋放。該等帶 之末端連接至該晶圓以防止其在触刻劑中被洗離。該等抗 #線之寬度(5-50 μιη)及長度(約15 mm)界定該等帶之尺 寸。SOI晶圓上的頂部矽之厚度(20-320 nm)界定該等帶厚 度。在下一步驟(中間框)中,彈性地延伸一平坦彈性體基 板(聚(二曱基矽氧烷),PDMS ; 1-3 mm厚)且然後使其與該 等帶等形接觸。將該PDMS剝離會使該等帶離開該晶圓且 使該等帶黏結至該PDMS表面。釋放該PDMS中之應變(意 即預應變)導致會引起在該矽及該PDMS表面形成良好界定 之波紋的表面變形《(圖11A及11B)該等起伏輪廓係週期在 5與50 μιη之間且振幅在1〇〇 nm及1·5 μηι之間(視矽之厚度 159867.doc -39- 201216641 及該PDMS中預應變之大小而定)的正弦曲線(頂部框,圖 11C)。對於一給定系統,該等波之週期及振幅在大面積 (若干cm2)上均在約5%内》該等帶之間之pe>ms的平滑形態 及鄰近帶之波形中不存在相關相表明了該等帶未強力地機 械耦接。圖11C(底部框)展示作為沿該等波狀帶之一者之 距離的函數而量測之Si尖峰之微拉曼量測結果。該等結果 提供了對應力分佈之瞭解。 此靜態波狀組態之性質與在一半無限低模數支撐物上之 一均勻、薄高模數層中的起始翹棱幾何形狀之非線性分析 一致: λ πίιThe body is less affected by the deflection, bending and: 'green' and thus the structural damage caused by the conventional rigid inorganic semi-guidance and / or t-shaped 159867.doc • 34 - 201216641 ringing its people, because f The curved semiconductor structure can be in a slightly mechanically strained state to provide a curved inner surface, so the extendable semiconductor component of the present invention can exhibit higher intrinsic field effect mobility than conventional unstrained rigid semiconductors. Finally, because the extensible semiconductor component is free to expand and contract during device temperature cycling, it may provide good thermal properties. Figure 7 shows an image of an array of vertically aligned extensible semiconductors having no wavy configuration. As shown in Figure 7, the semiconductor strips are provided in a periodic wave configuration and supported by a single flexible rubber substrate. Figure 8 shows a side view image of a 彳 extension + conductor element of the present invention in which a semiconductor structure 776 is supported by the flexible substrate 777. As shown in the figure, the semiconductor structure 776 has an inner surface, and the inner mask of the chord has a contour shape of a periodic wave. As also shown in Figure 8, the periodic wave configuration extends through the entire cross-sectional dimension of the semiconductor structure 776. The present invention also provides an array of extendable electronic circuits, devices and devices that have good performance when extended, flexed or deformed. Similar to the above extensible semiconductor component, the present invention provides an extendable circuit and an electronic device, #includes a flexible substrate having a support surface, and the support surface has a curved inner surface (such as a display-wave structure) The device of the surface), the array of devices, and the circuit are in contact. In this structural arrangement, the device, device array or circuit, . At least a portion of the curved inner surface is bonded to the support surface of the flexible substrate. A device, device array or circuit of this aspect of the invention. A plurality of multi-component components such as a semiconductor device, a dielectric, an electrode, a doped semiconductor, and a conductor assembly. In an exemplary embodiment, a flexible circuit, device, and device array having a net thickness of less than about 10 microns 159867.doc • 35-201216641 column includes a plurality of integrated device components, at least a portion of which has a periodic wave curve structure . In a useful embodiment of the invention, a stand-alone electronic circuit or device comprising a plurality of interconnect components is provided. The inner surface of one of the electronic circuits or devices is in contact with and at least partially bonded to a pre-strained resilient substrate in an expanded state. The pre-strain can be formed by any method known in the art including, but not limited to, rolling and/or pre-bending the elastic substrate, and by expanding along a single axis or by plural Expansion of the shaft to pre-strain the elastic substrate "combination may be achieved directly by covalent bonds or van der Waals I between the inner surface of at least a portion of the electronic circuit or device and the pre-strained elastic substrate, or by use An adhesive or an intermediate bonding layer is achieved. After bonding the pre-strained elastic substrate to the electronic circuit or device, the resilient substrate is allowed to at least partially loosen to a loose state which bends the inner surface of the semiconductor structure. The curved inner surface of the electronic circuit or device, in some useful embodiments, has a two-in-one periodic wave configuration. The present invention includes a plurality of embodiments in which all components including electronic devices or circuits are present in a "period or no cycle" set of states. — :: 2: Cycles or non-periodic groups of circuits, devices, and device arrays that follow an extended or f-curved configuration without creating large strains on those circuits or devices. This aspect of the invention provides useful electronic properties of an extendable electronic circuit, device, and array of devices when in a curved, early, orthopedic, extended, or deformed state. The period of the periodic wave configuration of the method-jr ^ m wind can be changed according to the following: (1) the net thickness of the set of integrated components including the electric device and the (8) integrated device 07 Materials such as Young's modulus and 159867.doc -36· 201216641 Mechanical properties of flexural rigidity. Figure 9A shows a flow chart illustrating an exemplary method of fabricating an array of extensible thin film transistors. As shown in Figure 9A, an array of freely printable thin dielectric transistors is provided using the techniques of the present invention. The array of thin film transistors is transferred to the -PDMS substrate via a dry transfer contact printing process by exposing the inner surfaces of the transistors. The exposed inner surface is then contacted with a room temperature cured pre-strained PDMS layer in an expanded state. The pre-strain? Subsequent complete curing of the top layer bonds the inner surface of the etc. to the pre-strained ruthenium (10) layer. The pre-strained PDMS layer is allowed to cool and exhibit an at least partially relaxed state. Relaxation of the PDMS layer introduces a periodic wave structure into the transistor in the array, thereby making it extendable. The inset in Figure 9A provides an atomic force micrograph of an extensible thin film transistor array fabricated by the method. The atomic force micrograph shows a periodic wave structure that provides good electronic performance in an extended or deformed state. Figure 9B provides an optical micrograph of an extensible thin film transistor array in a relaxed and extended configuration. To produce about 2 在 on the array. /. The net strain extends the array in a manner that does not rupture or damage the thin film transistors. It is observed that the conversion from a relaxed configuration to a strain configuration is a reversible process. Figure 93 also provides a diagram of the drain current versus gate voltage for a number of potentials applied to the gate, which demonstrates that these extensible thin film transistors exhibit good performance in both relaxed and extended configurations. Example 1: A single crystal of an extensible form of high performance electronic components for use on a rubber substrate has been fabricated from a 159867.doc •37-201216641 micron single crystal element configured to have a microscale periodic wavy geometry. Extendable form of 矽. When supported by an elastomeric substrate, this "wavy" can reversibly extend and compress to large strain without damaging the flaw. The amplitude and period of the waves are varied to accommodate these deformations, thereby avoiding significant strain on the raft itself. The dielectric, dopant pattern, electrode and other components directly integrated with germanium produce fully formed, high-efficiency "wave metal oxide semiconductor field effect transistors, pn diodes and other devices. An electronic circuit that can be extended or compressed to a similar strain level. Advances in electronics have been driven by efforts to increase circuit operation speed and bulk density, to reduce power consumption, and (for display systems) to enable large-area coverage. Recently, one has sought to develop methods and materials for forming high-performance circuits on non-conventional substrates having unusual physical dimensions. Flexible plastic substrates for paper displays and optical scanners, spherical curved support for focal plane arrays And conformal skin of the integrated robot sensor. Many electronic materials provide good flexibility when prepared in film form and placed on a thin substrate sheet or near a neutral mechanical plane in a substrate laminate. In these states, the strains experienced by the active materials during bending can remain below the typical level (about 1%) required to initiate the fracture. It is a more challenging requirement for devices that can flex, extend or reach extreme bending levels when operating, or for devices that are coated with supports with complex 'curve shapes, requiring full extensibility Characteristics of sex. In such systems, the strain at the circuit level can exceed the cracking limit of almost all known electronic materials, especially for the well-developed electronic materials used in existing applications. To some extent, this problem can be avoided by using an extendable wire to interconnect the circuitry of an electronic component (such as an electro-optic) supported by a rigid island (is〇Iated island). This strategy can be used to obtain valuable results, although it is best suited for applications that can be achieved with relatively low coverage active electronic components. We report - different methods, the extensibility of the crucible is directly achieved with a high quality single crystal film with a micron-period, "wave" geometry. These structures are based on changes in wave amplitude and wavelength rather than through Potential destructive strains in the material itself to accommodate large compression and tensile strains. Integration of these extendable 'wavy' elements with dielectric, dopant patterns and thin metal films can lead to high performance An extendable electronic device. Figure 10 shows a manufacturing sequence of a wavy single crystal ribbon on an elastomer (ie rubber) substrate. The first step (top frame) involves sputum (SC) I on an insulator. Photolithography defining a resist layer on the wafer, followed by a residue to remove the exposed portion of the top germanium. The resist is removed with acetone and then embedded in a concentrated argon fluoride acid The 〇2 layer releases the strips from the underlying germanium substrate. The ends of the strips are attached to the wafer to prevent it from being washed away in the etchant. The width of the lines (5-50 μm) and length (about 15 mm) defines the dimensions of the strips. The top of the SOI wafer is thick Degrees (20-320 nm) define the strip thickness. In the next step (middle box), a flat elastomeric substrate (poly(dimercaptodecane), PDMS; 1-3 mm thick) is elastically extended and It is then brought into contact with the strips. The stripping of the PDMS causes the strips to leave the wafer and bond the strips to the surface of the PDMS. Release of the strain in the PDMS (ie pre-strain) results in Surface deformations that form well-defined corrugations on the surface of the PDMS and the surface of the PDMS (Figs. 11A and 11B). The contours of the relief contours are between 5 and 50 μηη and the amplitudes are between 1 〇〇 nm and 1·5 μηι ( The sinusoid of the thickness of the 159 159867.doc -39- 201216641 and the pre-strain in the PDMS (top box, Figure 11C). For a given system, the period and amplitude of the waves are large ( The smoothness of the pe>ms between the bands and the absence of correlation in the waveforms of the adjacent bands indicate that the bands are not strongly mechanically coupled. Figure 11C (bottom frame) ) showing the micro-Raman of the Si spike measured as a function of the distance along one of the undulating bands The results provide insight into the stress distribution. The nature of this static wavy configuration is nonlinear with the initial warp geometry in a uniform, thin, high modulus layer on a half-infinitely low modulus support. Consistent analysis: λ πίι
JL φ = 0.52 ^ * ,, 、 LESi(l-VpDMS)_係勉棱之臨界應變,ερ;·β係預應 變之位準,λ〇係波長且&係振幅。柏松比係v,楊氏模數係 E,且該等下標指Si4PDMS之性質。矽之厚度係h。此處 理涵蓋了製造成之波狀結構之許多特徵。舉例而言,圖 11D展示當該預應變值固定時(約為此等資料之〇 ,波 長及振掄皆線性地視Si厚度而定。波長不取決於預應變之 位準(圖I2)。此外,使用SaPDMS之機械性質之文獻值 (ESl 130Gpa、EPDMS=2MPa、vsi=0.27、vPDMS=0.48)之計算 產生在量測得的值的約1〇%(最大偏差)範圍内之振幅及波 長。"帶冑變”由該等帶之有效長度(由;皮長確定)與其實際 I59867.doc 201216641 長度(由透過AFM量測之表面距離確定)的比例來計算,且 產生近似等於該PDMS争預應變之值(對於高達約3 5%之預 應變)。矽自身中之應變峰值(意即最大值)(吾人稱為矽應 變)係由帶厚度及在應變區中根據κΑ/2(κ係曲率)的在該等 波之極限處之曲率半徑估算得,在該等應變區中該等波存 在且臨界應變(對於此處之情況,約為〇 〇3%)與跟彎曲相 關的應變峰值相比較小《對於圖丨丨之資料,該等矽應變峰 值為約0.36(土0.08)%,其比帶應變小兩倍以上。此矽應變 對於給疋預應變下的所有帶厚度為相同的(圖13)。所得機 械優勢(其中該矽應變峰值大大小於帶應變)對於達成可延 伸丨生至關重要。吾人注意到在蒸鍵或旋塗至上之金 屬及介電質中亦已觀察到翹棱薄膜(與如本文所述之預成 型、經轉移之單晶元件及裝置形成對比)。 在製造之後該等波狀結構對施加至彈性體基板之壓縮及 拉伸應變的動態回應對可延伸電子裝置最重要。為揭示此 過程之機理,當力被施加至PDMSw在與該等帶的長維平 行的方向上壓縮或延伸1>1)1^3時,吾人藉由AFM量測波狀 Si帶之幾何形狀。歸因於柏松效應,此力產生沿該等帶及 與其垂直方向上之應變。該等垂直應變主要導致該等帶之 間之區域中的PDMS的變形。另一方面,沿該等帶之應變 是由該等波之結構的變化來適應。圖14A中之三維高度影 像及表面輪廓呈現代表性的壓縮、未受力及延伸狀態(自 該樣品上輕微不同之位置處收集)。在此等及其他情況 下,該等帶在變形期間保持其正弦(圖14A之右邊框中的 159867.doc •41 · 201216641 線)形狀,其中波結構的大約一半位於如由該等帶之間的 區域界定之PDMS表面的未受力位置之下(圖15)。圖i4b展 不相對於該未受力狀態(零)之壓縮(負)及拉伸(正)施加之應 變的波長及振幅。該等資料對應於自每點處大量(>5〇)帶 收集之平均的AFM量測結果。所施加的應變由該叩⑽基 板之所量測的末端間尺寸變化確^。藉由AFM之直接表面 量測連同由該等正弦波形估算得之圍線積分展示了所施加 的應變等於此處檢查之情況之帶應變(圖16)。(在比該預應 變減去1¾臨界應變更大之拉伸應變處持續之小振幅(<5 nm)波可由在該初始㈣過程期間si之輕微滑動而導致。 j此小(或零)振幅區中計算得之矽應變峰值及帶應變低於 貫際值》)有趣地是,該等結果指示了該等波狀帶對於所 施加應變有兩種不同實體回應。處於緊張狀態時,該等波 以-非直觀方式演變:波長不隨所施加應變而明顯變化, 從而與翹棱後機理-致。相反,振幅之變化適應該應變。 在此狀態中,矽應變隨著延伸該PDMS而變小;當所施加 應變等於該預—時其達到〜〇%。相反,在M縮時,隨著 曰加所施加應變’該等波長減少且振幅增加。此機械回應 與-手風琴風箱之機械回應類⑽,其與拉緊時之特性有本 質的不同間’歸因於波峰及波谷處之曲率半徑 之減小’⑪應變隨著所施加應變增加而增加。然而,石夕應 變之增加速率及大小皆遠低於帶應變,如圖14B所示。此 機理使可延伸性成為可能。 與波狀幾何形狀—致之應變範圍中的完全回應可藉由給 159867.doc -42· 201216641 出波長λ對其在初始趣棱狀態中之值人〇,及所施加應變 心的相依性之方程式來定性地描述: λ = 對於拉伸 對於壓縮 (2) 舉例而言’此拉緊/壓縮不對稱可由在壓縮期間形成之 該PDMS及Si之上升區域之間的輕微可逆間隔所產生,對 於此情況’連同對於未呈現此不對稱性質之系統,拉緊及 壓縮之波振幅A皆由對於適度應變(〈⑺-丨5%)有效的單一陳 述式給出:JL φ = 0.52 ^ * , , , LESi (l-VpDMS) _ is the critical strain of the ridge, ερ; · β system pre-deformation level, λ 〇 wavelength and & amplitude. The cypress ratio v, the Young's modulus E, and the subscripts refer to the properties of Si4PDMS. The thickness of 矽 is h. Here are a number of features that are fabricated into wavy structures. For example, Figure 11D shows that when the pre-strain value is fixed (about this data, the wavelength and the amplitude are linearly dependent on the thickness of the Si. The wavelength does not depend on the level of the pre-strain (Figure I2). In addition, calculations using the literature values of mechanical properties of SaPDMS (ESl 130 Gpa, EPDMS = 2 MPa, vsi = 0.27, vPDMS = 0.48) yield amplitudes and wavelengths in the range of about 1% (maximum deviation) of the measured values. "带胄” is calculated from the ratio of the effective length of the bands (determined by the skin length) to the actual I59867.doc 201216641 length (determined by the surface distance measured by AFM) and produces approximately equal to the PDMS The value of the pre-strain (for pre-strain up to about 35%). The strain peak in the 矽 itself (meaning the maximum value) (I call it the 矽 strain) is the thickness of the belt and the strain zone according to κΑ/2 ( The radius of curvature of the κ-based curvature at the extremes of the waves is estimated such that the equi-waves exist in the strain zones and the critical strain (about 3% for the case here) is related to the bending The strain peak is smaller than the "for the data of the map, these The strain peak is about 0.36 (0.08)%, which is more than twice the strain of the strip. This strain is the same for all strips under pre-stressing (Figure 13). The resulting mechanical advantage (where the peak of the strain) Significantly smaller than the strain) is critical to achieving extensible hygiene. We have observed that warped films have also been observed in steamed or spin-coated metals and dielectrics (with preforms as described herein, The transferred single crystal element and device are contrasted.) The dynamic response of the wavy structure to the compressive and tensile strain applied to the elastomeric substrate is most important to the extendable electronic device after fabrication. To reveal the mechanism of the process, When the force is applied to the PDMSw to compress or extend 1 > 1) 1^3 in a direction parallel to the long dimension of the bands, we measure the geometry of the wavy Si band by AFM. This force produces strain along the zones and perpendicular thereto. These vertical strains primarily cause deformation of the PDMS in the region between the zones. On the other hand, the strain along the zones is the wave Adaptation of the structure to adapt The three-dimensional height image and surface profile in Figure 14A exhibit representative compression, unstressed, and extended states (collected from slightly different locations on the sample). In these and other cases, the bands remain during deformation. Its sinusoidal shape (159867.doc • 41 · 201216641 line in the box to the right of Figure 14A), where approximately half of the wave structure is located below the unstressed position of the PDMS surface as defined by the area between the bands (Figure 15) Figure i4b shows the wavelength and amplitude of the strain applied without compression (negative) and tensile (positive) with respect to the unstressed state (zero). These data correspond to a large amount from each point (>5) 〇) The average AFM measurement results with collection. The applied strain is determined by the dimensional change between the ends of the 叩(10) substrate. The direct surface measurement by AFM along with the surrounding integral estimated from the sinusoidal waveforms shows that the applied strain is equal to the strain of the condition examined here (Figure 16). (Small amplitude (<5 nm) waves that persist at tensile strain greater than the pre-strain minus 13⁄4 critical strain can result from a slight slip of si during the initial (four) process. j This small (or zero) The calculated strain peaks and band strains in the amplitude region are lower than the continuous values.) Interestingly, these results indicate that the undulations have two different physical responses to the applied strain. When in a state of tension, the waves evolve in a non-intuitive manner: the wavelength does not change significantly with the applied strain, and thus the mechanism behind the warping. Instead, the change in amplitude adapts to the strain. In this state, the enthalpy strain becomes smaller as the PDMS is extended; it reaches ~〇% when the applied strain is equal to the pre--. Conversely, at the time of M contraction, the wavelengths decrease and the amplitude increases as the strain applied. This mechanical response is related to the mechanical response of the accordion bellows (10), which is essentially different from the characteristic when tightened. 'Attributable to the reduction in the radius of curvature at the peaks and troughs' 11 strain increases with the applied strain increase. However, the increase rate and size of Shi Xi's strain are much lower than the strain, as shown in Fig. 14B. This mechanism makes extensibility possible. With the wavy geometry, the complete response in the strain range can be obtained by giving the wavelength λ to the value of 159867.doc -42· 201216641 in the initial interesting state, and the dependence of the applied strain heart. The equation is qualitatively described: λ = for stretching for compression (2) For example, 'this tension/compression asymmetry can be generated by a slight reversible interval between the PDMS and the rising region of Si formed during compression, for In this case 'along with systems that do not exhibit this asymmetrical nature, the wave amplitude A of the tension and compression is given by a single statement that is valid for moderate strain (<(7) - 丨 5%):
(3) 其中為係對應於該初始趣棱狀態之值。如圖丨4A所示, 此等陳述式獲得與實驗的數量一致,而無任何參數擬合。 當適應该拉伸/壓縮應變之波狀起伏保持時,矽應變峰值 由該彎曲條件控制且由(33)給出 peak(3) where is the value corresponding to the initial state of interest. As shown in Figure 4A, these statements are obtained consistent with the number of experiments without any parameter fit. When the undulation of the tensile/compressive strain is maintained, the 矽 strain peak is controlled by the bending condition and given by (33) peak
(4) 其與圖14B中由曲率量測之應變十分一致。(亦參看圖 18)。此分析陳述式有助於界定該系統能承受而不使矽破 裂之所施加應變之範圍。對於〇.9%之預應變,若假設矽失 效應變為約2%(對於壓縮或者拉伸),則此範圍為_27% t〇 2·9❶/。。控制預應變之位準允許將此應變範圍(意即接站 30%)用以平衡壓縮與拉伸變形的所要程度。舉例而言,一 3.5%之預應變(所檢查之最大值)產生·24% 的箱 159867.doc -43- 201216641 圍。吾人注意到此等計算假設甚至在極端的變形水準下所 施加應變也等於帶應變。在實驗上,吾人發現歸因於在該 等帶之末端以外及該等帶之間用以適應應變以使得所施加 應變不被完全轉移至該等帶的PDMS之能力,此等估算結 果通常被超過。 吾人已藉由在製造序列(圖〗〇,頂部框)之開始包括額外 之步驟來使用習知處理技術界定矽中摻雜劑的圖案、薄金 屬觸點及介電層而建立功能性、可延伸裝置。以此方式製 造之兩個及三個端子裝置、二極體及電晶體分別提供具有 進階功能性之電路的基礎建構區塊。其中整合之帶裝置首 先被自SOI起離至一未變形PDMS板上且然後至一預應變 PDMS基板之雙重轉移過程可建立波狀裝置,其具有經曝 露以用於探測的金屬觸點。圖17A及17B展示針對施加至 PDMS之各種位準之應變的一可延伸pn接面二極體之光學 影像及電回應。吾人發現在具有延伸或壓縮之裝置的電性 質中沒有在資料之散佈範圍中的系統變化。該等曲線中之 偏差主要Isp·因於探針觸點之品質之變化。此等pn接面二極 體除作為普通整流裝置之外可用作一光偵測器(處於相反 偏壓狀態)或用作光伏打裝置。光電流密度在約_丨V之反向 偏壓時為約3 5 mA/cm2。在正向偏壓,短路電流密度及開 路電壓分別為約17 mA/cm2及0.2 V,其產生〇.3之填充因 子。回應之形狀與模型化(圖17B中之實線)一致。裝置性 質即使在約100個壓縮、延伸及釋放週期之後亦未顯著變 化(圖19)。圖17C展示一可延伸、波狀矽肖特基障壁金屬 159867.doc • 44· 201216641 氧化物半導體場效應電晶體(M〇SFET)之電流-電壓特性, 該MOSFET是藉由與用於pn二極體之程序類似的程序且藉 由作為閘極介電質(33)之熱Si〇2之整合薄層(4〇 nm)形成。 由對此波狀電晶體之電學量測而擷取之裝置參數(線形範 圍遷移率約100 cm2/Vs(可能限於觸點)、臨限電壓約_3 v) 可與使用相同處理條件在sOI晶圓上形成的裝置之裝置參 數相比較。(圖20及21)。如在pn二極體中,此等波狀電晶 體能可逆地延伸及壓縮至大應變位準而不損傷該等裝置或 顯著改變電性質。在二極體及電晶體中,在該等裝置之末 端以外的PDMS之變形導致比所施加應變更小的裝置(帶) 應變。總體可延伸性由裝置可延伸性及此等類型之pdms 變形之組合效應導致。在比此處檢查之壓縮應變更大之壓 縮應變下,PDMS傾向於以一使得探測變得困難的方式彎 曲。在更大之拉緊應變下,視矽厚度、帶長度及矽與 PDMS之間結合的強度而定,該等帶破裂、抑或滑動且保 持完整。 此等可延伸矽MOSFET及pn二極體僅表示可形成之許多 類型"波狀"電子裝置中之兩種。完整電路薄片或薄矽板亦 可被結構化為單軸或雙軸可延伸波狀幾何形狀。除了波狀 裝置之惟一機械特性以外,會在許多半導體中產生的應變 與電子特性的耦合亦提供了設計可利用應變中之機械可調 節、週期性變化以達成不同尋常之電子回應之裝置結構的 機會。 材料及方法 159867.doc •45· 201216641 樣品製備:由Si基板(Soitec公司)上的Si〇2(145 nm、145 nm、200 nm、400 nm、400 nm或 1 μπι之厚度)上的 Si(20、 50、100、205、290或320 nm之厚度)組成之絕緣物上矽 (SOI)晶圓。在一種狀況下,吾人使用Si(Shin-Etsu)上的 Si(約2.5 μιη之厚度)及Si〇2(約1.5 μιη之厚度)之SOI晶圓。 在所有狀況下,摻雜硼(p型)或磷(η型)之頂部Si層具有在5 至20 Qcm之間的電阻率。此等SOI晶圓之頂部Si以光阻劑 (AZ 5214光阻劑,Karl Suss MJB-3接觸遮罩對準器)圖案 化且經反應性離子蝕刻(RIE)以界定Si帶(5〜50 μιη寬,15 mm長)(PIasmaTherm RIE,SF6 40sccm,50mTorr,100W)。 藉由在HF(49°/〇)中底切蝕刻來移除該8丨〇2層,該蝕刻時間 主要視Si帶之寬度而定。橫向姓刻速率通常為2至3 μπι/min。藉由將基底與固化劑以1 〇 : 1之重量比例混合且 在70°C下固化>2小時或在室溫下固化>12小時來準備聚(二 甲基矽氧烷)(PDMS)彈性體(Sylgard 184, Dow Corning)之 板0 將此等PDMS平板(1至3 mm之厚度)與已蝕刻SOI晶圓上 之Si共形接觸以產生該等波狀結構。可使用在此接觸之前 建立該PDMS之受控膨脹、繼之以在自晶圓移除後收縮的 任何方法。吾人檢查三種不同技術。在第一種技術中,在 接觸該SOI基板之後對PDMS之機械輥軋建立該等預應變。 儘管波狀結構可以此方式形成’但是其傾向於具有非均勻 的波週期及振幅。在第二種技術中,在接觸之前將該 PDMS(熱膨脹係數=3.1 X ΙΟ·4 K·1)加熱至30°C與180°C之間 159867.doc -46- 201216641 的溫度且然後在自該S0I移除後將其冷卻,其以一高度可 重現的方式在大面積上產生具有良好均勻性之波狀81結 構。以此方法’吾人藉由改變溫度來準確地.控制PDms中 預應變位準(圖12)。第三種方法使用在與s〇i接觸之前用 機械台延伸且接著在移除之後實體地釋放之PDms。與熱 學方法類似’此方法允許有良好均勻性及重現性,但與該 熱學方法相比更難以精細地調節預應變位準。 對於諸如pn接面二極體及電晶體之裝置,電子束蒸鑛 (Temescal BJD1800)且光微影圖案化(經由蝕刻或起離)的 金屬層(Al、Cr、Au)充當觸點及閘極。將旋塗摻雜劑 (SOD)(對於 p型’ B-75X,Honeywell,USA ;對於 η型, Ρ509,Filmtronics,USA)用於摻雜矽帶。首先將該等s〇D 材料旋塗(4000 rpm ’ 20 s)至預圖案化SOI晶圓上。藉由電 楽增強化學氣相沈積(PECVD)(PlasmaTherm)製備之二氧化 矽層(300 nm)用作該SOD之遮罩。在950°C加熱10秒之後, 使用6:1之緩衝氧化物蝕刻劑(B0E)蝕刻掉s〇I晶圓上之 SOD與遮罩層。對於電晶體裝置,熱生長(藉由爐中之高 純度氧氣流乾式氧化至25 nm與45 nm之間的厚度, 1100°C ’ 10〜20分鐘)之二氧化矽提供閘極介電質。在完成 該soi基板上的所有裝置處理步驟之後,藉由光阻(az5214 或Shipley S181 8)來覆蓋具有整合之裝置結構之以帶(通常 50 μπι寬’ 15 mm長)以在下層Si〇2之HF姓刻期間保護該裝 置層。在藉由氧電漿移除該光阻層之後,將無任何預應變 之平坦PDMS(70°C ’ >4小時)板用於自處於平坦幾何形狀 159867.doc •47- 201216641 的SOI基板移除該等帶裝置。然後將部份固化的pDMS(在 將基底與固化劑混合之後在室溫下>12小時)板與該完全固 化PDMS板上的該等Si帶裝置接觸。完成該部份固化pDMS 之固化(藉由在70C加熱),接著移除此板,將該等裝置自 該第一PDMS板轉移至該新PDMS基板。與冷卻至室溫相關 聯之收縮會建立一預應變,使得移除及釋放建立波狀裝 置,同時電極被曝露以用於探測。 量測:將原子力顯微圖(AFM)(DI_31〇〇, Veec〇)用以精 確地量測该4波性質(波長、振幅)。自所獲得之影像,量 測且統計地分析沿該波狀Si之截面輪廓。使用一自製延伸 台、以及AFM及半導體參數分析器(AgUent,5155C)來量 測波狀Si/PDMS之機械及電回應。藉由J〇Mn γν〇η HR 8〇〇 光譜分析器使用來自He-Ne雷射之632.8 nm的光執行拉曼 量測。沿該波狀Si以1 μιη間隔量測該拉曼光譜,其中在沿 該等結構之長度的每一位置處調整焦點以最大化訊號。所 量測光譜藉由洛仁子函數來擬合以定位尖峰波數。歸因於 尖峰波數對顯Μ鏡之聚焦位置之輕微依賴,拉曼結果僅提 供對應力分佈的定性瞭解。 圍線長度、帶應變及矽應變之計算:該等實驗結果展 示,對於此處探究之材料及幾何形狀範圍,波狀Si的形狀 可準確地用簡單正弦函數(意即,y=Asin(kx)(k=27ta))來表 示。然後來計算該圍線長度。 03 |λ — L| ^ | 使用ε Γ~來計算波狀Si之帶應變。矽應變峰值在該等 波之波峰及波谷處產生,且使用來計算,其中 159867.doc •48· 201216641(4) It is in good agreement with the strain measured by the curvature in Fig. 14B. (See also Figure 18). This analytical statement helps define the range of strains that the system can withstand without breaking the raft. For a pre-strain of 9%.9%, if the loss effect is assumed to be about 2% (for compression or stretching), the range is _27% t〇 2·9❶/. . Controlling the level of pre-strain allows this strain range (meaning 30% pick-up) to balance the desired degree of compression and tensile deformation. For example, a 3.5% pre-strain (the maximum value checked) yields a 24% box 159867.doc -43- 201216641. We have noticed that these calculations assume that the strain applied even at extreme deformation levels is equal to the strain. Experimentally, we have found that the results are usually attributed to the ability to adapt the strain outside the ends of the bands and the bands so that the applied strain is not completely transferred to the PDMS of the bands. exceed. We have established additional functionality by using conventional processing techniques to define the pattern of dopants in the crucible, thin metal contacts, and dielectric layers by starting with additional steps in the fabrication sequence (Fig. 〇, top box). Extension device. The two and three terminal devices, the diodes, and the transistors fabricated in this manner provide the basic building blocks of the circuits having advanced functionality, respectively. The dual transfer process in which the integrated tape device is first removed from the SOI onto an undeformed PDMS board and then to a pre-strained PDMS substrate establishes a wavy device having exposed metal contacts for detection. 17A and 17B show optical images and electrical responses of an extendable pn junction diode for strain applied to various levels of PDMS. We have found no systematic changes in the spread of data in the electrical properties of devices with extension or compression. The deviation in these curves is mainly due to the change in the quality of the probe contacts. These pn junction diodes can be used as a photodetector (in an opposite bias state) or as a photovoltaic device in addition to being a conventional rectifying device. The photocurrent density is about 3 5 mA/cm 2 at a reverse bias of about _ 丨 V. In the forward bias, the short circuit current density and the open circuit voltage are about 17 mA/cm2 and 0.2 V, respectively, which produces a 填充3 filling factor. The shape of the response is consistent with the modeling (solid line in Figure 17B). The device properties did not change significantly even after about 100 compression, extension and release cycles (Figure 19). Figure 17C shows the current-voltage characteristics of an extendable, wavy Schottky barrier metal 159867.doc • 44· 201216641 oxide semiconductor field effect transistor (M〇SFET), which is used with pn The procedure of the polar body is similar to the procedure and is formed by an integrated thin layer (4 〇 nm) of thermal Si 〇 2 as the gate dielectric (33). The device parameters taken from the electrical measurement of this wavy transistor (linear range mobility of approximately 100 cm2/Vs (possibly limited to contacts), threshold voltage approx. _3 v) can be used with the same processing conditions at sOI The device parameters of the devices formed on the wafer are compared. (Figures 20 and 21). As in pn diodes, such wavy electromorphs can reversibly extend and compress to large strain levels without damaging the devices or significantly altering electrical properties. In the diode and the transistor, the deformation of the PDMS other than the end of the devices causes strain (device) strain that is less than the applied change. The overall extensibility results from the combination of device extensibility and the pdms deformation of these types. At compressive strains greater than the compressive strain examined here, PDMS tends to bend in a manner that makes detection difficult. At greater tensile strains, depending on the thickness of the crucible, the length of the strip, and the strength of the bond between the crucible and the PDMS, the strips are broken, or slipped and remain intact. These extendable MOSFETs and pn diodes represent only two of the many types of "wave" electronic devices that can be formed. The complete circuit sheet or web can also be structured into a uniaxial or biaxial extendable wavy geometry. In addition to the unique mechanical properties of the wavy device, the coupling of strain and electronic properties that can occur in many semiconductors also provides for the design of device structures that utilize mechanically adjustable, periodic variations in strain to achieve an unusual electronic response. opportunity. Materials and Methods 159867.doc •45· 201216641 Sample preparation: Si on a Si substrate (Soitec) at Si〇2 (thickness of 145 nm, 145 nm, 200 nm, 400 nm, 400 nm or 1 μm) An insulator-on-insulator (SOI) wafer consisting of 20, 50, 100, 205, 290 or 320 nm thickness. In one case, we used an SOI wafer of Si (thickness of about 2.5 μm) and Si〇2 (thickness of about 1.5 μm) on Si (Shin-Etsu). In all cases, the top Si layer doped with boron (p-type) or phosphorous (n-type) has a resistivity between 5 and 20 Qcm. The top Si of these SOI wafers is patterned with a photoresist (AZ 5214 photoresist, Karl Suss MJB-3 contact mask aligner) and reactive ion etching (RIE) to define the Si band (5 to 50) Μιη width, 15 mm long) (PIasma Therm RIE, SF6 40 sccm, 50 mTorr, 100 W). The 8 丨〇 2 layer is removed by undercut etching in HF (49°/〇), which depends mainly on the width of the Si band. The lateral surname rate is typically 2 to 3 μπι/min. Preparation of poly(dimethyloxane) by mixing the substrate with a curing agent in a weight ratio of 1 〇: 1 and curing at 70 ° C for 2 hours or at room temperature for > 12 hours (PDMS) ) Elastomer (Sylgard 184, Dow Corning) Plate 0 These PDMS plates (1 to 3 mm thickness) are conformally contacted with Si on the etched SOI wafer to create the undulating structure. Any method of establishing controlled expansion of the PDMS prior to this contact, followed by shrinkage after removal from the wafer, can be used. We check three different technologies. In the first technique, the pre-strain is established for mechanical rolling of the PDMS after contacting the SOI substrate. Although the wavy structure can be formed in this manner', it tends to have a non-uniform wave period and amplitude. In the second technique, the PDMS (thermal expansion coefficient = 3.1 X ΙΟ·4 K·1) is heated to a temperature between 159867.doc -46 and 201216641 between 30 ° C and 180 ° C before contact and then at The SOI is cooled after it is removed, which produces a wavy 81 structure with good uniformity over a large area in a highly reproducible manner. In this way, we accurately control the pre-strain level in the PDms by changing the temperature (Fig. 12). The third method uses PDms that are extended with a mechanical table prior to contact with s〇i and then physically released after removal. Similar to the thermal method' this method allows for good uniformity and reproducibility, but it is more difficult to finely adjust the pre-strain level than the thermal method. For devices such as pn junction diodes and transistors, electron beam evaporation (Temescal BJD1800) and photolithographic patterning (via etching or delamination) of the metal layer (Al, Cr, Au) acts as contacts and gates pole. Spin-on dopant (SOD) (for p-type 'B-75X, Honeywell, USA; for η-type, Ρ509, Filmtronics, USA) was used for doping the ruthenium band. The s〇D materials were first spin coated (4000 rpm '20 s) onto the pre-patterned SOI wafer. A ruthenium dioxide layer (300 nm) prepared by electroporation enhanced chemical vapor deposition (PECVD) (Plasma Therm) was used as a mask for the SOD. After heating at 950 ° C for 10 seconds, the SOD and mask layers on the sI wafer were etched away using a 6:1 buffered oxide etchant (B0E). For the transistor device, the thermal growth (dry oxidation of the high purity oxygen in the furnace to a thickness between 25 nm and 45 nm, 1100 ° C '10 to 20 minutes) of the cerium oxide provides a gate dielectric. After completing all the device processing steps on the soi substrate, the strip with integrated device structure (usually 50 μπι width '15 mm long) is overlaid by the photoresist (az5214 or Shipley S181 8) to the underlying Si〇2 The device layer is protected during the HF surname. After removing the photoresist layer by oxygen plasma, a flat PDMS (70 ° C ' > 4 hours) plate without any pre-strain is used for the SOI substrate in a flat geometry 159867.doc • 47-201216641 Remove the belt devices. The partially cured pDMS (at room temperature > 12 hours after mixing the substrate with the curing agent) is then contacted with the Si ribbon devices on the fully cured PDMS panel. The curing of the partially cured pDMS is completed (by heating at 70 C), followed by removal of the plate, and the devices are transferred from the first PDMS plate to the new PDMS substrate. The contraction associated with cooling to room temperature establishes a pre-strain that causes the removal and release to establish a wavy device while the electrodes are exposed for detection. Measurement: An atomic force micrograph (AFM) (DI_31〇〇, Veec〇) was used to accurately measure the 4-wave properties (wavelength, amplitude). From the obtained image, the cross-sectional profile along the wavy Si is measured and statistically analyzed. The mechanical and electrical response of the wavy Si/PDMS was measured using a self-contained extension station and an AFM and a semiconductor parameter analyzer (AgUent, 5155C). Raman measurements were performed using a J〇Mn γν〇η HR 8〇〇 spectral analyzer using 632.8 nm light from a He-Ne laser. The Raman spectrum is measured at intervals of 1 μm along the wavy Si, wherein the focus is adjusted at each position along the length of the structures to maximize the signal. The measured spectrum is fitted by the Loren subfunction to locate the peak wavenumber. Due to the slight dependence of the peak wavenumber on the focus position of the fluoroscopy, the Raman results only provide a qualitative understanding of the stress distribution. Calculation of the length of the line, the strain of the belt and the strain of the enthalpy: These experimental results show that for the material and geometry range explored here, the shape of the wavy Si can be accurately approximated by a simple sine function (ie y=Asin(kx) ) (k = 27ta)) to indicate. Then calculate the length of the fence. 03 |λ — L| ^ | Use ε Γ~ to calculate the strain of the wavy Si. The peak value of the 矽 strain is generated at the peaks and troughs of the equal waves and is used to calculate, 159867.doc •48· 201216641
Si厚度,且係波峰或波谷處之曲率半徑,其由 c ^給出,其中η係一整數且y"係y關於乂的二階導 數。該貫際形狀之正弦函數近似,矽應變峰值由 εΓ*=_^給出。圖12展示作為用以建立該預應變之溫度 之函數的波長。如圖13展示,歸因於波振幅及波長對厚度 之線形相依性〜/2,λ〜/〇,該應變峰值獨立於Si厚度。圖 15展示了波狀結構包含相對於該等帶之間之pDMs表面的 水平面的幾乎相等之向上及向下移位。矽帶應變等於此處 檢查之系統之所施加應變(圖1 6)。 一手風琴風箱模型:當在壓縮時矽可與PDMS分離時, 系統由手風琴風箱機理而非翹棱機理支配。在該風箱狀況 下,所施加之壓縮應變(Sapplied)之波長為λο(1 +eapplied),其 中λ為無應變組態中的波長,如方程式(2)所描述。因為矽 帶之圍線長度在壓縮應變之前及之後近似相同,吾人可使 用以下關係式來確定波振幅Α。 ίπ° 1 + A0 sin 2π λΓ applied ) 1 + A sin 2π 人 0 (1 + ε applied ) dx 此方程式對於<«ΐ具有漸近解Α = >/ΪΤ^ 在小壓縮應變下’此方程式簡化為方程式(3),其亦適用於 S^PDMS之分離係*可能的情況,且該體系遵循紐棱機 理。矽應變峰值由= * applied ^ applied 2ε, i+eappliedf2 ^ applied 給出。對於中 度壓縮應% &陳述式近似與方程式(4)相同。在施加中度 159867.doc •49- 201216641 應變的界限内’與波振幅類似,矽應變峰值對於該風箱模 型及該勉棱模型具有類似函數形式。圖18展示根據以上陳 述式及根據方程式(4)計算之應變峰值。 裝置特徵化.將半導體參數分析器(Agilent,$ 1Μ c)及 習知探測台用於該等波狀pn接面二極體及電晶體之電學特 徵化。Pn二極體之光回應在約! w/cm2之照度丁量測,如 藉由一光學功率計(Ophir 〇ptronics公司,Laser Power Meter AN/2)來量測。吾人使用機械台在延伸及壓縮期間及 之後來量測該等裝置。作為探究該過程之可逆性的方法, 吾人在約1 00個壓縮(至約5%應變)、延伸(至約i 5%應變)及 釋放週期之前及之後在環境光下量測三個不同pn二極體。 圖19展示結果。圖20及21展示來自波狀電晶體之影像、示 意性說明及裝置量測結果。 實例2.用於彈性體基板上的高效能電子電路之翹棱及 波狀GaAs帶 製造厚度在次微米範圍内且具有良好界定的、,,波狀"及/ 或翹棱4何形狀之單晶GaAs帶。位於一彈性體基板之表 面上或嵌入彈性體基板中之所得結構展示達到 > 丨〇%之 應變的可逆延伸性及壓縮性,比自身的可逆延伸及壓 縮應變大十倍以上。藉由在此等結構之GaAs帶上整合歐姆 及肖特基觸點,可達成高效能可延伸電子裝置(例如金屬 半導體場效應電晶體)。此類電子系統可單獨使用或與類 似設計^矽、介電質及/或金屬材料組合使用,以形成用 於要求网頻率運作以及可延伸性、極端可撓性或與具有複 159867.doc -50· 201216641 雜曲線形狀之表面相符的能力之應用的電路。 在傳統微電子學中,主要根據速度、功率效率及整合層 級來量測效能能力。而在其他更新的電子裝置形態中的進 步是由在非習知基板(例如低成本塑膠、箔、紙)上達成整 合或覆蓋大面積之能力所驅動的。舉例而言,藉由等形地 包裹身體以數位地將所要組織成像之大面積成像器可達成 新形式的X射線醫療診斷《可在多種表面及表面形狀上展 開之輕重量、牆壁尺寸之顯示器或感測器提供了用於建築 設計之新技術。已探究包括小有機分子、聚合物、非晶系 矽、多晶矽、單晶矽奈米線及微結構帶之各種材料,以充 §可支援此等及其他應用之類型的薄膜電子裝置的半導體 通道。此等材料使具有跨越一廣泛範圍(意即自1〇-5至5〇〇 cm2/V.s)之遷移率及在可撓性基板上呈可機械彎曲薄膜形 態之電晶體成為可能。諸如大孔徑干涉合成孔徑雷達 (InSAR)及射頻(RF)監視系統之要求高速運作之應用要求 八有很尚遷移率的半導體,諸如GaAs,或Inp等等。單晶 複合物半導體之脆弱性產生若干必須克服之製造挑戰以便 製造具有該等半導體的高速、可撓性電晶體。吾人藉由使 用自鬲ασ質塊晶圓建立之印刷GaAs線陣列來於塑膠基板上 建構金屬半導體場效應電晶體(MESFET)而建立一實際方 法。此等裝置即使在中等規模裝置(例如微米閘長度)中亦 展不良好機械可撓性及接近2 GHzifT.。此實例展示基於 GaAs帶之MESFET(與線裝置相反),其經設計具有特殊幾 何形狀,不僅提供可彎曲性而且提供顯著超過該GaAs自身 159867.doc •51· 201216641 的本質屈服點(約2%)之應變水準(約10%)之機械可延伸 性。所得之類型的可延伸高效能電子系統可提供極高水準 的可彎曲性及與曲線表面等形整合之能力。此GaAs系統實 例以四種重要方式擴展吾人所描述之"波狀"矽:⑴其展示 GaAs(GaAs在實際條件下是比Si更機械脆弱之材料)之可延 伸性’(ii)其引入一新"翹棱”幾何形狀,其可連同先前描述 之"波狀”組態或獨立於先前描述之"波狀"組態而用於實現 可延伸性,(iii)其達成一新類型可延伸裝置(意即 MESFET) ’及(iv)其展示了與矽相比可延伸於更大範圍中 且在壓縮/拉緊中具有更大對稱性的延伸。 圖22說明用於在一由聚(二甲基矽氧烷)(pDMS)製造之彈 性體基板上製造可延伸GaAs帶之步驟。該等帶由具有多個 遙晶層之尚品質GaAs塊晶圓產生。該晶圓是藉由在一 (100)半絕緣 GaAs(Si-GaAs)晶圓上生長一 2〇〇 11111厚 A1As 層,接著順序沈積一具有150 nm厚度之8丨_(^^層及具有 120 nm厚度及4xl0” cm-3載體濃度之Si摻雜nSGaAs層來 製備。與(0 Π*)結晶方向平行而界定之光阻線之圖案充當 磊晶層(包括GaAs及AlAs)的化學蝕刻之遮罩。使用h3P〇4 及出〇2之含水蝕刻劑之各向異性蝕刻將此等頂部層隔離為 具有由光阻界定的長度及取向,且具有相對於晶圓表面成 銳角之側壁的個別條塊。在該各向異性蝕刻之後移除該光 阻且接著將該晶圓浸泡於HF之乙醇溶液(乙醇與49%含水 HF之間體積比為2:1)可移除該A1As層及釋放帶… GaAs/S丨-GaAs)。在此步驟中,使用乙醇取代水減少了歸 159867.doc •52- 201216641 因於乾燥期間之毛細管力之作用而在該等易碎帶中可發生 的破裂。與水相比乙醇之更低之表面張力亦最小化了在該 等GaAs帶之工間布局中的由乾燥引發之無序。在下一步驟 令’將具有釋放的GaAs帶之晶圓與一預延伸平板之 表面接觸,使該等帶沿延伸方向對準。在此種狀況下,凡 得瓦爾力在之間之交互作用中占主要地位。 對於要求更強交互作用強度之狀況,將si〇2之一薄層沈積 至GaAs上,且在接觸之前不久將1>£^3曝露於紫外線引發 之臭氧(意即,空氣中氧氣之產物)。臭氧在pDMs之表面 上產生-Si-OH基團,其—經接觸就與叫表面反應以形成 橋接石夕氧烧以-〇七_鍵。由於該等帶之側面之幾何形狀, 所沈積Si〇2在每一帶的邊緣處係非連續的。對於弱及強結 合程序兩者而言,將該PDMS自該母晶圓剝離就使所有帶 轉移至PDMS之表面。使該PDMS中預應變鬆弛會導致沿該 等帶之大尺度翹棱及/或正弦波狀結構之自發形成。該等 帶之幾何形狀極大地取決於施加至該印章之預應變(藉由 △UL界定)、PDMS與帶之間的交互作用、及該等帶之撓曲 剛性。對於此處研究之帶,小預應變(<2%)對於強及弱交 互作用之狀況皆產生具有相對小的波長及振幅之高度正弦 的波(圖22右邊框、中間框)。GaAs中此等幾何形狀與針 對Si報告之幾何形狀類似。可施加更高之預應變(例如高達 約15%)以建立類似類型的波,其中在該等帶與該基板2間 存在強結合。在弱交互作用強度及大預應變之狀況下形成 由具有相對大振幅及寬度之無週期"翹棱”組成之不同類型 I59867.doc -53- 201216641 的幾何形狀(圖22右邊框、頂部框)。另外,吾人之研究奸 果展示兩種類型結構(翹棱及波)可在單一帶中共存,其挽 曲剛性沿其長度變化(例如歸因於與裝置結構相關聯之厚 度變化)。 圖23展示了藉由PDMS(約5 mm厚度)與帶之間的強結合 而形成之具有270 nm(包括;i-GaAs及Si-GaAs層)厚度及1 〇〇 μπι(此實例中討論的所有帶皆具有10〇 μπι之寬度)寬度之波 狀GaAs帶的若干顯微圖。使用在GaAs上的2-nm Ti及28_ nm Si〇2層,該製造遵循強結合之程序。在結合之前不久 或在結合期間藉由熱膨脹(在一焕箱中加熱至9〇°c )而在 PDMS中建立約1.9%(自PDMS之熱回應計算得)的雙軸預應 變。此加熱亦加速界面矽氧烷鍵之形成。在將GaAs帶轉移 之後將該PDMS冷卻至室溫(約27°C ),從而釋放預應變。 圖23之框A、B及C分別展示用光學顯微鏡、電子掃描顯微 鏡(SEM)及原子力顯微鏡(AFM)自相同樣品收集之影像。 該等影像展示了該等GaAs帶中週期性、波狀結構之形成。 藉由自AFM影像(圖23D)估計切割線(圖23E及23F)來定量 地分析該等波。與帶之縱向方向平行之圍線清楚地展示了 與正弦波(圖23E之虛線)的計算擬合一致的週期性、波狀 輪廟。此結果與對半無限低模數支撐物上的均勻的、薄 的、高模數層中之起始翹棱幾何形狀之非線性分析達成一 致。與此函數關聯之峰-峰振幅及波長分別被確定為2 56及 35.0 μιη。自該印章上鄰近兩個尖峰之間水平距離(意即該 波長)與該等尖峰之間實際圍線長度(意即藉由AFM量測的 159867.doc •54· 201216641 表面距離)之間的比例計算之應變(吾人稱為帶應變)產生比 該PDMS中預應變更小的值(意即! 3%) <»此差別可歸因於 PDMS之低剪力模數及與比pdms基板之長度更短的GaAs 帶之長度相關之島效應。在波峰及波谷處之GaAs帶之表面 應變(吾人稱為最大GaAs應變)由帶厚度及根據k/j/2(其中κ 為曲率)的該等波之波峰或波谷的曲率半徑求得。在此估 算中,因為該PDMS可被視為模數與GaAs之模數相比較低 之半無限支撐物(GaAs之揚氏模數:85.5 GPa對PDMS之楊 氏模數:2 MPa) ’所以可忽略該PDMS印章中應變對GaAs 的直接影響。對於圖23E之資料,最大GaAs應變為約 0.62%,其比帶應變(意即13%)小兩倍以上。此機械優勢 在GaAs帶中提供可延伸性,物理性質與波狀以相似。 如圖23F中所示,該等帶之波峰及波谷區域分別比原始 PDMS之表面(意即無帶的區域)之輪廓水平面(綠曲線之右 邊部分)更咼及更低。該結果暗示作為分別由波峰及波谷 中的GaAs帶施加至PDMS之向上及向下力之結果’ 下 的PDMS採取一波狀輪廓。靠近該等波之波峰的pDMS之準 確幾何形狀難以直接估計。吾人懷疑除了向上變形外亦存 在由柏松效應引起之橫向頸縮。可藉由將應變施加至 PDMS來延伸及整縮(所謂的所施加應變分別對延伸表示為 正而對壓縮表示為負)該PDMS印製器上的波狀帶。圖23入 及23B之插圖展示當施加_相對小延伸應變(意即約丄.叫 時變形為其原始扁平幾何形狀之帶的影像。進一步的延伸 將更多張力應變轉移至該扁平GaAsf,從而當此過量應變 159867.doc -55- 201216641 達到GaAs之失效應變時導致帶之破損。施加至基板之壓縮 應變減少該等波狀帶之波長且增加該等波狀帶之振幅。當 波峰(及波谷).處之彎曲應變超過該失效應變時就產生壓縮 失效。此隨著應變之波長變化與先前矽中的觀察結果一致 且與由理想模型推導出的波長不變性之預測不同。 可藉由經由使用一機械台(與熱膨脹相反)而增加施加至 PDMS的預應變來改良波狀GaAs帶之可延伸性。舉例而 言,將具有Si〇2層之GaAs帶轉移至一具有7.8%預應變之 PDMS印章的表面上可產生GaAs中無任何可觀測破裂之波 狀帶(圖24A) ^此種狀況下,波峰處的彎曲應變估算為約 1.2%,其比GaAs之失效應變(意即約2%)更低。與該低預 應變狀況類似,當延伸及壓縮該系統時該等波狀帶類似於 一手風琴般運作:波長及振幅變化以適應所施加應變。如 圖24A所示’該等波長隨著拉伸應變而增加,直至該等帶 變為扁平,且隨著壓縮應變減小,直至該等帶破裂。此等 變形為完全可逆的,且不包含PDMS上的GaAs之任何可量 測的滑動。與在具有弱結合及低得多的預應變之Si帶中所 觀測到之略微不對稱性質相比,波長在壓縮及拉伸中隨著 所施加應變而線性地變化(見圖24B中黑色線及符號 在實際應用中,以一保持該等GaAs帶及裝置之可延伸性 气將其囊封可為有用的。作為一種可能性之簡單展 不,吾人在諸如圖24八中所示者的樣品上澆鑄且固化pDMs 預聚合物以將該等帶嵌入PDMS。經嵌入系統展示與未嵌 入之系統類似之機械性質,意即延伸該系統時增加波長而 159867.doc -56 · 201216641 壓縮該系統時減少波長(圖24B中紅色線及符號)。歸因於 固化第二PDMS層之收縮產生中等量的額外應變(約1。/〇)。 此應變導致該等波狀帶之波長中的略微減少,進而略微擴 展了可延伸性之範圍。圖24B展示該差別。總的來說,以 約7.8°/。之預應變產生之系統可延伸或壓縮至高達約10%的 應變而不在GaAs中引致任何可觀測之破損。 PDMS基板上的波狀GaAs帶可用以製造高效能電子裝 置,諸如MESFET ’該等電子裝置之電極是經由在轉移至 PDMS之前在晶圆上的金屬化及加工而形成。此等金屬層 以一空間相依之方式改變該等帶之撓曲剛性。圖25A展示 在轉移至一具有約1.9%之預應變之PDMS基板之後與歐姆 條(源極及沒極)及肖特基觸點(閘極)整合的GaAs帶。該等 歐姆觸點由包括AuGe(70 nm)/Ni(10 nm)/Au(70 nm)之金屬 堆疊組成’該等金屬堆疊係經由微影界定之遮罩以及在一 具有流動的A之石英管中在高溫(意即45〇<t持續j…幻下 將晶圓之順序退火而形成於初始晶圓上。此等歐姆區段具 有500 μιη之長度。兩個相鄰歐姆觸點之間之距離為5〇〇 μΓΠ(意即通道長度)。具有24〇 μιη之長度(意即閉極長度)之 肖特基觸點係藉由根據光微影設計之遮罩經由電子束蒸鍍 直接沈積75-nm Cr層及75_nm au層來產生。該等電極具有 等於該等GaAs帶之寬度,意即1〇〇 μιη;其相對大尺寸便 利了探測。可顯著減小電極及半導體通道之尺寸以達成增 強之裝置效能。如圖25Α中所示,此等可延伸 MESFET僅在無電極之區域中展示短程週期波。在較厚區 159867.doc -57· 201216641 域中不存在波是由主要歸因於與該等金屬相關聯之額外厚 度的該等區域的增強的撓曲剛性所引起的。可藉由使用大 於約3%之預應變而在更厚區域中起始週期波。然而,在 此等狀況下,歸因於關鍵瑕疵及/或在該等金屬電極之邊 緣附近的高應變峰值’該等帶傾向於在該等金屬電極的邊 緣處破裂。此失效模式限制了可延伸性。 為克服此侷限性,吾人藉由消除矽氧烷鍵結來減小 MESFET與PDMS之間之交互作用的強度。對於此等實例, 歸因於該等帶自PDMS表面之實體脫離,>3%之預應變就 產生具有相對大寬度及振幅之大的、無週期麵棱。圖之化 呈現此類型系統(如以約7%之預應變製備),其中該等大的 紐棱形成於該等裝置的較薄之區域中。如該等垂直線所指 示,該脫離似乎略微擴展至具有歐姆條之較厚區域。沿帶 之對比度變化係歸因於反射及與通過該曲線GaAs區段之光 相關的,折射。該SEM影像(圖25C)清楚地展示弧形翹棱及 扁平、未受力PDMS之形成。此等翹棱顯示尾部延伸至具 有歐姆觸點之側邊的非對稱輪廓(如由紅色曲線指示)。此 不對稱可歸因於個別電晶體之歐姆條及肖特基觸點之不等 長度(500 μηι對240 μπι)。藉由約6%與約7%之間之所施加 延伸應變,此類翹棱MESFET可延伸至其原始扁平狀態(圖 25D)。然而,由於弱結合,壓縮圖25B中所示之系統導致 帶自PDMS表面之連續脫離而形成更大的翹棱。根據先前 描述之程序將此等裝置嵌入PDMS中消除了此類非受控之 ί·生質。圖25B展示此系統,其中液態pdms前驅物填充該等 159867.doc •58· 201216641 想棱之下之間隙。完全包圍之叩则限定了該等帶且防止 其滑動及脫離。嵌人裝置能可逆地延伸及㈣至高達約 6%之應變而不損壞該等帶。值得注意較,當將嵌入系 統壓縮-5观(圖別之頂部框)時,在具有金屬電極之區域 中形成週期性的小的波狀以及在翹棱區域中形成新的波 紋。此等新的小波狀之形成(與該等大翹棱組合)增強了可 壓縮性K申該系、统迫使該等勉帛區域以一使得此等起棱 可變平之方式來壓縮及延伸該PDMS,進而伸長了該等帶 的伸出長度(圖25E之底部框)。此等結果表明具有大赵棱 (幾何形狀與波狀截然不同)之嵌入裝置代表了一可與波狀 方法組合使用或獨立於該波狀方法使用的用以達成可延伸 性及可壓縮性之有希望的方法。The Si thickness, and the radius of curvature at the crest or trough, is given by c^, where η is an integer and y" is the second derivative of 乂. The sinusoidal function of the continuous shape is approximated, and the 矽 strain peak is given by εΓ*=_^. Figure 12 shows the wavelength as a function of the temperature at which the pre-strain is established. As shown in Fig. 13, the strain peak is independent of the Si thickness due to the wave amplitude and the linear dependence of the wavelength versus thickness /2 λ 〜 〇. Figure 15 illustrates the wavy structure containing nearly equal upward and downward displacements relative to the horizontal plane of the pDMs surface between the bands. The enthalpy strain is equal to the strain applied by the system examined here (Figure 16). One accordion bellows model: When 矽 can be separated from PDMS during compression, the system is dominated by the accordion bellows mechanism rather than the ribbing mechanism. In the case of the bellows, the applied compressive strain (Sapplied) has a wavelength of λο(1 + eapplied), where λ is the wavelength in the unstrained configuration, as described in equation (2). Since the length of the rim of the 矽 belt is approximately the same before and after the compressive strain, we can use the following relationship to determine the wave amplitude Α. Ππ° 1 + A0 sin 2π λΓ applied ) 1 + A sin 2π person 0 (1 + ε applied ) dx This equation has an asymptotic solution for <«ΐ = >/ΪΤ^ under small compressive strain' For equation (3), it also applies to the possible case of the separation system of S^PDMS, and the system follows the Newton mechanism. The 矽 strain peak is given by = * applied ^ applied 2ε, i+eappliedf2 ^ applied . For moderate compression, the % & stated approximation is the same as equation (4). In the application of moderate 159867.doc •49-201216641 within the limits of strain, similar to the wave amplitude, the 矽 strain peak has a similar functional form for the bellows model and the ridge model. Figure 18 shows the strain peaks calculated according to the above formula and according to equation (4). Device characterization. A semiconductor parameter analyzer (Agilent, $1Μc) and a conventional probe station were used for the electrical characteristics of the wavy pn junction diodes and transistors. The light of the Pn diode responds at about! The illuminance measurement of w/cm2 is measured by an optical power meter (Ophir 〇ptronics, Laser Power Meter AN/2). We use mechanical tables to measure these devices during and after extension and compression. As a way to explore the reversibility of this process, we measured three different pns under ambient light before and after about 100 compressions (to about 5% strain), extensions (to about i 5% strain), and after the release cycle. Diode. Figure 19 shows the results. Figures 20 and 21 show images, schematic descriptions, and device measurements from a wavy transistor. Example 2. The ribbed and wavy GaAs strips used in high performance electronic circuits on elastomeric substrates are manufactured to have thicknesses in the submicron range and have well defined, wavy " and/or ridged shapes. Single crystal GaAs tape. The resulting structure on the surface of an elastomeric substrate or embedded in an elastomeric substrate exhibits a reversible extensibility and compressibility of > 丨〇% strain, which is more than ten times greater than its own reversible extension and compressive strain. By integrating ohmic and Schottky contacts on the GaAs strips of such structures, high performance extendable electronics (e.g., metal semiconductor field effect transistors) can be achieved. Such electronic systems may be used alone or in combination with similar designs, dielectrics, and/or metallic materials to form a network frequency operation as well as extensibility, extreme flexibility, or with a complex 159867.doc - 50· 201216641 The circuit of the application of the ability of the surface of the hybrid curve shape to match. In traditional microelectronics, performance capabilities are measured primarily in terms of speed, power efficiency, and integration levels. The advancement in other newer electronic device configurations is driven by the ability to integrate or cover a large area on non-conventional substrates (e.g., low cost plastic, foil, paper). For example, a new form of X-ray medical diagnosis can be achieved by a large-area imager that isomorphically wraps the body to digitally image the desired tissue. A lightweight, wall-sized display that can be deployed on a variety of surfaces and surface shapes. Or sensors provide new technologies for architectural design. Various materials including small organic molecules, polymers, amorphous germanium, polycrystalline germanium, single crystal germanium wires, and microstructured tapes have been explored to accommodate semiconductor channels of thin film electronic devices that support these and other applications. . These materials make it possible to have a mobility that spans a wide range (i.e., from 1 〇 to 5 〇〇 cm 2 /V.s) and a mechanically bendable film shape on a flexible substrate. Applications requiring high-speed operation such as Large Aperture Interferometric Synthetic Aperture Radar (InSAR) and Radio Frequency (RF) monitoring systems require eight semiconductors with very high mobility, such as GaAs, or Inp. The fragility of single crystal composite semiconductors creates a number of manufacturing challenges that must be overcome in order to produce high speed, flexible transistors having such semiconductors. A practical method was established by constructing a metal semiconductor field effect transistor (MESFET) on a plastic substrate using a printed GaAs line array created from a 鬲ασ bulk wafer. These devices exhibit poor mechanical flexibility and close to 2 GHzifT. even in medium scale devices (e.g., micro-gate lengths). This example shows a GaAs-based MESFET (as opposed to a wire device) that is designed with a special geometry that not only provides flexibility but also provides an essential yield point that is significantly more than the GaAs itself 159867.doc •51· 201216641 (about 2% The mechanical extremability of the strain level (about 10%). The resulting type of extensible high-performance electronic system provides extremely high levels of flexibility and the ability to integrate contours with curved surfaces. This example of a GaAs system expands the "wave" described by us in four important ways: (1) it exhibits the extensibility of GaAs (a material that is more mechanically weaker than Si under actual conditions) (ii) Introducing a new "warping" geometry that can be used to achieve extensibility in conjunction with the previously described "wavy" configuration or independently of the previously described "wave" configuration, (iii) A new type of extendable device (ie MESFET) is achieved and (iv) it exhibits an extension that can extend over a larger range than 矽 and has greater symmetry in compression/tension. Figure 22 illustrates the steps for fabricating an extensible GaAs tape on an elastomeric substrate made of poly(dimethyloxane) (pDMS). The strips are produced from a still quality GaAs bulk wafer having a plurality of tele-crystal layers. The wafer is grown by growing a 2 〇〇 11111 thick A1As layer on a (100) semi-insulating GaAs (Si-GaAs) wafer, followed by sequentially depositing a layer of 丨 ( ( ( Prepared by a Si-doped nSGaAs layer with a thickness of 120 nm and a 4xl0" cm-3 carrier concentration. The pattern of the photoresist line defined parallel to the (0 Π*) crystal orientation serves as a chemical etch for the epitaxial layer (including GaAs and AlAs). The mask is anisotropically etched using an aqueous etchant of h3P〇4 and 〇2 to isolate the top layer into a length and orientation defined by the photoresist and having sidewalls at an acute angle relative to the wafer surface. Individual strips. The photoresist is removed after the anisotropic etch and then the wafer is immersed in an ethanol solution of HF (volume ratio of 2:1 between ethanol and 49% aqueous HF) to remove the A1As layer. And release tape... GaAs/S丨-GaAs). In this step, the use of ethanol instead of water reduces the 159867.doc •52–201216641 can occur in these fragile zones due to capillary forces during drying. Rupture. The lower surface tension of ethanol compared to water also minimizes the work of these GaAs belts. The disorder caused by drying in the layout. In the next step, 'contact the wafer with the released GaAs ribbon with the surface of a pre-stretched plate to align the strips in the direction of extension. In this case, where Devalli dominates the interaction between the two. For situations requiring stronger interaction strength, a thin layer of si〇2 is deposited onto the GaAs and 1>£^3 is exposed shortly before the contact Ultraviolet-induced ozone (meaning, the product of oxygen in the air). Ozone produces a -Si-OH group on the surface of pDMs, which reacts with the surface to form a bridge to form a bridge of oxygen. Due to the geometry of the sides of the strips, the deposited Si〇2 is discontinuous at the edge of each strip. For both weak and strong bonding procedures, stripping the PDMS from the parent wafer allows All strips are transferred to the surface of the PDMS. Pre-strain relaxation in the PDMS results in spontaneous formation of large-scale ridges and/or sinusoidal structures along the strips. The geometry of the strips is greatly dependent on the application to the Pre-strain of the seal (by △UL The interaction between PDMS and the band, and the flexural rigidity of the bands. For the band studied here, the small pre-strain (<2%) produces a relatively small condition for both strong and weak interactions. The highly sinusoidal wave of wavelength and amplitude (Fig. 22 right border, middle frame). These geometries in GaAs are similar to those reported for Si. Higher pre-strain can be applied (eg up to about 15%) to establish A similar type of wave in which there is a strong bond between the strips and the substrate 2. The difference between the composition of the non-periodic "warping edges" having a relatively large amplitude and width is formed under weak interaction strength and large pre-strain conditions. The geometry of type I59867.doc -53- 201216641 (Figure 22 right border, top box). In addition, our research shows that two types of structures (warping and wave) can coexist in a single band, with the bending stiffness varying along its length (eg, due to thickness variations associated with device structure). Figure 23 shows a thickness of 270 nm (including i-GaAs and Si-GaAs layers) and 1 〇〇μπι formed by a strong bond between PDMS (about 5 mm thickness) and the strip (discussed in this example) Several micrographs of a wavy GaAs strip with a width of 10 μm width for all strips. Using a 2-nm Ti and 28_nm Si〇2 layer on GaAs, the fabrication follows a strong bonding procedure. A biaxial pre-expansion of about 1.9% (calculated from the thermal response of PDMS) was established in the PDMS by thermal expansion (heating to 9 °C in a cage) shortly before or during the combination. This heating also accelerates the formation of interfacial aerobic bonds. The PDMS was cooled to room temperature (about 27 ° C) after transferring the GaAs tape, thereby releasing the pre-strain. Frames A, B, and C of Figure 23 show images collected from the same sample by optical microscopy, electron scanning microscopy (SEM), and atomic force microscopy (AFM), respectively. These images show the formation of periodic, wavy structures in the GaAs strips. The waves are quantitatively analyzed by estimating the cut lines from the AFM image (Fig. 23D) (Figs. 23E and 23F). The line parallel to the longitudinal direction of the strip clearly shows the periodic, wavy wheel temple consistent with the computational fit of the sine wave (dashed line in Figure 23E). This result is consistent with a non-linear analysis of the initial warp geometry in a uniform, thin, high modulus layer on a semi-infinite low modulus support. The peak-to-peak amplitude and wavelength associated with this function were determined to be 2 56 and 35.0 μιη, respectively. The distance between the horizontal distance between the two peaks (ie, the wavelength) and the actual line length between the peaks (ie, the surface distance measured by AFM, 159867.doc • 54· 201216641 surface distance) The proportional calculation strain (which we call strain) produces a smaller value than the pre-requisite change in the PDMS (ie, 3%) <» This difference can be attributed to the low shear modulus of the PDMS and the ratio of the pdms substrate The island effect associated with the length of the shorter GaAs strip. The surface strain of the GaAs strip at the peaks and troughs (which we call the maximum GaAs strain) is obtained from the strip thickness and the radius of curvature of the peaks or troughs of the waves according to k/j/2 (where κ is the curvature). In this estimation, because the PDMS can be regarded as a lower half-infinite support of the modulus compared to the modulus of GaAs (Young's modulus of GaAs: 85.5 GPa vs. Young's modulus of PDMS: 2 MPa)' The direct effect of strain on GaAs in the PDMS stamp can be ignored. For the data of Figure 23E, the maximum GaAs strain is about 0.62%, which is more than twice the band strain (i.e., 13%). This mechanical advantage provides extensibility in GaAs tapes with physical properties similar to wavy. As shown in Fig. 23F, the peaks and trough regions of the bands are respectively lower and lower than the contour level (the right side of the green curve) of the surface of the original PDMS (i.e., the unbanded region). This result implies that a PD-like profile is taken as a PDMS under the result of the upward and downward forces applied to the PDMS by the GaAs strips in the peaks and troughs, respectively. The exact geometry of the pDMS near the peaks of the waves is difficult to estimate directly. I suspect that in addition to upward deformation, there is also a lateral necking caused by the cypress effect. The wavy band on the PDMS printer can be extended and shrunk by applying strain to the PDMS (so-called applied strain is expressed as positive for extension and negative for compression). The insets of Figures 23 and 23B show an image of a band that is deformed to its original flat geometry when applied with a relatively small extension strain (further extension). Further extension transfers more tension strain to the flat GaAsf, thereby When the excess strain 159867.doc -55 - 201216641 reaches the failure strain of GaAs, the tape is broken. The compressive strain applied to the substrate reduces the wavelength of the wavy bands and increases the amplitude of the wavy bands. When the bending strain exceeds the failure strain, compression failure occurs. This variation with the wavelength of the strain is consistent with the observations in the previous 且 and is different from the prediction of the wavelength invariance derived from the ideal model. The extensibility of the wavy GaAs strip is improved by using a mechanical stage (as opposed to thermal expansion) to increase the pre-strain applied to the PDMS. For example, transferring a GaAs strip with a Si 〇 2 layer to a pre-strain of 7.8% The surface of the PDMS stamp can produce a wavy band without any observable rupture in GaAs (Fig. 24A). In this case, the bending strain at the peak is estimated to be about 1.2%, which is better than GaAs. The strain at failure (i.e., about 2%) is lower. Similar to the low pre-strain condition, the undulating bands operate like an accordion when extending and compressing the system: wavelength and amplitude changes to accommodate the applied strain. Figure 24A shows that the wavelengths increase with tensile strain until the bands become flat and as the compressive strain decreases until the band breaks. These deformations are fully reversible and do not contain PDMS. Any measurable slip of GaAs on the surface, as compared to the slight asymmetry observed in a Si band with weak bonding and much lower pre-strain, the wavelength is in the compression and stretching with the applied strain And linearly changing (see the black line and symbol in Fig. 24B), in practical applications, it may be useful to encapsulate the GaAs strip and the extensible gas of the device. As a simple possibility, We cast and cure the pDMs prepolymer on a sample such as that shown in Figure 24 to embed the ribbons into the PDMS. The embedded system exhibits mechanical properties similar to those of the unembedded system, meaning that the wavelength is increased when the system is extended And 1598 67.doc -56 · 201216641 Reduce the wavelength when compressing the system (red line and symbol in Figure 24B). Due to the shrinkage of the cured second PDMS layer, a moderate amount of additional strain (about 1 / 〇) is produced. The slight decrease in the wavelength of the undulating bands, in turn, slightly extends the range of extensibility. Figure 24B shows this difference. In general, a system resulting from a pre-strain of about 7.8 ° can be extended or compressed to Up to about 10% strain without causing any observable damage in GaAs. The corrugated GaAs strip on the PDMS substrate can be used to make high performance electronic devices such as MESFETs. The electrodes of these electronic devices are via the transfer before PDMS Formed by metallization and processing on the wafer. The metal layers change the flexural rigidity of the strips in a spatially dependent manner. Figure 25A shows a GaAs ribbon integrated with ohmic strips (source and gate) and Schottky contacts (gate) after transfer to a PDMS substrate having a pre-strain of about 1.9%. The ohmic contacts are composed of a metal stack comprising AuGe (70 nm) / Ni (10 nm) / Au (70 nm) 'the metal stack is a mask defined by lithography and a quartz with a flowing A The tube is annealed on the initial wafer at a high temperature (ie, 45 〇 < t continuation j... illusion. These ohmic sections have a length of 500 μηη. Two adjacent ohmic contacts The distance between the two is 5 〇〇μΓΠ (meaning the length of the channel). The Schottky contact with a length of 24 μm (meaning the length of the closed pole) is evaporated by electron beam by a mask designed according to photolithography. Directly depositing a 75-nm Cr layer and a 75-nm au layer to produce. The electrodes have a width equal to the width of the GaAs strips, that is, 1 〇〇 μιη; its relatively large size facilitates detection. The electrode and semiconductor channel can be significantly reduced. Dimensions to achieve enhanced device performance. As shown in Figure 25, these extendable MESFETs exhibit short-range periodic waves only in the area without electrodes. Waves are not present in the thicker region 159867.doc -57· 201216641 Mainly due to the additional thickness associated with the metals Caused by the increased flexural rigidity. The periodic wave can be initiated in a thicker region by using a pre-strain greater than about 3%. However, in such cases, due to critical enthalpy and/or The high strain peaks near the edges of the metal electrodes' tend to rupture at the edges of the metal electrodes. This failure mode limits the extensibility. To overcome this limitation, we eliminate the siloxane coupling. To reduce the strength of the interaction between the MESFET and the PDMS. For these examples, due to the detachment of the elements from the PDMS surface, > 3% of the pre-strain produces a large width and amplitude. No periodic surface ribs. The graphs present this type of system (eg, prepared with a pre-strain of about 7%), wherein the large ridges are formed in the thinner regions of the devices, such as the vertical lines. Indicating that the detachment appears to extend slightly to a thicker region with ohmic strips. The contrast variation along the strip is due to reflection and refraction associated with light passing through the curved GaAs segment. The SEM image (Fig. 25C) clearly shows the arc Shaped ridge and flat The formation of flat, unstressed PDMS. These ridges show an asymmetrical profile with the tail extending to the side of the ohmic contact (as indicated by the red curve). This asymmetry can be attributed to the ohmic strip of the individual transistor and Unequal lengths of Schottky contacts (500 μηι vs. 240 μπι). Such a warped MESFET can be extended to its original flat state by an applied extended strain of between about 6% and about 7% (Fig. 25D) However, due to weak bonding, compressing the system shown in Figure 25B results in a continuous detachment of the tape from the PDMS surface to create a larger ridge. Embedding these devices into the PDMS according to the previously described procedure eliminates such uncontrolled ί·生生. Figure 25B shows the system in which the liquid pdms precursor fills the gap below the 159867.doc • 58· 201216641. The full enveloping rim defines the bands and prevents them from slipping and disengaging. The embedded device can reversibly extend and (iv) up to about 6% strain without damaging the belts. It is worth noting that when the embedded system is compressed - 5 (the top frame of the figure), a periodic small wave shape is formed in the region having the metal electrode and a new wave pattern is formed in the warped region. The formation of such new wavelets (in combination with the large ridges) enhances the compressibility. The system forces the regions to compress and extend in such a way that they are flattened. The PDMS, in turn, elongates the length of extension of the strips (bottom frame of Figure 25E). These results indicate that an embedded device having a large ridge (the geometry is distinct from the wavy) represents a combination of wavy methods or independent of the wavy method for achieving extensibility and compressibility. Promising approach.
魅棱農置之效能可藉由直接探測自源極至汲極之電流來 3平估。圖26A展示在一晶圓上製造,使用一扁平pDMS印章 棟取且轉移印刷至一具有4.7%之預應變之PDMS基板上的 GaAs帶裝置。在此組態中,金屬電極曝露至空氣以用於電 探測。在將預延伸之PDMS鬆弛至3.4%之應變之後,週期 性的小波狀形成於MESFET之薄區域中(圖26A :自頂部第 二個框)。當將該預延伸PDMS印章完全鬆弛時,在純GaAs 之每一區段中的小波狀合併為個別的大翹棱(圖26A :自頂 部第二個框)。藉由施加4 · 7 °/〇的延伸應變,該等麵棱裝置 可延伸至其扁平狀態(圖26A :底部框)。具有〇.〇%(圖 26A :自頂部第三個框)及4.7%(圖26A :底部框)之所施加 應變之相同裝置的IV曲線分別以紅色及黑色繪製於圖26B I59867.doc -59- 201216641 中。該等結果指示PDMS基板上翹棱MESFET之自源極至汲 極之電流可以施加至閘極之電壓來良好地調節,且所施加 延伸應變對裝置效能僅產生微小影響。 概括而言’此實例揭示了一用以在PDMS彈性體基板上 形成"勉棱"及"波狀"GaAs帶及形成嵌人PDMS彈性體基板 中之"勉棱"及”波狀”GaAs帶之方法。此等帶之幾何組態視 製造中所使用之預應變位準、PDMS與帶之間交互作用強 度、及所使用材料的厚度及類型而定。歸因於翹棱及波狀 帶之幾何形狀的以一能適應所施加應變而不將彼等應變轉 移至材料自身的方式來進行調節之能力,GaAs多層堆疊及 完全形成之MESFET裝置之翹棱及波狀帶展示了較高水準 的可壓縮性/可延伸性。在一類似GaAs之本質脆弱之材料 中成功實現高水準的機械可延伸性(且作為結果,諸如極 端可彎曲性的其他具有吸引力之機械特性)提供了可適用 於寬廣範圍的其他材料類型的類似策略。 熱誘發之預應變係歸因於PDMS印章之熱膨脹,其具有 〜=3·1χ10 4 μιη/μηι/°(:的本體線性熱膨脹係數。另一方 面’0&八3之熱膨脹係數僅為5 73><1〇-6叫/卿/。(:。因此, 對於在90°C製備且冷卻至27°C之樣品,PDMS上的預應變 (相對 GaAs 帶)根據ιχι〇-4_5 73Χι〇-6)χ(90-27)=1.9%來測定。 方法:自IQE公司(伯利恆,ΡΑ)購買具有用戶設計之磊 晶層之GaAs晶圓。微影製程使用αζ光阻劑(即ΑΖ 5214及 AZ nLOF 2020分別用於正及負成像)。在以冰水浴冷卻之 159867.doc •60- 201216641 餘刻劑(4 mL时〇4(85重量%)、52灿H2〇2⑼重量⑹, 及48 mL去離子水)中各向異性地㈣具有光阻遮罩圖案之 GaAs晶圓。用乙醇的稀HF溶液(體積比丨:以仏^⑧ Chemical A1As層溶解。將在母體晶圓上具有釋放的帶 之樣品在-通風櫥中乾燥。將經乾燥之樣品置於電子束蒸 鑛器(丁emeSCalFC_1800)之腔室巾,域覆2.Timnm Si〇2之順序的層。在A1As層之移除之前藉由電子束蒸錢而 沈積用於刪FET裝置之金屬。藉由將低模MDMS之混合 物(A:B=1:1〇 ’ Sylgard 184 ’ D〇w c〇rning)倒至以(三癸氟 基·1,1,2,2-四氫辛基)·“三氣矽烷之單層預改質的一片矽晶 圓上’接著在65t:T烘培4小時來製備具有約5 _厚度之 PDMS印製器。為了產生強結合,冑該等印章曝露至UV光 5分鐘。在該轉移過程中,經由熱膨脹(在烘箱中)及/或機 械力來延伸該等印章。然後將具有釋放的帶之晶圓層壓至 經㈣之PDMS印章的表面±,且使其在高溫(視所需預應 變而定)保持接觸5分鐘。將母體晶圓自該等印章剝離且將 所有T轉移至印章。經由冷卻至室溫及/或移除該等機械 力而將施加至印章之預應變釋放,從而導致沿該等帶之波 狀輪廓的形成。在該等機械評估中,使用一特殊設計之台 來延伸以及壓縮具有"波狀"及"翹棱"GaAs帶之PDMS印 章。 實例3 :二維可延伸半導體 本發明提供能在多個方向(包括彼此正交定向之方向)上 延伸、壓縮及/或撓曲的可延伸半導體及可延伸電子裝 159S67.doc -61 - 201216641 置。本發明之此態樣之可延伸半導體及可延伸電子裝置當 在多個方向上延伸及/或壓縮時展示良好的機械及電子性 質及/或裝置效能。 圖27A-C提供本發明之展示二維可延伸性之可延伸矽半 導體在不同放大程度的影像。圖27A-B中展示之可延伸半 導體係藉由透過熱膨脹而預應變一彈性基板來製備。 圖28A-C提供本發明之展示二維可延伸性之可延伸半導 體的一個不同結構構形之影像β如圖所示,圖Μα中的半 導體結構展示一邊緣線波狀構形,圖28Β中的半導體結構 展示一人字形波狀構形,且圖28C中的半導體結構展示一 隨機波狀構形。 圖29A-D提供透過熱膨脹而預應變一彈性基板來製造之 本發明之可延伸半導體的影像。 圖30展示透過熱膨脹而預應變一彈性基板來製備之展示 二維可延伸性之可延伸半導體的光學影像。圖3〇展示對應 於多種延伸及壓縮條件之影像。 圖31Α展示透過熱膨脹而預應變一彈性基板來製造之展 示二維可延伸性之可延伸半導體的一光學影像。圖3ιβ及 31C提供關於圖31Α中展示之可延伸半導體之機械性質的 實驗結果。 文獻 1. S. R. Forrest, Nature 428, 911 (2004). 2·對於近來進步及回顧,見proc 93,& 7及8 (2005). 159867.doc 62· 201216641 3. J.A. Rogers等人,/Voc. iVai. iScz·. USA 98, 4835 (2001). 4. H.O. Jacobs, A.R. Tao, A. Schwartz, D.H. Gracias, G.M. Whitesides, Science 296, 323 (2002). 5. H.E.A. Huitema等人,iVaiwre 414,599 (2001). 6. C.D. Sheraw等人,dp/?/, Ze"· 80,1088 (2002) 7. Y. Chen# A > Nature 423, 136 (2003). 8. H.C. Jin, J.R. Abelson, M.K. Erhardt, R.G. Nuzzo, J. Vac. Sci. Techn. B 22, 2548 (2004). 9. P.H.l. Hsu等人,IEEE Tfans. Electron. Dev. 5Ί,371 (2004). 10. T. Someya^ A » Proc. Nat. Acad. Sci. USA 101, 9966 (2004) . 11. H.C. Lim等人,*Se«5· Jci· 乂 119, 2005, 332 (2005). 12. JL Vandeputte 事乂,US Patent 6,580,1 5 1 (2003). 13. T. Sekitani等人,P/iyi. Ze". 86,2005,073511 (2005) . 14. E. Menard, R.G. Nuzzo, J.A. Rogers, Appl. Phys. Lett. 86, 2005, 093507 (2005). 15. H. Gleskova# A > J. Noncryst. Sol. 338, 732 (2004). 16. S.-H. Hur, O.O. Park, J.A. Rogers, Appl. Phys. Lett. 86, 243502 (2005). 17. X.F. Duan等人,#加《,^ 425,274 (2003)· 18. Z. Suo, E.Y. Ma, H. Gleskova, S. Wagner, Appl. Phys. 159867.doc -63- 201216641The performance of Charisma can be estimated by directly detecting the current from the source to the bungee. Figure 26A shows a GaAs tape device fabricated on a wafer using a flat pDMS stamp and transferred to a pre-strained PDMS substrate with 4.7%. In this configuration, the metal electrode is exposed to air for electrical detection. After relaxing the pre-stretched PDMS to a strain of 3.4%, a periodic wavelet is formed in a thin region of the MESFET (Fig. 26A: from the top second box). When the pre-stretched PDMS stamp is completely relaxed, the wavelets in each section of pure GaAs are merged into individual large ridges (Fig. 26A: second frame from the top). By applying an extension strain of 4 · 7 ° / 〇, the ribs can be extended to their flat state (Fig. 26A: bottom frame). The IV curves of the same device with 〇.〇% (Fig. 26A: third frame from the top) and 4.7% (Fig. 26A: bottom frame) are plotted in red and black, respectively, in Fig. 26B I59867.doc -59 - 201216641. These results indicate that the current from the source to the drain of the warped MESFET on the PDMS substrate can be well regulated by the voltage applied to the gate, and the applied extension strain has only a minor effect on device performance. In summary, 'this example reveals a "勉"" and "wave" GaAs ribbon and the formation of an embedded PDMS elastomer substrate on a PDMS elastomer substrate. The method of "wavy" GaAs tape. The geometric configuration of these bands depends on the pre-strain level used in the manufacturing, the strength of the interaction between the PDMS and the tape, and the thickness and type of material used. The ability to adjust the geometry of the ribbed and wavy strips in a manner that accommodates the applied strain without transferring the strain to the material itself, the GaAs multilayer stack and the fully formed MESFET device And the wavy band exhibits a higher level of compressibility/extensibility. Successfully achieving high levels of mechanical extensibility in a material that is inherently weak in GaAs (and, as a result, other attractive mechanical properties such as extreme bendability) provides a wide range of other material types that can be applied to a wide range of materials. A similar strategy. The heat-induced pre-strain is attributed to the thermal expansion of the PDMS stamp, which has a bulk linear thermal expansion coefficient of ~=3·1χ10 4 μηη/μηι/° (on the other hand, the thermal expansion coefficient of '0&8-3 is only 5 73> ; <1〇-6叫/卿/. (: Therefore, for samples prepared at 90 ° C and cooled to 27 ° C, the pre-strain on the PDMS (relative GaAs band) according to ιχι〇-4_5 73Χι〇- 6) χ(90-27)=1.9%. Method: Purchase GaAs wafer with user-designed epitaxial layer from IQE Company (Bethleon, ΡΑ). The lithography process uses αζ photoresist (ie ΑΖ 5214 and AZ nLOF 2020 for positive and negative imaging respectively. 159867.doc •60- 201216641 Residual agent in cooling with ice water bath (4% (85% by weight) in 4 mL, 52% H2〇2 (9) weight (6), and 48 (4) Anisotropically (iv) GaAs wafer with photoresist mask pattern. Dilute HF solution with ethanol (volume ratio 丨: dissolved in 仏^8 Chemical A1As layer. Will have release on the parent wafer) The sample of the belt was dried in a fume hood. The dried sample was placed in the chamber of the electron beam smelter (Demecal FC 1800) a layer covering the order of 2.Timnm Si〇2. The metal used to delete the FET device is deposited by electron beam evaporation before the removal of the A1As layer. By mixing the low-mode MDMS (A: B= 1:1〇' Sylgard 184 'D〇wc〇rning) pours into a single layer of pre-modified yttrium (tris-fluoro-, 1,1,2,2-tetrahydrooctyl) On the wafer 'then baked at 65t:T for 4 hours to prepare a PDMS printer with a thickness of about 5 _. In order to produce a strong bond, the seals were exposed to UV light for 5 minutes. During the transfer, through thermal expansion (in the oven) and / or mechanical force to extend the seal. Then laminate the wafer with the release tape to the surface of the (4) PDMS stamp ± and make it at high temperature (depending on the required pre-strain) Maintaining contact for 5 minutes. The parent wafer is peeled from the stamps and all T is transferred to the stamp. The pre-strain applied to the stamp is released by cooling to room temperature and/or removing the mechanical forces, resulting in The formation of wavy contours of the belts. In these mechanical evaluations, a specially designed table is used to extend and compress There are "wave-like" and "warping" GaAs tape PDMS stamps. Example 3: Two-dimensional extensible semiconductors The present invention provides for extension, compression, and in multiple directions, including directions orthogonal to each other. / or flexibly extendable semiconductors and extendable electronics 159S67.doc -61 - 201216641. The extendable semiconductor and extendable electronic device of this aspect of the invention exhibit good mechanical and electronic properties and/or device performance when extended and/or compressed in multiple directions. Figures 27A-C provide images of the present invention showing extensible germanium semiconductors of two dimensional extensibility at different levels of magnification. The extensible semiconductor system shown in Figures 27A-B is prepared by pre-straining an elastic substrate by thermal expansion. 28A-C provide an image of a different structural configuration of the extensible semiconductor exhibiting two-dimensional extensibility of the present invention as shown in the figure, wherein the semiconductor structure in Fig. α exhibits an edge line wavy configuration, Fig. 28 The semiconductor structure exhibits a herringbone wavy configuration, and the semiconductor structure of Figure 28C exhibits a random wavy configuration. Figures 29A-D provide an image of an extensible semiconductor of the present invention fabricated by pre-straining an elastic substrate by thermal expansion. Figure 30 shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility prepared by pre-straining an elastic substrate by thermal expansion. Figure 3 shows an image corresponding to a variety of extension and compression conditions. Figure 31A shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility fabricated by pre-straining an elastic substrate by thermal expansion. Figures 3i and 31C provide experimental results regarding the mechanical properties of the extensible semiconductor shown in Figure 31. Literature 1. SR Forrest, Nature 428, 911 (2004). 2. For recent advances and reviews, see proc 93, & 7 and 8 (2005). 159867.doc 62· 201216641 3. JA Rogers et al., /Voc iVai. iScz.. USA 98, 4835 (2001). 4. HO Jacobs, AR Tao, A. Schwartz, DH Gracias, GM Whitesides, Science 296, 323 (2002). 5. HEA Huitema et al., iVaiwre 414, 599 (2001). 6. CD Sheraw et al., dp/?/, Ze" 80, 1088 (2002) 7. Y. Chen# A > Nature 423, 136 (2003). 8. HC Jin, JR Abelson , MK Erhardt, RG Nuzzo, J. Vac. Sci. Techn. B 22, 2548 (2004). 9. PHl Hsu et al., IEEE Tfans. Electron. Dev. 5Ί, 371 (2004). 10. T. Someya^ A » Proc. Nat. Acad. Sci. USA 101, 9966 (2004) . 11. HC Lim et al., *Se«5· Jci· 乂119, 2005, 332 (2005). 12. JL Vandeputte Business, US Patent 6,580,1 5 1 (2003). 13. T. Sekitani et al., P/iyi. Ze". 86, 2005, 073511 (2005) . 14. E. Menard, RG Nuzzo, JA Rogers, Appl. Phys. Lett. 86, 2005, 093507 (2005). 15. H. Gleskova# A > J. Noncryst. Sol. 338, 732 (2004). 16. S.-H. Hur, OO Park, JA Rogers, Appl. Phys. Lett. 86, 243502 (2005). 17. XF Duan et al., #加,, 425, 274 (2003)· 18 Z. Suo, EY Ma, H. Gleskova, S. Wagner, Appl. Phys. 159867.doc -63- 201216641
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Nanostructures into Functional Networks", Yu Huang, Xiangfeng Duan, Qingqiao Wei, and Charles M. Lieber, Science (2001) 291, 630-633 ;及(4)"EIectric-field assisted assembly and alignment of metallic nanowires", Peter A. Smith等人,^pp/· Ze". (2000) 77(9),1399-1401。 貫穿本申請案之所有參考,例如包括已頒予或准予之專 利或其等效物之專利文獻;專利申請案公開案;未公開專 利申請案;及非專利文獻或其他資訊來源材料,以全文引 用的方式併入本文,該引用的程度就如同以引用的方式個 別併入該等文獻直至每一文獻至少部分與本申請案之揭示 内容不一致之範圍(例如,部分不一致的文獻的除了該部 分不一致部分外皆被以引用之方式併入本文)。 本文之任何附錄以引用之方式併入本文作為本說明書及 /或圖式之部分。 在本文中使用術語"包含(comprise)"、··包含了 (comprises)"、"所包含(comprised)"、"正包含(comprising)" 處,應將這些表達理解為規定所說明特徵、整數、步驟, 或組件之存在,但不排除一或多個其他特徵、整數、步 驟、組件,或其群組之存在或添加。在術語"正包含 (comprising)"或"包含(了)(comprise(s))"或"所包含(comprised)" 視情況可由語法上類似之術語,例如"由…組成"或”實質上 159867.doc • 70· 201216641 由…組成"來替代時,亦希望涵蓋本發明之單獨實施例, 從而描述不一定同延的另外的實施例。 參考各種特疋及較佳實施例及技術描述本發明。然 而應瞭解到可進行各種變化及修改而同時保持在本發明 精神及範守内。對於一般熟習此項技術者顯而易見的 是’不同於本文中特定描述者之組合物、枝、裝置、裝 置元件、材料、程序及技術可應用於如本文廣泛揭示之本 發明之實踐而無須訴諸於不適當的實驗。本文所描述之組 σ物、方法、纟置、裝置元件、材料、程序及技術之所有 此項技術中已知之功能等效物皆希望包含於本發明中。無 論何時揭示-範圍’皆希望包含所有子範圍及個別值,就 像其被獨立提出—樣。本發明並非由所揭示之實施例(包 括在圖式中展不或在本說明書中例示者)來限制,該等 施例以實例或說明之方式給出(*具限制性)。本發明之範 4應僅由申言青專利範圍來限制。 【圖式簡單說明】 圖1提供-展*本發明之-可延伸半導體 顯微圖。 冉眾于力 之半 圖2展示一原子力顯微圖,其提供具有曲線内表面 導體結構之展開視圖。 子力顯 圖3展示本發明之可延伸半導體結構之陣 微圖。 圖 圖 4展示本發明 5展示本發明 之可延伸半導體結構之光學顯微圖。 之具有一半導體結構之可延伸半導體結 159867.doc •71 · 201216641 構的原子力顯微圖,該半導體結構與一具有三維起伏圖案 之可撓性基板結合,該三維起伏圖案位於該基板之支撐表 面上。 圖6展示一說明製造本發明之可延伸半導體元件之例示 性方法的流程圖。 圖7展示具有由一可撓性橡膠基板支撐之波形曲線内表 面之縱向對準的可延伸半導體結構之陣列的圖像。 圖8展示本發明之一可延伸半導體結構之截面影像,其 中該可印刷半導體結構776由可撓性基板777來支撐。如圖 8所示,可印刷半導體結構776具有内表面,該等内表面具 有呈一週期波之輪廟形狀。 圖9A展示一說明製造可延伸薄膜電晶體之陣列的例示性 方法之流程圖。圖9B展示處於鬆弛及延伸組態中之可延伸 薄膜電晶體之陣列的光學顯微圖。 圖10:在彈性體基板上建構可延伸單晶石夕裝置之製程之 示意性說明》第一步(頂部框)涉及單晶矽薄(厚度在2〇與 320 nm之間)元件或完整的積體裝置(意即電晶體、二極體 專4 )之製造,其藉由習知微影處理過程繼之以對絕緣物 上矽(SOI)晶圓的頂部矽及Si〇2層之蝕刻來完成。在此等程 序之後,帶結構由下層的晶圓支撐但不與其結合(頂部 框)。使一預應變彈性體基板(聚(二曱基矽氧烷)PDMS,藉 由dL延伸)與該等帶之引線接觸以導致此等材料之間的結 合(中部框)。剝離該PDMS ’使該等帶結合於其表面上, 且接著釋放該預應變使得該PDMS鬆弛回到其不受約束之 159867.doc •12· 201216641 狀態(無應力長度L)。該鬆弛導致在該等帶中自發性形成 受到良好控制、極有週期性、可延伸之"波形,,結構(底部 框)。 圖11 : (A)在PDMS上波狀單晶矽帶(寬度=20 μηι ;間距 =20 μηι ;厚度=l〇〇 nm)之一大規模對準陣列的光學影像。 (B)自(A)中展示之陣列中取得的四個波狀矽帶之有角度掃 描電子顯微圖。該等波結構之波長及振幅在該陣列中極為 一致。(C)作為沿PDMS上一波狀Si帶之位置的函數的表面 高度(頂部框)及Si拉曼峰之波數(底部框),分別藉由原子 力及拉曼顯微法量測。該等線表示資料之正弦擬合。(d) 作為矽之厚度的函數的波狀矽帶之振幅(頂部框)及波長(底 部框),皆針對PDMS中給定位準之預應變。該等線對應於 計算,無任何擬合參數。 圖12 :作為溫度之函數的翹棱波長。波長隨溫度增加之 略微降低歸因於PDMS的熱收縮,其導致在愈高溫度下製 備之樣品的波長愈短。 圖13 :作為矽厚度之函數的矽應變峰值,針對約〇 9%之 預應變值。紅色符號對應於使用波長及振幅計算得的彎曲 應變,該等波長及振幅是基於描述該翹棱過程之方程式而 操取的。黑色符號對應於類似的計算,但使用了藉由AFM 量測之波長及振幅。 圖I4 : (a)pdms基板上波狀單晶矽帶(寬度=20 μιη ;厚 度=100 nm)之原子力顯微圖(AFM ;左邊框)及起伏輪廓(右 邊框;該等線係實驗資料之正弦擬合)^頂部、中部,及 159867.doc •73· 201216641 底口p 口p刀刀別對應於當PDMS沿帶長度受到_7〇/〇(壓縮)、 0%(未受力)及4.7%(延伸)的應變時之組態。(B)作為施加至 PDMS基板之應變(頂部框)的函數的波狀石夕帶之平均振幅 (黑色)及波長變化(紅色)m皮長量測,將不同的基板 用於拉緊(圓周)及壓縮(方塊)。矽應變峰值為所施加應變 (底部框)之函數。此等圖中之線表示計算,無任何自由擬 合參數。 圖15 : PDMS上波狀矽帶之AFM俯視影像,及在相對於 該等帶之長維的一角度處估算出之切割線。 圖16 :作為所施加應變之函數的矽帶應變。紅色符號對 應於使用波長及振幅藉由輪廓長度之數值積分而計算之應 變’該等波長及振幅是使用描述該翹棱過程的方程式操 取。黑色符號對應於沿波狀Si帶在AFM表面輪廓中自表面 與水平距離之比例量測得的應變。 圖17 : (A)處於所施加的_ιι%(頂部)、0%(中部)及 11%(底部)應變下之PDMS基板上的可延伸單晶矽pn二極體 的光學影像。鋁區域對應於薄(20 nm)Al電極;粉色及綠區 域對應於矽之η(硼)及p(磷)摻雜區域。(B)作為可延伸石夕pn 二極體之偏壓的函數的電流密度,在各種所施加應變位準 下量測。標有"亮"及"暗"之曲線分別對應於曝露於環境光 或遮蔽於環境光之裝置。貫線展不模型化結果。(C)在所 施加的-9.9%、0%及9.9%應變下量測之可延伸肖特基障壁 梦MOSFET之電流_電壓特性(閘極電壓以1 V步長自〇 v變 化至-5 V)。 159867.doc •74· 201216641 圖18:作為所施加應變之函數的矽應變峰值。藍色線基 於一手風琴風箱(accordion bellows)模型,且黑色線係小 應變之一近似,其亦與翹棱機構一致。 圖19 .波狀pn二極體之電學量測值,在三個不同裝置 (# 1、# 2及# 3 )之壓縮(約5 °/。所施加應變)、延伸(約1 $ %所施 加應變)及釋放之約100個週期之前(週期之前)及之後(週期 之後)在三個不同裝置中估算得出。該資料指示裝置性質 無系統變化。所觀測到的變化之位準與反覆探測不改變所 施加應變的單一裝置所得的變化位準相當,且可能歸因於 探針觸點之輕微不同。 圖20 :處於未受力狀態(中部)及壓縮(頂部)及拉緊(底部) 狀態時之波狀矽肖特基障壁MOSFET的光學影像(頂部 框)。該裝置之示意性說明(底部框)。 圖21 :處於不同所施加應變下時"波狀"矽肖特基障壁 MOSFET中量測得之轉移曲線。 圖22 :用於在PDMS基板上產生"翹棱,,及,,波狀"GaAs帶 之步驟之示意性說明。左邊底部框展示用以促進與該 PDMS之強結合的在該等帶之表面上的薄Si〇2之沈積。此 結合導致在右邊尹部框中展示之波狀幾何形狀之形成。弱 的凡得瓦爾力結合(及中等至高位準預應變)導致如右上部 框中所展示之翹棱幾何形狀。 圖23 ··以經由熱膨脹產生之約19%之預應變形成之在 PDMS基板上的波狀GaAs帶的影像。相同樣品之光學(A)、 SEM(B)、三維AFM(C)及俯視圖AFM(D)影像。該SEM影像 159867.doc -75- 201216641 係藉由在樣品表面與偵測方向之間將該樣品台傾斜45°角 來獲取。(該等帶上的點可為該等犧牲AlAs層之殘餘物。) 分別沿(D)中所示藍色及綠色線繪製之表面高度分佈(E、 F) ° 圖24 : (A)在不同所施加應變下採集的、以7.8%預應變 形成、與該PDMS強結合之波狀GaAs帶之光學顯微圖。左 邊及右邊的藍色條加亮顯示了該結構中之某些峰值;此等 條之間距離之變化指示波長對所施加應變之相依性。(B) 作為(A)中所示波狀GaAs帶之所施加應變之函數的波長變 化,以黑色繪製;在嵌入PDMS之後之樣品(A)的系統之類 似資料,以紅色繪製。 圖25 :與歐姆(源極及汲極)及肖特基(閘極)觸點整合以 形成完整MESFET之GaAs帶之影像。(A)使用1.9%之預應 變及與該PDMS之強結合而形成之波狀帶之光學顯微圖, 其展示僅在無電極的區域(灰色)中週期波之形成。以約7% 之預應變及與該PDMS之弱結合形成之翹棱帶的(B)光學影 像及(C)SEM影像。(D),在(B)中所示之兩個翹棱裝置在其 被延伸至平坦之後的光學、影像。(E),在(B)中所示之具有 不同外部施加應變(意即自頂部至底部,5.83%之壓縮應 變、無施加應變,及5.83%之延伸應變)的個別帶裝置在其 被嵌入PDMS之後的一組光學影像。 圖26 : (A),在PDMS基板中建構之一 PDMS印章上具有 不同應變之GaAs帶MESFET的光學影像。在該等裝置被轉 移至該PDMS印章之表面上之前施加至該PDMS印章的預應 159867.doc -76- 201216641 變為4.7%。(B)在該系統被施加4 7%之延伸應變之前及之 後(A)中所示的裝置之I-V曲線之比較。 圖27A-C提供展示二維可延伸性之本發明之可延伸半導 體在不同放大程度的影像。 圖28A-C提供展示二維可延伸性之本發明之可延伸半導 體的三個不同結構構形之影像。 圖29A-D提供藉由通過熱膨脹預應變該彈性基板而製備 之本發明之可延伸半導體的影像。 圖30展不在變化之延伸及壓縮狀態下展示二維可延伸性 之可延伸半導體的光學影像。 圖31A展示藉由熱膨脹來預應變彈性基板而製造之展示 二維可延伸性之可延伸半導體的光學影像。 圖31B及31C提供關於圖31A中展示之可延伸半導體之機 械性質的實驗結果。 【主要元件符號說明】 700 半導體元件 705 可挽性基板 710 支撐表面 715 彎曲半導體結構 720 曲線内表面 730 變形轴 750 凹入區域 760 起伏特徵 776 可印刷半導體結構 777 可撓性基板 159867.doc ·7Ί·Nanostructures into Functional Networks", Yu Huang, Xiangfeng Duan, Qingqiao Wei, and Charles M. Lieber, Science (2001) 291, 630-633; and (4) "EIectric-field assisted assembly and alignment of metallic nanowires", Peter A. Smith et al., ^pp/· Ze". (2000) 77(9), 1399-1401. All references throughout this application, such as patent documents including patents granted or granted, or equivalents thereof; patent application publications; unpublished patent applications; and non-patent literature or other information source materials, full text The manner in which they are incorporated is incorporated by reference to the extent of the extent of the extent of the disclosure of the disclosure of the disclosure of each of the of Inconsistent parts are incorporated herein by reference. Any of the appendices herein are hereby incorporated by reference in their entirety as the extent of the present disclosure. In this article, the terms "comprises",···includes (comprises)","comprised","comprising" The existence or addition of one or more other features, integers, steps, components, or groups thereof is not intended to be exhaustive. In the term "comprising" or "comprising (comprise(s))" or "comprised" may be grammatically similar terms, such as "by... It is also contemplated that a separate embodiment of the present invention is intended to be encompassed by a "or" or substantially 159 867. doc • 70 · 2012 16 641 constituting "" The present invention will be described with respect to the preferred embodiments and the invention. It should be understood that various changes and modifications may be made without departing from the spirit and scope of the invention. Compositions, branches, devices, device components, materials, procedures, and techniques are applicable to the practice of the invention as broadly disclosed herein without resorting to undue experimentation. Group sigma, methods, and devices described herein All functional equivalents known to those skilled in the art, including device components, materials, procedures, and techniques, are intended to be included in the present invention. There are sub-ranges and individual values, as they are presented independently. The invention is not limited by the disclosed embodiments (including those shown in the drawings or exemplified in the specification). Or, the manner of explanation is given (*restrictive). The invention of the invention shall be limited only by the scope of the claim. [Simplified description of the drawings] Fig. 1 provides a micrograph of the extensible semiconductor of the present invention. Figure 2 shows an atomic force micrograph showing an expanded view of a conductor structure with a curved inner surface. The force display 3 shows a micrograph of the extensible semiconductor structure of the present invention. Invention 5 shows an optical micrograph of an extensible semiconductor structure of the present invention. An atomic force micrograph of an extensible semiconductor junction having a semiconductor structure 159867.doc • 71 · 201216641, the semiconductor structure and a three-dimensional relief pattern A flexible substrate is bonded, the three-dimensional relief pattern being located on a support surface of the substrate. Figure 6 shows a flow diagram illustrating an exemplary method of fabricating the extensible semiconductor device of the present invention. Figure 7 shows an image of an array of extensible semiconductor structures having longitudinal alignment of the inner surface of a curved curve supported by a flexible rubber substrate. Figure 8 shows a cross-sectional image of an extensible semiconductor structure of the present invention, wherein The printable semiconductor structure 776 is supported by a flexible substrate 777. As shown in Figure 8, the printable semiconductor structure 776 has an inner surface having a cycle shape in the form of a periodic wave. Figure 9A shows an illustration of the fabrication. A flow chart of an exemplary method of extending an array of thin film transistors. Figure 9B shows an optical micrograph of an array of extensible thin film transistors in a relaxed and extended configuration. Figure 10: Schematic illustration of the process for constructing an extensible single crystal device on an elastomer substrate. The first step (top frame) involves a single crystal thin (between 2 and 320 nm thickness) components or complete. The fabrication of an integrated device (ie, a transistor, a diode 4) is etched by a conventional lithography process followed by a top 矽 and Si 〇 2 layer on a silicon-on-insulator (SOI) wafer. To be done. After these processes, the tape structure is supported by the underlying wafer but not bonded to it (top frame). A pre-strained elastomeric substrate (poly(dimethoxydecane) PDMS, extended by dL) is brought into contact with the leads of the strips to cause bonding between the materials (middle frame). Peeling the PDMS' causes the bands to bond to their surface, and then releasing the pre-strain causes the PDMS to relax back to its unconstrained state (no stress length L). This relaxation results in spontaneous formation of well-controlled, highly periodic, extendable "waveforms," structures (bottom boxes) in the bands. Figure 11: (A) Optical image of a massively aligned array of one of the wavy single crystal ribbons (width = 20 μηι; pitch = 20 μηι; thickness = l〇〇 nm) on PDMS. (B) An angled scanning electron micrograph of four wavy bands obtained from the array shown in (A). The wavelengths and amplitudes of the equal wave structures are extremely uniform in the array. (C) The surface height (top frame) as a function of the position of a wavy Si band on the PDMS and the wave number of the Raman peak (bottom frame) were measured by atomic force and Raman microscopy, respectively. These lines represent the sinusoidal fit of the data. (d) The amplitude (top frame) and wavelength (bottom frame) of the wavy band as a function of the thickness of the crucible are all pre-strained for positioning in the PDMS. These lines correspond to calculations without any fitting parameters. Figure 12: Warping wavelength as a function of temperature. The slight decrease in wavelength with temperature is attributed to the thermal shrinkage of the PDMS, which results in a shorter wavelength of the sample prepared at the higher temperature. Figure 13: Peak strain of 矽 as a function of 矽 thickness for a pre-strain value of approximately 9%. The red symbol corresponds to the bending strain calculated using the wavelength and amplitude, which are based on the equation describing the warping process. The black symbol corresponds to a similar calculation, but uses the wavelength and amplitude measured by AFM. Figure I4: (a) Atomic force micrograph (AFM; left border) and undulating contour (right border; wavy experimental data of a wavy single crystal 矽 tape (width = 20 μηη; thickness = 100 nm) on a pdms substrate Sinusoidal fitting) ^Top, middle, and 159867.doc •73· 201216641 The bottom port p-port knife corresponds to when the PDMS is subjected to _7〇/〇 (compression) along the length of the belt, 0% (unstressed) And 4.7% (extended) strain configuration. (B) Measure the average amplitude (black) and wavelength change (red) m of the wavy band as a function of the strain applied to the PDMS substrate (top frame), and use different substrates for tensioning (circumference) ) and compression (squares). The 矽 strain peak is a function of the applied strain (bottom box). The lines in these figures represent calculations without any freely fitting parameters. Figure 15: AFM top view image of the corrugated ankle band on the PDMS, and the cut line estimated at an angle relative to the long dimension of the bands. Figure 16: Shear strain as a function of applied strain. The red symbol corresponds to the strain calculated by integrating the wavelength and amplitude by numerical integration of the length of the profile. The wavelengths and amplitudes are manipulated using equations describing the warping process. The black symbol corresponds to the strain measured along the wavy Si band in the AFM surface profile in proportion to the surface to horizontal distance. Figure 17: (A) Optical image of a stretchable single crystal 矽 pn diode on a PDMS substrate with applied _ι% (top), 0% (middle) and 11% (bottom) strain. The aluminum region corresponds to a thin (20 nm) Al electrode; the pink and green regions correspond to the y (boron) and p (phosphorus) doped regions of germanium. (B) The current density as a function of the bias of the extendable shi pn diode, measured at various applied strain levels. The curves labeled "Bright" and "dark" correspond to devices that are exposed to ambient light or are shielded from ambient light. The line exhibition does not model the results. (C) Current-voltage characteristics of an extendable Schottky barrier MOSFET measured at -9.9%, 0%, and 9.9% strain applied (gate voltage varies from 〇v to -5 in 1 V steps) V). 159867.doc •74· 201216641 Figure 18: Peak strain of enthalpy as a function of applied strain. The blue line is based on an accordion bellows model, and the black line is one of the small strains, which is also consistent with the rib mechanism. Figure 19. Electrical measurements of wavy pn diodes, compression (approx. 5 ° / applied strain), extension (about 1 $ %) in three different devices (# 1 , # 2 and # 3 ) The application of strain) and the release of about 100 cycles before (before the cycle) and after (after the cycle) are estimated in three different devices. This data indicates that there is no system change in the nature of the device. The level of change observed is comparable to the level of change obtained by a single device that does not change the applied strain, and may be due to a slight difference in probe contacts. Figure 20: Optical image of the undulating Schottky barrier MOSFET in the unstressed (middle) and compressed (top) and tensioned (bottom) states (top frame). A schematic illustration of the device (bottom frame). Figure 21: Transfer curve measured in a "wave-like" 矽 Schottky barrier MOSFET under different applied strains. Figure 22: Schematic illustration of the steps for creating "warping, and, "wave" GaAs strips on a PDMS substrate. The left bottom frame shows the deposition of thin Si(R) 2 on the surface of the strips to promote strong bonding with the PDMS. This combination results in the formation of a wavy geometric shape displayed in the right Yin box. The weak Van der Waals force combination (and medium to high level pre-strain) results in a warp geometry as shown in the upper right frame. Fig. 23 is an image of a corrugated GaAs strip formed on a PDMS substrate with a pre-strain of about 19% generated by thermal expansion. Optical (A), SEM (B), three-dimensional AFM (C) and topographic AFM (D) images of the same sample. The SEM image 159867.doc -75- 201216641 was obtained by tilting the sample stage at an angle of 45° between the sample surface and the detection direction. (The points on the strips may be the residues of the sacrificial AlAs layers.) Surface height distribution (E, F) plotted along the blue and green lines shown in (D) respectively Figure 24: (A) An optical micrograph of a wavy GaAs ribbon formed at 7.8% pre-strain and strongly bonded to the PDMS, acquired under different applied strains. The blue bars on the left and right highlight some of the peaks in the structure; the change in distance between the bars indicates the dependence of the wavelength on the applied strain. (B) The wavelength change as a function of the applied strain of the wavy GaAs strip shown in (A), plotted in black; a similar data for the sample (A) after embedding PDMS, plotted in red. Figure 25: Image of a GaAs strip integrated with ohmic (source and drain) and Schottky (gate) contacts to form a complete MESFET. (A) An optical micrograph of a wavy band formed using a 1.9% pre-deformation and a strong bond with the PDMS, which shows the formation of periodic waves only in the electrodeless region (gray). (B) Optical image and (C) SEM image of the warp band formed by pre-strain of about 7% and weak combination with the PDMS. (D), the optical and image of the two ridger devices shown in (B) after they are extended to flat. (E), the individual tape devices shown in (B) have different externally applied strains (ie, from top to bottom, 5.83% compressive strain, no applied strain, and 5.83% extended strain) are embedded in A set of optical images after PDMS. Figure 26: (A) Optical image of a GaAs-band MESFET with different strains on a PDMS stamp constructed in a PDMS substrate. The pre-application 159867.doc -76 - 201216641 applied to the PDMS seal before the devices were transferred to the surface of the PDMS stamp became 4.7%. (B) Comparison of the I-V curves of the apparatus shown before and after the system was subjected to an elongation strain of 4 7% (A). Figures 27A-C provide images of the extendable semiconductor of the present invention exhibiting two-dimensional extensibility at different levels of magnification. Figures 28A-C provide images of three different structural configurations of the extendable semiconductor of the present invention showing two-dimensional extensibility. 29A-D provide images of the extensible semiconductor of the present invention prepared by pre-straining the elastic substrate by thermal expansion. Figure 30 shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility without extending and compressing. Figure 31A shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility fabricated by pre-straining an elastic substrate by thermal expansion. Figures 31B and 31C provide experimental results regarding the mechanical properties of the extensible semiconductor shown in Figure 31A. [Major component symbol description] 700 Semiconductor component 705 Printable substrate 710 Support surface 715 Curved semiconductor structure 720 Curved inner surface 730 Deformation axis 750 Recessed area 760 Undulating feature 776 Printable semiconductor structure 777 Flexible substrate 159867.doc ·7Ί ·
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| TW105135576A TW201717261A (en) | 2006-04-07 | 2006-06-14 | Single crystal germanium in an extendable form of high performance electronic components for use on rubber substrates |
| TW095121212A TWI336491B (en) | 2006-04-07 | 2006-06-14 | A stretchable form of single crystal silicon for high performance electronics on rubber substrates |
| TW099127004A TWI489523B (en) | 2006-04-07 | 2006-06-14 | Single crystal germanium in an extendable form of high performance electronic components for use on rubber substrates |
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| TW104103340A TWI570776B (en) | 2006-04-07 | 2006-06-14 | Single crystal germanium in an extendable form of high performance electronic components for use on rubber substrates |
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| TW102142517A TWI533459B (en) | 2005-06-02 | 2006-06-01 | Printable semiconductor structure and related methods of manufacture and assembly |
| TW105135576A TW201717261A (en) | 2006-04-07 | 2006-06-14 | Single crystal germanium in an extendable form of high performance electronic components for use on rubber substrates |
| TW095121212A TWI336491B (en) | 2006-04-07 | 2006-06-14 | A stretchable form of single crystal silicon for high performance electronics on rubber substrates |
| TW099127004A TWI489523B (en) | 2006-04-07 | 2006-06-14 | Single crystal germanium in an extendable form of high performance electronic components for use on rubber substrates |
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| TWI570776B (en) | 2017-02-11 |
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