201220964 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係有關一種承載板’尤指一種具剝離層的承 載板。 【先前技術】 [0002] 在半導體晶片的封裝歷史中’原本封裝基板係由一 核心板及對稱形成於其兩側之線路增層結構所組成，但 是使用核心板將導致導線長度及整體結構厚度增加，而 難以滿足電子產品功能不斷提昇且體積卻不斷縮小之需 求，後來遂發展出無核心層（coreless)結構之封裝基板 ，以符合縮短導線長度及降低整體結構厚度、及因應高 頻化、微小化的趨勢要求。 _3] 請參閱第1A至1G圖，係美國專利第7, 594, 317 B2 號之無核心層之封裝基板及其製法之剖視圖，其中，第 1C’圖係第1C圖的俯視圖，茲陳述其製法如下。 [0004] 首先，如第1A圖所示，提供一支持層10。 [00〇5] 次如第IB、1C與1C’圖所示’於一該支持層之兩 表面上依序設置剝離層11與金屬層12，該剝離層丨丨之面 積小於該金屬層12，並將整體加熱壓合成為一體之承載 板1 ’令該金屬層12覆蓋該剝離層11且環繞該剝離層llw 周。 [0006] 再如第1D圖所示，於各該金屬層12上分別依序形成 複數第一電性接觸墊13與增層結構14，該增層結構14係 包括至少一介電層141、形成於該介電層141上之線路層 0992065225-0 099137414 表單編號A0101 第3頁/共19頁 201220964 [0007] [0008] [0009] [0010] [0011] 142、及複數形成於該介電層141中並電性連接該線路層 142與第一電性接觸墊13之導電盲孔143，且該增層結構 14最外層之線路層142復具有複數第二電性接觸墊144， 並於該增層結構14最外層上形成絕緣保護層15，且該絕 緣保護層15中形成有複數開孔150，以令各該第二電性接 觸墊144對應露出於各該開孔150，而成為上下成對的封 裝基板la。 繼如第1E圖所示，沿該上下成對的封裝基板la的邊 緣進行裁切，且裁切邊16通過該剝離層11。 然後，如第1F圖所示，移除該支持層10與剝離層11 以將該上下成對的封裝基板la分離成獨立的兩個封裝基 板 1 a，。 最後，如第1G圖所示，移除該金屬層12，而完成最 終封裝基板lb。 惟，製作例如上述封裝基板等習知無核心層之封裝 基板所需之承載板係以金屬層將剝離層貼合至支持層表 面，且該金屬層必須環繞該剝離層四周，這樣的製程不 利於一般自動化機台的運作，所以仍有部分步驟必須採 取手動方式，進而減低產率；此外，該承載板必須將部 分邊框切除，造成整體排版利用率降低。 因此，如何避免習知技術中用於無核心層之封裝基 板之承載板難以自動化生產且無法完全利用版面面積等 問題，實已成為目前亟欲解決的課題。 【發明内容】 099137414 表單編號A0101 第4頁/共19頁 0992065225-0 201220964 [0012] 鏗於上述習知技術之種種缺失，本發明之主要目的 係提供一種生產成本較低的承載板。 [0013] 為達上述及其他目的，本發明揭露一種承載板，係 包括··支持層；第一金屬層，係設於該支持層的相對兩 表面上’該第一金屬層厚度係選自5微米至40微米範圍； 剝離層’係設於各該第一金屬層上；以及第二金屬層， 係設於各該剝離層上，該第二金屬層厚度係選自1微米至 10微米範圍。 〇 [0014] 前述之承載板中，復可包括保護廣，係設於各該第 二金屬層上；復可包括餘刻停止層，係設於各該第二金 屬層上；且復可包括保護層，係設於各該蝕刻停止層上 [0015] 依上述之承載板，該第一金屬層之材質可為銅，該 第二金屬層之材質可為銅，該保護層之材質可為樹酯或 離型膜’且該蝕刻停止層之材質可為鎳或不鏽鋼。 [0016] 本發明提供另，種承載板，係包括：支持層；第一 金屬層’係設於該支持層的相對兩表面上，該第一金屬 層厚度係選自5微米至40微未範圍；剝離層，係設於各兮· 第一金屬層上；以及蝕刻停止層，係設於各該剝離層上 [0017] 前述之承載板中，復可包括保護層，係設於各該钱 刻停止層上。 [0018] 依上述之承載板，該第一金屬層之材質可為銅，該 蝕刻停止層之材質可為鎳或不鏽鋼，且該保護層之材質 t 表單煸號A0101 第5頁/共19頁 201220964 可為樹酯或離型膜。 [⑻ 19] [0020] [0021] [0022] [0023] 由上可知，本發明之承載板係不需將基板版面周緣 切除，因此可充分利用整個基板的版面，提升排版利用 率，且省去切除周緣的步驟也能簡化整體製程步驟；此 外，由於本發明承載板之剝離層係全版面地形成，所以 有利於以一般自動化設備進行生產；又該保護層可保護 該第二金屬層或㈣停止層在壓合形絲程免於被異物 /占附且該钱刻停止層可於姓刻开多成線路層時避免過度 的侧餘現象’進而提升整體生產良率，並降低整體生產 成本。 【實施方式】 以下藉由特定的具體實施例說明本發明之實施方式 ，熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點及功效。 第一實施例 清參閱第2Α至2D圖，係本發明之承載板及其應用例 的第一實施例的剖視圖。 如第2Α圖所示，本發明之承載板2係包括：支持層2〇 ’該支持層20之材質可以是例如雙順丁烯二酸醯亞胺/三 氮牌（Bismaleimide triazine，簡稱Βτ)等的有機聚 合材料’且該支持層20亦可為兩相對表面全面結合有介 電材（例如為預浸材（prepreg))之銅箔基板（CCL) (圖未示）；第一金屬層21，係設於該支持層2〇的相對兩 表面上’該第~金屬層21厚度砰選自5微米（am)至40 099137414 表單編號A0101 第6頁/共19頁 0992065225-0 201220964 微米（/ζπι)範圍，且該第一金屬層以之材質可為銅；剝 離層22，係設於各該第一金屬層21上，該剝離層22可為 離型膜（release film)，或者可運用其他技術來提供該 剝離層 22，如：Mitsui、Nippon—Denk、Furukawa、 或〇1 in等公司所提供之鋼箔結合剝離層等材料 ;以及第 二金屬層23，係設於各該剝離層22上，該第二金屬層以 厚度可選自1微来至1〇微米範圍，且該第二金屬層23之材 質可為銅。 [0024] Ο ，…〜”朽双您用1夕1J的初始艾 驟於各該第一金屬層23上分別依序形成複數第一電性 接觸墊24與增層結構25，該增層結構_包括至少一介 電層251、形成於該介電層251上之綠路層252、及複數 形成於該介電層251中並電性連接該線路層252與第一電 =接觸㈣之導電盲孔253，且該增層結構㈣外狀線 層252復具有複數第二電性接觸塾 構25最外層上形成絕緣保護層26 並^日層、。 ο [0025] 彤忐古且該絕緣保護層26中 形成有複數開孔260，以令各該第_ ® φ ^ . ^ Ba 罘一電性接觸墊254對應 露出於各該開孔260，而成為上下， 下成對的封裝基板2a。 如第2C圖所示，移除該支持 剝齙恳9 9丨、7收 、第一金屬層2 1與 到離層22以將該上下成對的封裝 個封裝基板2a，》 離成獨立的兩 [0026] 如第2D圖所示，移除該第二 哉切成複數封裝基板單元之整版 3 ’而完成尚未 封裝基板2b。 〇®P丨ete panel) 099137414 表單編號A0101 第7頁/共19頁 0992065225-0 201220964 [0027] [0028] [0029] [0030] [0031] [0032] [0033] [0034] [0035] [0036] 要注意的是，本應用例係先形成置晶側，再形成植 球侧；當然，本發明之應用例亦可先形成植球側，再形 成置晶侧，惟其製法大致相同，故不再為文贅述。 第二實施例 請參閱第3圖，係本發明之承載板的第二實施例的剖 視圖。 如第3圖所示，本實施例大致與第一實施例相同，主 要的不同之處在於本實施例復包括設於各該第二金屬層 23上的保護層28，且該保護層28之材質可為樹酯或離型 膜。 第三實施例 請參閱第4圖，係本發明之承載板的第三實施例的剖 視圖。 如第4圖所示，本實施例大致與第一實施例相同，主 要的不同之處在於本實施例復包括設於各該第二金屬層 23上的蝕刻停止層27，且該蝕刻停止層27之材質可為鎳 或不鐘鋼。 第四實施例 請參閱第5圖，係本發明之承載板的第四實施例的剖 視圖。 如第5圖所示，本實施例大致與第三實施例相同，主 要的不同之處在於本實施例復包括設於各該蝕刻停止層 27上的保護層28，且該保護層28之材質可為樹酯或離型 099137414 表單編號A0101 第8頁/共19頁 0992065225-0 201220964 [0037] [0038] [0039] Ο [0040] [0041] [0042] Ο [0043] 099137414 膜。 第五實施例 請參閱第6圖，係本發明之承載板的第五實施例的剖 視圖。 如第δ圖所示，本發明之承載板2係包括：支持層2〇 ’第—金屬層21，係設於該支持層20的相對兩表面上， 該第一金屬層厚度係選自5微米至40微米範圍，且該第一 金屬層21之材質可為銅；剝離層22，係設於各該第一金 屬層21上；以及蝕刻停止層27，係設於各該剝離層以上 ’該餘刻停止層27之材質係為錄或不鏽鋼。 第六實施例 請參閱第7圖，係本發明之承載板的第六實施例的剖 視圖。 如第7圖所示，本實施例大致與第五實施例相同，主 要的不同之處在於本實施例復包括設於各該蝕刻停止層 27上的保護層28，且該保護層28之材質可為樹自旨或離型 膜。 綜上所述，不同於習知技術，本發明之承栽板係不 需將基板版面周緣切除，因此可充分利用整個基板的& 面，提升排版利用率’且省去切除周緣的步驟也能簡化 整體製程步驟；此外’由於本發明承載板之韌離層係全 版面地形成’所以有利於以一般自動化設備進行生產. 又該保護層可保護該第二金屬層或蝕刻停止層在壓人形 表單編號Α0101 第9頁/共19頁 0992065225-0 201220964 成過程免於被異物沾附，且該蝕刻停止層可於蝕刻形成 線路層時避免過度的側蝕現象，進而提升整體生產良率 ，並降低整體生產成本。 [0044] 上述實施例係用以例示性說明本發明之原理及其功 效，而非用於限制本發明。任何熟習此項技藝之人士均 可在不違背本發明之精神及範疇下，對上述實施例進行 修改。因此本發明之權利保護範圍，應如後述之申請專 利範圍所列。 【圖式簡單說明】 [0045] 第1A至1G圖係習知美國專利第7, 594,317 B2號之 無核心層之封裝基板及其製法之剖視圖，其中，第1C’ 圖係第1C圖的俯視圖； [0046] 第2 A至2 D圖係本發明之承載板及其應用例的第一實 施例的剖視圖； [0047] 第3圖係本發明之承載板的第二實施例的剖視圖； [0048] 第4圖係本發明之承載板的第三實施例的剖視圖； [0049] 第5圖係本發明之承載板的第四實施例的剖視圖； [0050] 第6圖係本發明之承載板的第五實施例的剖視圖；以 及 [0051] 第7圖係本發明之承載板的第六實施例的剖視圖。 【主要元件符號說明】 [0052] 1,2 承載板 [0053] la, 2a 上下成對的封裝基板 099137414 表單編號A0101 第10頁/共19頁 0992065225-0 201220964 [0054] la’，2a’ 封裝基板 [0055] lb 最終封裝基板 [0056] 2b 整版面封裝基板 [0057] 10, 20 支持層 [0058] 11，22 剝離層 [0059] 12 金屬層 [0060] 13, 24 第一電性接觸墊 Ο Γ Ί [0061] 14, 25 增層結構 [0062] 141,251 介電層 [0063] 142,252 線路層 [0064] 143,253 導電盲孔 [0065] 144,254 第二電性接觸墊 [0066] 15, 26 絕緣保護層 ❹ [0067] 150,260 開孔 [0068] 16 裁切邊 [0069] 21 第一金屬層 [0070] 23 第二金屬層 [0071] 28 保護層 [0072] 27 姓刻停止層 099137414 表單編號A0101 第11頁/共19頁 0992065225-0201220964 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a carrier plate, particularly a carrier plate having a release layer. [Prior Art] [0002] In the packaging history of a semiconductor wafer, the original package substrate is composed of a core plate and a line build-up structure symmetrically formed on both sides thereof, but the use of the core plate will result in wire length and overall structure thickness. Increasingly, it is difficult to meet the ever-increasing demand for electronic products and the shrinking volume. Later, a coreless structure of package substrates was developed to meet the requirements of shortening the length of the wires, reducing the thickness of the overall structure, and responding to high frequency. The trend of miniaturization requires. _3] Please refer to FIGS. 1A to 1G, which are cross-sectional views of a coreless package substrate and a method for manufacturing the same, and FIG. 1C' is a plan view of FIG. 1C, The system of law is as follows. [0004] First, as shown in FIG. 1A, a support layer 10 is provided. [00〇5] Next, as shown in FIGS. IB, 1C, and 1C', the peeling layer 11 and the metal layer 12 are sequentially disposed on both surfaces of the supporting layer, and the area of the peeling layer is smaller than the metal layer 12 And the integrated heat-pressing and integrated carrier plate 1' is such that the metal layer 12 covers the peeling layer 11 and surrounds the peeling layer 11w. [0006] Further, as shown in FIG. 1D, a plurality of first electrical contact pads 13 and a build-up structure 14 are sequentially formed on each of the metal layers 12, and the build-up structure 14 includes at least one dielectric layer 141. a circuit layer formed on the dielectric layer 141 0992065225-0 099137414 Form No. A0101 Page 3 of 19 201220964 [0007] [0009] [0011] 142, and a plurality of forms formed in the dielectric The circuit layer 142 is electrically connected to the conductive layer 142 of the first electrical contact pad 13 and the circuit layer 142 of the outermost layer of the layered structure 14 has a plurality of second electrical contact pads 144. An insulating protective layer 15 is formed on the outermost layer of the build-up structure 14 , and a plurality of openings 150 are formed in the insulating protective layer 15 so that the second electrical contact pads 144 are correspondingly exposed to the openings 150 . The package substrate la is paired up and down. Next, as shown in Fig. 1E, the edges of the upper and lower paired package substrates 1a are cut, and the cut edges 16 pass through the peeling layer 11. Then, as shown in Fig. 1F, the support layer 10 and the peeling layer 11 are removed to separate the upper and lower paired package substrates 1a into two independent package substrates 1a. Finally, as shown in Fig. 1G, the metal layer 12 is removed to complete the final package substrate lb. However, the carrier board required to fabricate a package substrate having a conventional coreless layer such as the above-mentioned package substrate is to adhere the release layer to the surface of the support layer with a metal layer, and the metal layer must surround the peeling layer. Such a process is disadvantageous. In the operation of the general automation machine, there are still some steps that must be taken manually, thereby reducing the yield; in addition, the carrier board must cut off part of the frame, resulting in a reduction in the overall layout efficiency. Therefore, how to avoid the problem that the carrier board for the package substrate without the core layer is difficult to be automated and cannot fully utilize the layout area has become a problem that is currently being solved. SUMMARY OF THE INVENTION 099137414 Form No. A0101 Page 4 of 19 0992065225-0 201220964 [0012] In view of the above-described deficiencies of the prior art, the main object of the present invention is to provide a carrier board having a lower production cost. [0013] In order to achieve the above and other objects, the present invention discloses a carrier board comprising: a support layer; a first metal layer disposed on opposite surfaces of the support layer, the first metal layer thickness being selected from the group consisting of a range of 5 micrometers to 40 micrometers; a peeling layer' is disposed on each of the first metal layers; and a second metal layer is disposed on each of the peeling layers, the second metal layer being selected from the group consisting of 1 micrometer to 10 micrometers range. [0014] The above-mentioned carrier board may include a wide protection layer and is disposed on each of the second metal layers; the complex may include a residual stop layer disposed on each of the second metal layers; The protective layer is disposed on each of the etch stop layers. [0015] According to the above-mentioned carrier plate, the material of the first metal layer may be copper, and the material of the second metal layer may be copper, and the material of the protective layer may be The resin or release film' and the material of the etch stop layer may be nickel or stainless steel. [0016] The present invention provides a carrier board comprising: a support layer; the first metal layer is disposed on opposite surfaces of the support layer, and the thickness of the first metal layer is selected from 5 micrometers to 40 microseconds. a peeling layer is provided on each of the first metal layers; and an etch stop layer is provided on each of the peeling layers. [0017] The above-mentioned carrier sheet may include a protective layer and is provided in each of the layers. The money is on the stop layer. [0018] According to the above-mentioned carrier board, the material of the first metal layer may be copper, and the material of the etch stop layer may be nickel or stainless steel, and the material of the protective layer is t nickname A0101 Page 5 of 19 201220964 can be a resin or release film. [0020] [0023] [0023] It can be seen from the above that the carrier board of the present invention does not need to cut off the periphery of the substrate layout, so that the layout of the entire substrate can be fully utilized, and the layout utilization rate is improved, and the province is saved. The step of removing the peripheral edge can also simplify the overall process step; in addition, since the release layer of the carrier sheet of the present invention is formed entirely in the entire layout, it is advantageous to be produced by general automation equipment; and the protective layer can protect the second metal layer or (4) The stop layer avoids excessive side-by-side phenomenon when the press-fit wire process is protected from foreign matter/occupation and the stop layer can avoid excessive side-by-side phenomenon when the surname is opened into a circuit layer, thereby improving overall production yield and reducing overall production. cost. [Embodiment] The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily understand other advantages and functions of the present invention from the disclosure of the present disclosure. [First Embodiment] Referring to Figures 2 to 2D, there is shown a cross-sectional view of a first embodiment of a carrier sheet and an application example thereof. As shown in FIG. 2, the carrier board 2 of the present invention comprises: a support layer 2'. The material of the support layer 20 may be, for example, Bismaleimide triazine (abbreviated as Βτ). And the organic polymer material 'and the support layer 20 may also be a copper foil substrate (CCL) (not shown) in which two opposite surfaces are fully integrated with a dielectric material (for example, a prepreg); the first metal layer 21, is disposed on the opposite surfaces of the support layer 2'. The thickness of the first to metal layer 21 is selected from 5 micrometers (am) to 40 099137414. Form No. A0101 Page 6 / 19 pages 0992065225-0 201220964 Micron ( And the first metal layer may be made of copper; the peeling layer 22 is disposed on each of the first metal layers 21, and the peeling layer 22 may be a release film, or may be Other techniques are used to provide the release layer 22, such as a steel foil bonded release layer provided by companies such as Mitsui, Nippon-Denk, Furukawa, or 〇1 in; and a second metal layer 23, which is provided in each of the strips. On the layer 22, the second metal layer may have a thickness selected from the range of 1 micron to 1 micron. And the second metal layer 23 may be of copper Material. [0024] Ο , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _ comprising at least one dielectric layer 251, a green channel layer 252 formed on the dielectric layer 251, and a plurality of conductive layers formed in the dielectric layer 251 and electrically connected to the circuit layer 252 and the first electrical contact (four) The blind hole 253, and the layered structure (4) outer layer 252 has a plurality of second electrical contact structures 25 formed on the outermost layer of the insulating protective layer 26 and the layer, ο [0025] 且古 and the insulation A plurality of openings 260 are formed in the protective layer 26, so that the first _ φ φ ^ ^ ^ 罘 电 an electrical contact pad 254 is correspondingly exposed to each of the openings 260, thereby forming the upper and lower pairs of package substrates 2a. As shown in FIG. 2C, the support stripping, the first metal layer 2 1 and the isolation layer 22 are paired to form the package substrate 2a, which is independent of each other. [0026] As shown in FIG. 2D, the second slab is cut into a full-size 3' of the plurality of package substrate units to complete the unpackaged substrate 2b. 〇®P丨ete panel) 099137414 Form No. A0101 Page 7 / Total 19 Page 0992065225-0 201220964 [0027] [0030] [0033] [0036] [0036] [0036] It should be noted that, in this application example, the crystallizing side is formed first, and then the ball-forming side is formed; of course, the application example of the present invention can also form the ball-forming side first, and then form the crystal-forming side, but the preparation method is substantially the same, so it is no longer Second Embodiment Referring to Figure 3, a cross-sectional view of a second embodiment of a carrier plate of the present invention. As shown in Figure 3, the present embodiment is substantially the same as the first embodiment, with the main differences. In this embodiment, the protective layer 28 is disposed on each of the second metal layers 23, and the material of the protective layer 28 may be a resin or a release film. For the third embodiment, refer to FIG. 4, which is the present invention. A cross-sectional view of a third embodiment of the carrier plate. As shown in FIG. 4, the embodiment is substantially the same as the first embodiment, and the main difference is that the embodiment includes the second metal layer 23. The etch stop layer 27, and the material of the etch stop layer 27 may be nickel or stainless steel. For example, please refer to Fig. 5, which is a cross-sectional view of a fourth embodiment of the carrier plate of the present invention. As shown in Fig. 5, the embodiment is substantially the same as the third embodiment, and the main difference is that the embodiment is complex. The protective layer 28 is disposed on each of the etch stop layers 27, and the material of the protective layer 28 can be a resin or a release type 099137414. Form No. A0101 Page 8 / 19 pages 0992065225-0 201220964 [0038] Ο [0040] [0042] 004 [0043] 099137414 film. Fifth Embodiment Referring to Figure 6, there is shown a cross-sectional view of a fifth embodiment of a carrier sheet of the present invention. As shown in the δth diagram, the carrier board 2 of the present invention comprises: a support layer 2''--the metal layer 21, which is disposed on opposite surfaces of the support layer 20, and the thickness of the first metal layer is selected from 5 In the range of micrometers to 40 micrometers, the material of the first metal layer 21 may be copper; the peeling layer 22 is disposed on each of the first metal layers 21; and the etching stop layer 27 is provided on each of the peeling layers. The material of the residual stop layer 27 is recorded or stainless steel. Sixth Embodiment Referring to Figure 7, there is shown a cross-sectional view of a sixth embodiment of a carrier sheet of the present invention. As shown in FIG. 7 , the present embodiment is substantially the same as the fifth embodiment. The main difference is that the embodiment includes a protective layer 28 disposed on each of the etch stop layers 27 , and the material of the protective layer 28 . It can be a tree or a release film. In summary, unlike the prior art, the bearing board of the present invention does not need to cut off the periphery of the substrate layout, so that the & surface of the entire substrate can be fully utilized to improve the layout utilization efficiency, and the step of removing the peripheral edge is also omitted. It can simplify the overall process steps; in addition, 'because the tough layer of the carrier plate of the present invention is formed in a full layout', it is advantageous to be produced by general automation equipment. The protective layer can protect the second metal layer or the etch stop layer under pressure. Humanoid Form No. 1010101 Page 9 of 19 0992065225-0 201220964 The process is free from foreign matter, and the etch stop layer can avoid excessive side etching during etching to form a wiring layer, thereby improving overall production yield. And reduce overall production costs. The above embodiments are intended to illustrate the principles of the invention and its advantages, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the application patents which will be described later. BRIEF DESCRIPTION OF THE DRAWINGS [0045] FIGS. 1A to 1G are cross-sectional views of a package substrate having a core layer of a conventional U.S. Patent No. 7,594,317 B2, and a method of manufacturing the same, wherein the first C' figure is a plan view of FIG. 2A to 2D are cross-sectional views showing a first embodiment of a carrier sheet of the present invention and an application example thereof; [0047] FIG. 3 is a cross-sectional view showing a second embodiment of the carrier sheet of the present invention; Figure 4 is a cross-sectional view showing a third embodiment of the carrier plate of the present invention; [0049] Figure 5 is a cross-sectional view showing a fourth embodiment of the carrier plate of the present invention; [0050] Figure 6 is a bearing of the present invention A cross-sectional view of a fifth embodiment of the panel; and [0051] Figure 7 is a cross-sectional view of a sixth embodiment of the carrier sheet of the present invention. [Main component symbol description] [0052] 1,2 carrier board [0053] la, 2a upper and lower paired package substrate 099137414 Form No. A0101 Page 10/Total 19 Page 0992065225-0 201220964 [0054] la', 2a' package Substrate [0055] lb final package substrate [0056] 2b full-page package substrate [0057] 10, 20 support layer [0058] 11, 22 release layer [0059] 12 metal layer [0060] 13, 24 first electrical contact pad Ο Γ 14, [0061] 14, 25 build-up structure [0062] 141, 251 dielectric layer [0063] 142, 252 circuit layer [0064] 143, 253 conductive blind hole [0065] 144, 254 second electrical contact pad [0066] 15, 26 insulation protection Layer ❹ [0067] 150, 260 Opening [0068] 16 Cutting Edge [0069] 21 First Metal Layer [0070] 23 Second Metal Layer [0071] 28 Protective Layer [0072] 27 Last Name Stop Layer 099137414 Form No. A0101 11 pages / total 19 pages 0992065225-0