TW201317734A - Dual-mode power factor correction circuit - Google Patents

Abstract

A dual-mode power factor correction (PFC) circuit for correcting the power factor of an AC-to-DC converter which has an inductor and a power switch is disclosed. The dual-mode PFC circuit comprises a detection circuit for detecting the current of the inductor; a mode switching circuit for switching the dual-mode PFC circuit between a first operating mode and a second operating mode; a ramp signal generator for generating a ramp signal when operating under the first operating mode and for reducing the slope of the ramp signal when operating under the second operating mode; an error detection circuit for generating an error signal according to the output voltage of the AC-to-DC converter; a comparator for comparing the ramp signal and the error signal; and a trigger circuit for controlling the switching operations of the power switch according to the detection result of the detection circuit and the comparison result of the comparator.

Description

Dual mode power factor correction circuit

The invention relates to a power factor correction circuit, and more particularly to a dual mode power factor correction circuit for an AC to DC converter.

Due to the shortage of energy, people are paying more and more attention to the power efficiency of electronic devices. Traditional AC-to-DC converters are mostly achieved by diode rectification. Although this architecture is simple and low-cost, due to the severe nonlinear distortion of the input current, the low-frequency harmonics are greatly increased, resulting in power factor (PF). )low. The power factor is the ratio between the effective power and the apparent power, and is a measure of the efficiency of power utilization. In addition to the low power factor, it will cause unnecessary waste of energy. A large number of harmonics will also cause instability of the power system and troubles of the generator, which will seriously affect the quality of the power supply.

In general, the addition of a power factor correction (PFC) circuit to the AC to DC converter improves the power factor. However, the conventional power factor correction circuit often has a high total harmonic distortion (THD) when the input voltage is close to zero, which hinders the improvement of the power factor.

In view of this, how to implement the power factor correction circuit with a more compact structure to reduce the total harmonic distortion of the power conversion device and improve the power factor is a problem to be solved.

The present specification provides an embodiment of a dual mode power factor correction circuit for correcting a power factor of an AC to DC converter, wherein the AC to DC converter includes an inductor and a power switch, the dual mode power factor correction circuit The method includes: a detecting circuit for detecting current of the inductor; and a mode switching circuit coupled to the detecting circuit for using the power factor correcting circuit in a first operating mode and a second operating mode Alternatingly switching; a triangular wave generating circuit coupled to the mode switching circuit for generating a triangular wave when operating in the first operating mode, and reducing a slope of the triangular wave when operating in the second operating mode; The detector is coupled to an output of the AC to DC converter for generating an error signal according to an output voltage of the AC to DC converter; a comparator coupled to the triangular wave generating circuit and The error detector is configured to compare the triangular wave with the error signal; and a trigger circuit coupled to the detection circuit and the comparison , According to the detecting result of comparison result of the detection circuit and the comparator, the power switch controls the switching operation.

By alternately switching the dual mode power factor correction circuit between the first mode of operation and the second mode, the waveform of the input current can follow the waveform change of the input voltage to effectively reduce total harmonic distortion and improve AC to DC conversion. Power factor of the device.

Embodiments of the present invention will be described below in conjunction with the associated drawings. In the figures, the same reference numerals are used to refer to the same or similar elements or process steps.

Certain terms are used throughout the description and following claims to refer to particular elements. Those of ordinary skill in the art should understand that the same elements may be referred to by different nouns. The scope of this specification and the subsequent patent application do not use the difference of the names as the means for distinguishing the elements, but the difference in function of the elements as the basis for the distinction. The word "contains" mentioned in the entire specification and subsequent claims is an open term and should be interpreted as "including but not limited to...". In addition, the term "coupled" is used herein to include any direct and indirect means of attachment. Therefore, if a first component is coupled to a second component, the first component can be directly connected to the second component (including a signal connection through electrical connection or wireless transmission, optical transmission, etc.), or Electrically or signally connected to the second component indirectly through other components or connections.

The description of "and/or" as used herein includes any combination of one or more of the listed items. In addition, the terms of any singular are intended to include the meaning of the plural, unless otherwise specified in the specification.

Please refer to FIG. 1 , which is a simplified functional block diagram of an AC to DC converter 100 according to an embodiment of the invention. The AC to DC converter 100 is configured to convert the AC voltage Vac provided by the AC power source 102 into a DC output voltage Vout for supply to the load 104. In the present embodiment, the AC to DC converter 100 includes a bridge rectifier 111, an input capacitor 112, an inductor 113, a diode 114, an output capacitor 115, a power switch 116, an auxiliary coil 117, a resistor 118, and A dual mode power factor correction circuit (PFC circuit) 120.

The bridge rectifier 111 is for rectifying the AC voltage Vac supplied from the AC power source 102 into an input voltage Vin of an m-shaped wave. The input capacitor 112 is coupled to the output of the bridge rectifier 111. The inductor 113 and the diode 114 are coupled between the output of the bridge rectifier 111 and the load 104. The output capacitor 115 is coupled to the output end of the diode 114. One end of the power switch 116 is coupled between the inductor current IL and the diode 114, and is switched according to the control of the dual mode power factor correction circuit 120. In practice, power switch 116 can be implemented with a power transistor.

As shown in FIG. 1, the dual mode power factor correction circuit 120 includes a detection circuit 121, a mode switching circuit 122, a triangular wave generation circuit 123, an error detector 124, a comparator 125, and a trigger circuit 126. The detecting circuit 121 is configured to detect the current IL of the inductor 113. The mode switching circuit 122 is coupled to the detecting circuit 121 for switching the dual mode power factor correction circuit 120 between a critical conduction mode (CRM) and a discontinuous conduction mode (DCM). The triangular wave generating circuit 123 is coupled to the mode switching circuit 122 for generating a triangular wave Vs when the dual mode power factor correction circuit 120 operates in the critical conduction mode, and when the dual mode power factor correction circuit 120 operates in the discontinuous conduction mode, Reduce the slope of the triangular wave Vs. The error detector 124 is configured to generate an error signal Vc according to the output voltage Vout of the AC to DC converter 100. The comparator 125 compares the triangular wave Vs with the error signal Vc. The trigger circuit 126 is coupled to the detecting circuit 121 and the comparator 125 for generating a switch control signal PWM according to the detection result of the detecting circuit 121 and the comparison result of the comparator 125 to control the power switch of the AC to DC converter 100. 116 switching action.

2 is a simplified schematic diagram of an embodiment of the relationship between the switching control signal PWM and the inductor current IL generated by the dual mode power factor correction circuit 120. For ease of understanding, the switch control signal PWM is illustrated in the embodiment of FIG. 2 as an active high signal. When the power switch 116 is turned "on", the diode 114 of the AC to DC converter 100 is in a reverse biased off state, and the input current Iin flows into the power switch 116 via the inductor 113. At this time, the input voltage Vin charges the inductor 113, causing the inductor current IL to gradually rise linearly until the power switch 116 is turned off. At this time, the energy required for the load 104 is supplied by the output capacitor 115.

When the power switch 116 is turned off, the polarity of the voltage on the inductor 113 is inverted, and the input voltage Vin is applied to charge the output capacitor 115 via the diode 114. At this time, the output capacitor 115 is in a charged state, and the inductor current IL is gradually decreased until the power switch 116 is turned on again. During this phase, the output voltage Vout will remain fixed and its magnitude is the input voltage Vin plus the voltage of the inductor 113. Therefore, the AC to DC converter 100 is a boost type circuit architecture.

The dual mode power factor correction circuit 120 controls the magnitude of the inductor current IL by switching the high frequency switching of the control power switch 116, and filters the high frequency component of the inductor current IL through the input capacitor 112 to make the input current Iin The size is the average of the inductor current IL. Therefore, the dual mode power factor correction circuit 120 can control the waveform of the input current Iin to approximate a sinusoidal waveform by controlling the magnitude of the inductor current IL, and make the phase of the waveform of the input current Iin the same as the waveform of the input voltage Vin. It can reduce current harmonics and increase power factor.

As shown in FIG. 2, in operation, the dual mode power factor correction circuit 120 alternates between a critical conduction mode and a discontinuous conduction mode. The dual mode power factor correction circuit 120 operates in a critical conduction mode when the input voltage Vin is near the peak. In this mode, the trigger circuit 126 is fixed each time the power switch 116 is turned on, but the frequency of the switching power switch 116 is variable. In other words, when the dual mode power factor correction circuit 120 operates in the critical conduction mode, the switching operation of the power switch 116 of the AC to DC converter 100 is in the frequency conversion mode.

When the input voltage Vin is near zero, the dual mode power factor correction circuit 120 operates in a discontinuous conduction mode. In this mode, the frequency at which the trigger circuit 126 switches the power switch 116 is fixed, but the time each time the power switch 116 is turned on is variable. In other words, when the dual mode power factor correction circuit 120 operates in the discontinuous conduction mode, the switching operation of the power switch 116 of the AC to DC converter 100 is in a fixed frequency mode.

FIG. 3 is a simplified functional block diagram of the dual mode power factor correction circuit 120 of the first embodiment of the present invention. In this embodiment, the detection circuit 121 detects the change of the inductor current IL through the auxiliary coil 117 and the resistor 118. The mode switching circuit 122 of the dual mode power factor correction circuit 120 includes switches 310, 320 and a control circuit 330. The control circuit 330 detects the switching frequency of the power switch 116 to determine the operation mode of the dual mode power factor correction circuit 120, and controls the switch according to the current value detected by the detection circuit 121 (or the voltage value VL of the input node). Switching actions of 310 and 320. In practice, the control circuit 330 can detect the switching frequency of the power switch 116 by detecting the frequency of the switch control signal PWM output by the trigger circuit 126. As shown in FIG. 3, the triangular wave generating circuit 123 includes a low pass filter 340, a transconductance amplifier 350, a capacitor 360, and a switch 370. The low pass filter 340 includes a resistor 342 and a capacitor 344. The triangular wave generating circuit 123 generates a triangular wave Vs and adjusts the slope of the triangular wave Vs in accordance with the control of the mode switching circuit 122. The error detector 124 may compare the feedback voltage having a proportional relationship with the output voltage Vout with the reference voltage Vref to generate the error signal Vc. In the present embodiment, the trigger circuit 126 is implemented using an RS flip-flop. The comparator 125 compares the triangular wave Vs with the error signal Vc to set the level of the R input of the flip-flop circuit 126.

In an embodiment, when the switching frequency of the power switch 116 is lower than the predetermined threshold frequency Fth, the control circuit 330 determines that the input voltage Vin is located near the peak at this time, and thus sets the dual mode power factor correction circuit 120 to operate. In critical conduction mode. When the switching frequency of the power switch 116 is greater than or equal to the critical frequency Fth, the control circuit 330 determines that the input voltage Vin is located near the zero point at this time, and thus sets the dual mode power factor correction circuit 120 to operate in the discontinuous conduction mode. The operation of the dual mode power factor correction circuit 120 in different modes of operation will be further described below in conjunction with FIGS. 4 and 5.

4 is a waveform diagram of the dual mode power factor correction circuit 120 operating in a critical conduction mode. In the critical conduction mode, the control circuit 330 keeps the switch 310 on and maintains the switch 320 in an off state (ie, non-conducting), causing the low pass filter 340 of the triangular wave generating circuit 123 to output a fixed voltage Vset for transduction. Amplifier 350. Each time the detecting circuit 121 detects a zero current (for example, when the voltage VL of the input node is lower than a predetermined value Vzcd), the detecting circuit 121 sends a high level signal to the S input terminal of the flip-flop circuit 126, so that The trigger circuit 126 sets the switch control signal PWM to a high level to turn on the power switch 116. At the same time, the trigger circuit 126 sets the signal QB of the inverting output terminal to a low level so that the switch 370 of the triangular wave generating circuit 123 assumes a non-conducting state.

Each time the power switch 116 is turned on, the inductor current IL gradually rises from zero. At the same time, the level of the triangular wave Vs generated by the triangular wave generating circuit 123 is also gradually increased with a predetermined slope. When the comparator 125 detects that the level of the triangular wave Vs is greater than or equal to the level of the error signal Vc, the R input terminal of the trigger circuit 126 is set to a high level, and the switch control signal is PWM-transformed to a low level. So that the power switch 116 assumes a non-conducting state. At the same time, the signal QB of the inverting output terminal of the flip-flop circuit 126 is turned into a high level to turn on the switch 370 of the triangular wave generating circuit 123 to lower the level of the triangular wave Vs. When the detecting circuit 121 detects zero current, the trigger circuit 126 switches the switch control signal PWM to a high level to turn on the power switch 116 again.

It can be seen from the foregoing description that the magnitude of each on-time Ton of the power switch 116 in the critical conduction mode depends on the slope of the triangular wave Vs and can be expressed by the following equation:

Ton = (Cramp*Vc)/(Vset*Gm) Equation (1)

Here, Cramp is a capacitance value of the capacitance 360 of the triangular wave generation circuit 123, and Gm is a transconductance of the transconductance amplifier 350. Since the sizes of Cramp, Vc, Vset, and Gm are substantially fixed, it is known that the on-time Ton of the power switch 116 in the critical conduction mode is fixed. Therefore, the output voltage Vout can be stabilized by changing the frequency conversion operation of the off time Toff of the power switch 116.

In addition, assuming that the inductance value of the inductor 113 is L, as can be seen from FIG. 4, in the critical conduction mode, the average value of the input current Iin in each switching cycle of the power switch 116 can be expressed by the following equation:

Iin = (Vin/L)*Ton*(1/2) Equation (2)

Since Ton and L are both fixed values, it can be seen from equation (2) that the waveform of the input current Iin will completely follow the waveform change of the input voltage Vin in the critical conduction mode, and there is no phase difference between the two. Therefore, when the dual mode power factor correction circuit 120 operates in the critical conduction mode, the total harmonic distortion can be effectively reduced and the power factor of the AC to DC converter 100 can be improved. In addition, since the power switch 116 is switched when the inductor current IL is zero, the diode 114 can have the advantage of zero current switching.

FIG. 5 is a waveform diagram of the dual mode power factor correction circuit 120 operating in a discontinuous conduction mode. In the discontinuous conduction mode, each time the detection circuit 121 detects a zero current (for example, when the voltage VL of the input node is lower than a predetermined value Vzcd), the detection circuit 121 sends a high level signal to the trigger circuit 126. The S input allows the trigger circuit 126 to set the switch control signal PWM to a high level to turn on the power switch 116, such as the Ton period in FIG. At the same time, the trigger circuit 126 sets the signal QB of the inverting output terminal to a low level to turn off the switch 370 of the triangular wave generating circuit 123.

Each time the power switch 116 is turned on, the inductor current IL gradually rises from zero. At the same time, the level of the triangular wave Vs generated by the triangular wave generating circuit 123 also gradually rises. When the comparator 125 detects that the level of the triangular wave Vs catches up to the level of the error signal Vc, the R input terminal of the trigger circuit 126 is set to a high level, so that the switch control signal PWM is turned to a low level. With the cutoff power switch 116, as in the Toff period in FIG. At the same time, the signal QB of the inverting output terminal of the flip-flop circuit 126 is turned into a high level to turn on the switch 370 of the triangular wave generating circuit 123 to lower the level of the triangular wave Vs. At this point, the inductor 113 will begin to discharge. When there is no energy on the inductor 113, the equivalent output capacitance of the power switch 116 that originally spans the output voltage Vout will begin to resonate with the inductor 113, as in the Td period of FIG. When the voltage VL of the input node of the detecting circuit 121 is lower than a predetermined value Vdcm, and the equivalent output capacitance of the power switch 116 resonates with the inductor 113 for a predetermined period of time (for example, Td), the detecting circuit 121 sends a high level. The bit signal to the S input of the flip-flop circuit 126 causes the flip-flop circuit 126 to set the switch control signal PWM to a high level to turn the power switch 116 on again.

In the discontinuous conduction mode, the average value of the input current Iin in each switching cycle of the power switch 116 can be expressed by:

Iin = (Vin/L)*Ton*[(Ton+ Toff)/Tp]*(1/2) Equation (3)

Where Tp is the length of time of each switching cycle of the power switch 116 in the discontinuous conduction mode. The dual mode power factor correction circuit 120 switches the frequency of the power switch 116 in the discontinuous conduction mode to be fixed, that is, the number of times the power switch 116 is turned on in a unit time is fixed, and thus Tp is a constant value. It can be seen from equation (3) that if the portion of Ton*[(Ton+Toff)/Tp] is brought closer to a fixed value, the magnitude of the input current Iin will be proportional to the magnitude of the input voltage Vin. In this way, the waveform of the input current Iin can follow the waveform change of the input voltage Vin in the discontinuous conduction mode to eliminate or minimize the phase difference between the two.

In the discontinuous conduction mode, the magnitude of the on-time Ton of the power switch 116 also depends on the slope of the triangular wave Vs. The magnitude of each on-time Ton of the power switch 116 in the discontinuous conduction mode can be expressed by:

Ton = (Cramp*Vc)/(Vset*Gm*K) Equation (4)

As with the critical conduction mode, the magnitudes of Cramp, Vc, Vset, and Gm are substantially fixed. Therefore, if the parameter K can be proportional to (Ton+Toff)/Tp, then Ton will be proportional to Tp/(Ton+Toff). In this way, the portion of Ton*[(Ton+Toff)/Tp] in the equation (3) can be brought closer to a constant value, and the target that changes the waveform of the input current Iin following the waveform of the input voltage Vin can be realized.

In the discontinuous conduction mode, the control circuit 330 determines the parameter K by controlling the individual on-times of the switches 310 and 320 to achieve the purpose of making the parameter K proportional to (Ton+Toff)/Tp. During each switching cycle of the power switch 116, the control circuit 330 can turn the switch 310 on and turn off the switch 320 prior to a first time period, and then turn the switch 320 on and turn off the switch 310 in a second time period. For example, in an embodiment, the length of the aforementioned first period of time may be equal to the sum of the on-time Ton(t-1) and the off-time Toff(t-1) of the power switch 116 in the previous switching period. The length of the foregoing second period is equal to the fixed value Tp minus the length after the first period, that is, the time Td (t-1) at which the equivalent output capacitance of the power switch 116 resonates with the inductor 113 in the previous switching period. ).

In this embodiment, the parameter K will be [Ton(t-1) + Toff(t-1)]/Tp, which can be considered to be proportional to (Ton+Toff)/Tp. Therefore, Ton is also proportional to Tp/(Ton+Toff), so that the part of Ton*[(Ton+Toff)/Tp] in equation (3) approaches a fixed value, and the waveform following input of input current Iin is realized. The target of the waveform change of the voltage Vin. Further, since the parameter K will be less than 1, the voltage Vset' output from the low-pass filter 340 of the triangular wave generating circuit 123 to the transconductance amplifier 350 will be smaller than the voltage Vset in the critical conduction mode. Therefore, the slope of the triangular wave Vs in the discontinuous conduction mode may be smaller than the slope in the critical conduction mode.

The decrease in the slope of the triangular wave Vs increases the time required for the level of the triangular wave Vs to catch up with the level of the error signal Vc, thereby increasing the on-time Ton of the power switch 116. Therefore, each turn-on time of the power switch 116 in the discontinuous conduction mode may be greater than each conduction time in the critical conduction mode.

In another embodiment, the length of the foregoing first period of time may be equal to the sum of the on-time and the off-time in the corresponding sequential switching operation of the power switch 116 during the previous input voltage Vin sine wave period, and the foregoing second period The length is the fixed value Tp minus the length after the first period, that is, the equivalent output capacitance of the power switch 116 resonates with the inductor 113 during the corresponding sequential switching operation of the previous input voltage Vin sine wave period. time.

As can be seen from the foregoing description, the manner in which the control circuit 330 adjusts the on-times of the switches 310 and 320 in the discontinuous conduction mode not only controls the triangular wave generation circuit 126 to decrease the slope of the triangular wave Vs, thereby increasing the conduction time of the power switch 116 and avoiding causing The input current Iin is distorted when the input voltage Vin is located near the zero point, and the waveform of the input current Iin can be changed in accordance with the waveform of the input voltage Vin. Therefore, when the input voltage Vin is near the zero point, by operating the dual mode power factor correction circuit 120 in the discontinuous conduction mode, the total harmonic distortion can be effectively reduced and the power factor of the AC to DC converter 100 can be improved. Since the power switch 116 is also switched when the inductor current IL is zero, the diode 114 still has the advantage of zero current switching. In addition, since the switching frequency of the power switch 116 in the discontinuous conduction mode is fixed, the switching frequency of the power switch 116 can be effectively limited to a desired range.

In the foregoing embodiment, the mode switching circuit 122 is based on the switching frequency of the power switch 116 (for example, the frequency of the switching control signal PWM outputted by the trigger circuit 126) as the dual mode power factor correction circuit 120 is to be set to operate in critical conduction. The mode or the basis for judging the discontinuous conduction mode. This is merely an embodiment and is not intended to limit the actual implementation of the invention. In practice, the mode switching circuit 122 may also determine the operating mode of the dual mode power factor correction circuit 120 according to the magnitude of the input voltage Vin or the peak value of the inductor current IL.

For example, FIG. 6 is a simplified functional block diagram of a dual mode power factor correction circuit 620 in accordance with a second embodiment of the present invention. Compared with the dual mode power factor correction circuit 120 described above, the dual mode power factor correction circuit 620 further includes a voltage detector 627 for detecting the magnitude of the input voltage Vin. When the input voltage Vin is greater than a predetermined threshold value Vth, the control circuit 630 in the mode switching circuit 122 sets the dual mode power factor correction circuit 620 to operate in the critical conduction mode; and when the input voltage Vin is less than or equal to the predetermined threshold value Vth At this time, the control circuit 630 in the mode switching circuit 122 sets the dual mode power factor correction circuit 620 to operate in the discontinuous conduction mode. The operation of many of the functional blocks in the dual mode power factor correction circuit 120 described above is equally applicable to the corresponding functional blocks in the dual mode power factor correction circuit 620. For the sake of brevity, the description will not be repeated here.

FIG. 7 is a simplified functional block diagram of a dual mode power factor correction circuit 720 according to another embodiment of the present invention. In the dual mode power factor correction circuit 720, the detection circuit 721 detects the change in the inductor current IL through the auxiliary coil 117 and the resistor 118, and also detects the peak value of the inductor current IL flowing through the power switch 116. When the current at node CS (i.e., the inductor current flowing through power switch 116) is less than a predetermined threshold current Ith, control circuit 730 in mode switching circuit 122 sets dual mode power factor correction circuit 720 to operate at critical conduction. Mode; and when the current of the node CS is greater than or equal to the predetermined threshold current Ith, then the control circuit 730 in the mode switching circuit 122 sets the dual mode power factor correction circuit 720 to operate in the discontinuous conduction mode. The operation of many of the functional blocks in the dual mode power factor correction circuit 120 described above applies equally to the corresponding functional blocks in the dual mode power factor correction circuit 720. For the sake of brevity, the description will not be repeated here.

In practical applications, the previously disclosed dual mode power factor correction circuit is also applicable to the fly-to-DC converter of the flyback architecture.

For example, FIG. 8 is a simplified functional block diagram of a flyback AC to DC converter 800 in accordance with an embodiment of the present invention. In the AC to DC converter 800, the dual mode power factor correction circuit 120 will also act as a dual mode power factor correction circuit depending on the switching frequency of the power switch 116 (eg, the frequency of the switching control signal PWM output by the trigger circuit 126). 120 is set to operate in a critical conduction mode or a discontinuous conduction mode. The operation and implementation of the dual mode power factor correction circuit 120 in the AC to DC converter 800 is the same as the dual mode power factor correction circuit 120 of the embodiment of Figures 1 and 3 described above, for the sake of brevity, Repeat the narrative.

In addition, the dual mode power factor correction circuit 620 in FIG. 6 may be replaced by the dual mode power factor correction circuit 620 in FIG. 6 to make the dual mode power factor correction circuit in the AC to DC converter 800 according to the input voltage Vin. The size of the operation mode is switched between the critical conduction mode and the discontinuous conduction mode. Alternatively, instead of the dual mode power factor correction circuit 120 of FIG. 8, the dual mode power factor correction circuit 720 of FIG. 7 may be used to make the dual mode power factor correction circuit in the AC to DC converter 800 according to the inductor current IL. The peak size of the operation mode is switched between the critical conduction mode and the discontinuous conduction mode.

It can be seen from the foregoing description that the circuit architecture of the dual mode power factor correction circuits 120 and 620 proposed by the present invention is very simple, but the AC to DC converter can be operated by switching back and forth between the critical conduction mode and the discontinuous conduction mode. At the same time, it enjoys the advantages of two modes of operation, which can effectively reduce total harmonic distortion and improve power factor.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100, 800. . . AC to DC converter

102. . . AC power

104. . . load

111. . . Bridge rectifier

112, 115, 344, 360. . . capacitance

113. . . inductance

118,342. . . resistance

114. . . Dipole

116, 310, 320, 370. . . switch

117. . . Auxiliary coil

120, 620. . . Dual mode power factor correction circuit

121, 721. . . Detection circuit

122. . . Mode switching circuit

123. . . Triangle wave generating circuit

124. . . Error detector

125. . . Comparators

126. . . Trigger circuit

330, 630, 730. . . Control circuit

340. . . Low pass filter

350. . . Transduction amplifier

627. . . Voltage detector

1 is a simplified functional block diagram of an embodiment of an AC to DC converter of the present invention.

2 is a simplified schematic diagram of an embodiment of a relationship between a switching control signal and an inductor current generated by the dual mode power factor correction circuit of FIG. 1.

3 is a simplified functional block diagram of a first embodiment of a dual mode power factor correction circuit of the present invention.

4 is a waveform diagram of the dual mode power factor correction circuit of FIG. 3 operating in a critical conduction mode.

FIG. 5 is a waveform diagram of the dual mode power factor correction circuit of FIG. 3 operating in a discontinuous conduction mode.

Figure 6 is a simplified functional block diagram of a second embodiment of a dual mode AC to DC converter of the present invention.

Figure 7 is a simplified functional block diagram of a third embodiment of the dual mode power factor correction circuit of the present invention.

Figure 8 is a simplified functional block diagram of an embodiment of a flyback AC to DC converter of the present invention.

100. . . AC to DC converter

102. . . AC power

104. . . load

111. . . Bridge rectifier

112, 115. . . capacitance

113. . . inductance

118. . . resistance

114. . . Dipole

116. . . switch

117. . . Auxiliary coil

120. . . Dual mode power factor correction circuit

121. . . Detection circuit

122. . . Mode switching circuit

123. . . Triangle wave generating circuit

124. . . Error detector

125. . . Comparators

126. . . Trigger circuit

Claims (12)

A dual mode power factor correction circuit for correcting a power factor of an AC to DC converter, wherein the AC to DC converter includes an inductor and a power switch, the dual mode power factor correction circuit comprising:
a detecting circuit for detecting a current of the inductor;
a mode switching circuit coupled to the detecting circuit for alternately switching the dual mode power factor correction circuit between a first operating mode and a second operating mode;
a triangular wave generating circuit coupled to the mode switching circuit for generating a triangular wave when operating in the first operating mode, and reducing a slope of the triangular wave when operating in the second operating mode;
An error detector is coupled to an output of the AC to DC converter for generating an error signal according to an output voltage of the AC to DC converter;
a comparator coupled to the triangular wave generating circuit and the error detector for comparing the triangular wave with the error signal; and a trigger circuit coupled to the detecting circuit and the comparator for The detection result of the detection circuit and the comparison result of the comparator control the switching action of the power switch. The dual mode power factor correction circuit of claim 1, wherein the mode switching circuit will be when the switching frequency of the power switch is lower than a predetermined frequency or the input voltage of the AC to DC converter is greater than a predetermined threshold. The dual mode power factor correction circuit is configured to operate in the first mode of operation, and when the switching frequency of the power switch is higher than the predetermined frequency or the input voltage of the AC to DC converter is less than the predetermined threshold A mode power factor correction circuit is arranged to operate in the second mode of operation. The dual mode power factor correction circuit of claim 2, wherein the first mode of operation is a critical conduction mode and the second mode of operation is a discontinuous conduction mode. The dual mode power factor correction circuit of claim 3, wherein the mode switching circuit comprises:
a first switch;
a second switch; and a control circuit, when operating in the discontinuous conduction mode, the control circuit turns on the first switch and turns the first switch in a first period of time in each switching cycle of the power switch The second switch is turned off, and then the second switch is turned on and the first switch is turned off in a second period. The dual mode power factor correction circuit of claim 4, wherein the length of the first time period is equal to a sum of an on time and an off time of the power switch in a previous switching period, and the length of the second period is equal to the power The length of each switching cycle of the switch is subtracted from the length after the first time period. The dual mode power factor correction circuit of claim 4, wherein the control circuit maintains the first switch conductive and maintains the second switch in an off state when the control circuit operates in a critical conduction mode. The dual mode power factor correction circuit of claim 4, wherein when the detecting circuit detects zero current, the trigger circuit turns on the power switch, and when the level of the triangular wave is greater than or equal to the error signal When the level is on, the trigger circuit will cut off the power switch. The dual mode power factor correction circuit of claim 7, wherein the triangular wave generation circuit comprises:
a capacitor; and a third switch;
When the trigger circuit turns on the power switch, the trigger circuit turns off the third switch, and when the trigger circuit turns off the power switch, the trigger circuit turns on the third switch. The dual mode power factor correction circuit of claim 8, wherein the error detector compares the feedback voltage having a proportional relationship with the output voltage with a reference voltage to generate the error signal. The dual-mode power factor correction circuit of claim 8, wherein the trigger circuit comprises an RS flip-flop, the S input of the RS flip-flop is coupled to the detection circuit, and the R input is coupled to the comparison The output end is coupled to the power switch, and the inverting output end is coupled to the third switch. The dual-mode power factor correction circuit of claim 4, wherein the trigger circuit comprises an RS flip-flop, the S input of the RS flip-flop is coupled to the detection circuit, and the R input is coupled to the comparison. And the output is coupled to the power switch. The dual mode power factor correction circuit of claim 1, wherein in the first mode of operation, the trigger circuit is fixed each time the power switch is turned on, and in the second mode of operation, the trigger circuit is turned on. The frequency of this power switch will be fixed.