TW201513112A - 半導體裝置 - Google Patents
半導體裝置 Download PDFInfo
- Publication number
- TW201513112A TW201513112A TW103117492A TW103117492A TW201513112A TW 201513112 A TW201513112 A TW 201513112A TW 103117492 A TW103117492 A TW 103117492A TW 103117492 A TW103117492 A TW 103117492A TW 201513112 A TW201513112 A TW 201513112A
- Authority
- TW
- Taiwan
- Prior art keywords
- potential
- supplied
- power supply
- line
- transistor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 65
- 239000013078 crystal Substances 0.000 claims description 4
- 230000009467 reduction Effects 0.000 abstract description 4
- 230000015654 memory Effects 0.000 description 30
- 238000010586 diagram Methods 0.000 description 7
- 230000006870 function Effects 0.000 description 5
- 230000000295 complement effect Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 238000012795 verification Methods 0.000 description 3
- 101100498818 Arabidopsis thaliana DDR4 gene Proteins 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000017105 transposition Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013111215A JP2014229338A (ja) | 2013-05-27 | 2013-05-27 | 半導体装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201513112A true TW201513112A (zh) | 2015-04-01 |
Family
ID=51988578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW103117492A TW201513112A (zh) | 2013-05-27 | 2014-05-19 | 半導體裝置 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2014229338A (ja) |
| TW (1) | TW201513112A (ja) |
| WO (1) | WO2014192542A1 (ja) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7088542B2 (ja) * | 2017-06-02 | 2022-06-21 | 北川工業株式会社 | 熱伝導材用組成物、及び熱伝導材 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0660658A (ja) * | 1992-08-04 | 1994-03-04 | Fujitsu Ltd | 半導体記憶装置 |
| JP3267436B2 (ja) * | 1993-04-19 | 2002-03-18 | 三菱電機株式会社 | 半導体装置 |
| JP2000215669A (ja) * | 1999-01-19 | 2000-08-04 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2000311489A (ja) * | 1999-04-23 | 2000-11-07 | Fujitsu Ltd | 半導体記憶装置 |
| US6414897B1 (en) * | 2000-08-31 | 2002-07-02 | United Memories, Inc. | Local write driver circuit for an integrated circuit device incorporating embedded dynamic random access memory (DRAM) |
-
2013
- 2013-05-27 JP JP2013111215A patent/JP2014229338A/ja not_active Withdrawn
-
2014
- 2014-05-14 WO PCT/JP2014/062791 patent/WO2014192542A1/ja not_active Ceased
- 2014-05-19 TW TW103117492A patent/TW201513112A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO2014192542A1 (ja) | 2014-12-04 |
| JP2014229338A (ja) | 2014-12-08 |
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