TW201612995A - Manufacturing method of semiconductor device and semiconductor manufacturing apparatus - Google Patents

Manufacturing method of semiconductor device and semiconductor manufacturing apparatus

Info

Publication number
TW201612995A
TW201612995A TW104107090A TW104107090A TW201612995A TW 201612995 A TW201612995 A TW 201612995A TW 104107090 A TW104107090 A TW 104107090A TW 104107090 A TW104107090 A TW 104107090A TW 201612995 A TW201612995 A TW 201612995A
Authority
TW
Taiwan
Prior art keywords
semiconductor chip
electrodes
semiconductor
manufacturing
semiconductor device
Prior art date
Application number
TW104107090A
Other languages
English (en)
Other versions
TWI612593B (zh
Inventor
Shinya Fukayama
Yukifumi Oyama
Kazuhiro Murakami
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW201612995A publication Critical patent/TW201612995A/zh
Application granted granted Critical
Publication of TWI612593B publication Critical patent/TWI612593B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/26—Measuring arrangements characterised by the use of optical techniques for measuring angles or tapers; for testing the alignment of axes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/26—Measuring arrangements characterised by the use of optical techniques for measuring angles or tapers; for testing the alignment of axes
    • G01B11/27—Measuring arrangements characterised by the use of optical techniques for measuring angles or tapers; for testing the alignment of axes for testing the alignment of axes
    • G01B11/272—Measuring arrangements characterised by the use of optical techniques for measuring angles or tapers; for testing the alignment of axes for testing the alignment of axes using photoelectric detection means
    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING SYSTEMS, e.g. PERSONAL CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B21/00—Alarms responsive to a single specified undesired or abnormal condition and not otherwise provided for
    • G08B21/02—Alarms for ensuring the safety of persons
    • G08B21/08—Alarms for ensuring the safety of persons responsive to the presence of persons in a body of water, e.g. a swimming pool; responsive to an abnormal condition of a body of water
    • G08B21/086—Alarms for ensuring the safety of persons responsive to the presence of persons in a body of water, e.g. a swimming pool; responsive to an abnormal condition of a body of water by monitoring a perimeter outside the body of the water
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H10P72/53—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07178—Means for aligning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07183—Means for monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07223—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
    • H10W72/07233—Ultrasonic bonding, e.g. thermosonic bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
TW104107090A 2014-09-16 2015-03-05 半導體裝置之製造方法及半導體製造裝置 TWI612593B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014187676A JP6305887B2 (ja) 2014-09-16 2014-09-16 半導体装置の製造方法及び半導体製造装置
JP2014-187676 2014-09-16

Publications (2)

Publication Number Publication Date
TW201612995A true TW201612995A (en) 2016-04-01
TWI612593B TWI612593B (zh) 2018-01-21

Family

ID=55455449

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104107090A TWI612593B (zh) 2014-09-16 2015-03-05 半導體裝置之製造方法及半導體製造裝置

Country Status (4)

Country Link
US (1) US9448065B2 (zh)
JP (1) JP6305887B2 (zh)
CN (1) CN105990205B (zh)
TW (1) TWI612593B (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160142943A (ko) * 2015-06-03 2016-12-14 한국전자통신연구원 반도체 패키지 및 반도체 패키지의 제조 방법
JP6307730B1 (ja) * 2016-09-29 2018-04-11 株式会社新川 半導体装置の製造方法、及び実装装置
DE102017105697B4 (de) * 2017-03-16 2025-12-31 Ev Group E. Thallner Gmbh Verfahren und System zur Ausrichtung zweier gegenüberliegend angeordneter optischer Teilsysteme und Kamerachip
JP7045891B2 (ja) 2018-03-20 2022-04-01 キオクシア株式会社 半導体製造方法、半導体製造装置及び半導体装置
US10971409B2 (en) * 2018-12-27 2021-04-06 Micron Technology, Inc. Methods and systems for measuring semiconductor devices
DE102019100064B3 (de) * 2019-01-03 2020-07-09 Heinrich Georg Gmbh Maschinenfabrik Verfahren und Positioniersystem zur Herstellung von Transformatorkernen
JP2020150102A (ja) * 2019-03-13 2020-09-17 パナソニックＩｐマネジメント株式会社 部品搭載装置および部品搭載方法
KR102877021B1 (ko) * 2020-09-03 2025-10-24 삼성전자주식회사 반도체 패키지
KR102522328B1 (ko) * 2020-12-21 2023-04-17 가부시키가이샤 신가와 본딩 장치 및 본딩 방법
CN114803555A (zh) * 2021-01-19 2022-07-29 中冶京诚工程技术有限公司 板坯运输车辆自动装卸系统及方法
KR102575501B1 (ko) * 2022-09-05 2023-09-07 한국원자력연구원 반도체 패키징용 칩 정렬 장치 및 그 방법

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4618859B2 (ja) 2000-10-10 2011-01-26 東レエンジニアリング株式会社 積層ウエハーのアライメント方法
JP2002162206A (ja) * 2000-11-22 2002-06-07 Toray Eng Co Ltd アライメント方法および装置
JP4191908B2 (ja) 2001-04-18 2008-12-03 株式会社東芝 積層型半導体装置
JP2003224057A (ja) * 2002-01-30 2003-08-08 Hitachi Ltd 半導体装置の製造方法
JP4379102B2 (ja) 2003-12-12 2009-12-09 セイコーエプソン株式会社 半導体装置の製造方法
JP2005223202A (ja) * 2004-02-06 2005-08-18 Seiko Epson Corp 半導体装置の製造方法及びその製造装置
JP4262171B2 (ja) * 2004-09-02 2009-05-13 芝浦メカトロニクス株式会社 半導体チップの実装装置及び実装方法
DE112004002981B4 (de) * 2004-11-01 2018-07-26 Mitsubishi Denki K.K. Entwicklungsunterstützungsvorrichtung für Halbleiterbauelemente
JP2008164292A (ja) * 2006-12-26 2008-07-17 Tokyo Electron Ltd プローブ検査装置、位置ずれ補正方法、情報処理装置、情報処理方法及びプログラム
TWI533394B (zh) * 2007-06-21 2016-05-11 尼康股份有限公司 Conveying method and conveying device
WO2009022401A1 (ja) * 2007-08-10 2009-02-19 Fujitsu Microelectronics Limited 半導体素子の選別取得方法、半導体装置の製造方法及び半導体装置
JP5732631B2 (ja) * 2009-09-18 2015-06-10 ボンドテック株式会社 接合装置および接合方法
JP5807221B2 (ja) * 2010-06-28 2015-11-10 アユミ工業株式会社 接合構造体製造方法および加熱溶融処理方法ならびにこれらのシステム
JP5696076B2 (ja) 2012-03-21 2015-04-08 株式会社東芝 半導体装置の検査装置及び半導体装置の検査方法
JP5876000B2 (ja) * 2012-06-11 2016-03-02 株式会社新川 ボンディング装置およびボンディング方法
KR102207674B1 (ko) * 2013-11-27 2021-01-25 토레이 엔지니어링 컴퍼니, 리미티드 3차원 실장 방법 및 3차원 실장 장치

Also Published As

Publication number Publication date
US20160079102A1 (en) 2016-03-17
TWI612593B (zh) 2018-01-21
CN105990205A (zh) 2016-10-05
JP2016062958A (ja) 2016-04-25
US9448065B2 (en) 2016-09-20
JP6305887B2 (ja) 2018-04-04
CN105990205B (zh) 2019-05-21

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