Λ 6 Η 6 201832 五、發明説明（） (産業方面之利用領域） (請先閲請背而之注意事項再项寫木頁) 本發明你有η於將構成霣腦之cpu及記億器等之構成 要件，以霣氣方式連接之匯流排的改良。 (以往之技術） 以往，構成霣腦之硬體，如第11·所提示，將CPU或 記億器等各要件實裝於印刷基板1上，將該等印刷基板1 各自連接於連接器2,並使實裝面呈平行狀，再利用電路 將各達接器2彼此加以連接，以形成由諸如資料匯流排、 控制匯流排、以及位址匯流排等構成之平面化匯流排3之 例，業已公知。 (發明欲予解決之間題） 如上述，由於以往之匯流排3像採取平面化形成，將 後數印刷基板1顒沿該匯流排3之長方向，彼此平行加以 配置，故於CPU或記億器等構成要件多而必須將多數片印 刷基板1加以連接時，印刷基板1間之距離，亦即格子距 離即擴大。 經沭部屮央^準而只工消^合作社印^ 因此，於以往之匯流排，不僅由於CPU或記億器等各 構成要件間傅送距離差別引起之傅送時間不均勻，必須施 行時間差控制，同時，傳送控制亦複雜化，使得訊號之高 速傳送難以實現.産生賫料高速β理困難之問題。 因此，本發明人乃開發以共同連接點為中心，呈放射 狀排列訊號線，使CPU間距離均勻，且縮短.可進行高速 傳送訊號之放射型匯流排.提出待願平卜102909號及待願 平卜152985號之專利申謫。 本紙尺度边用中H ffl家榀準（CNS) ΊΜ規格（2】0x297公及） 經沭部屮央標準而卩工消"合作社印31 201832 Λ 6 _Π_6 五、發明説明（） 本發明僳將上述之專利加以改良，其目的在於解決放 射型匾流排之匯流排傅送線路上訊諕之反射及失真之間題 者〇 (為解決問題所用之手段） 為逹成上述目的，本發明採取下述之構成。 亦即，本發明之待微在於將長度相等之複數支訊號線 ,以共同連接點為中心，呈放射狀排列於絶线板之表裡， 並將該等2支1組表裡相對之訊號線加以组合，呈放射狀 形成複數組傳送線路，於當該複數组傅送線路之前端各自 連接整合霣路，形成匯流排配線板，並將該匯流排配線板 重叠於同一軸線上，藉以配置拔數片配線板。 進一步.利用霣路將前述各整合m路之一端連接於順 沿前述各匯流排周》所配列各處理要件之外部連接部者。 (作用） 具有上述構成之本發明中，重叠於同一軸線上之匯流 排配線板上.各相關連之傳送線路之集合即成為一單位， 並成為將其呈放射狀配列於同一軸線上之立體狀匯流排。 而且，將由該集合構成之各傅送線路各自分配在資料線、 位址線、以及，控制線等。 另外，醮用本發明時，由於各傅送線路長度各自相等 ，並於各傳送線路終端各自連接整合電路，故各處理要件 間之傳送距離均勻，加上，傅送線路上不易引起訊號之反 射。從而.應用本發明可實現訊號之高速傳送目的，而且 ,不易産生訊諕之傅送錯誤。 (請先閲讀背而之注意事項#碼寫本页) 本紙尺度边用中a Η家i?準（CNS) τ Ί規格（2]0X297公犮） -4 - 201832 Λ 6 Π 6 五、發明説明（） (實施例） 以下.參照圔面説明本發明實施例。 匯流排配線板5如第1Η所示，你由：於呈國形之绝 緣板表裡形成如後述之導臁型樣之雙面印刷基板構成。 亦即，匯流排配線板5像將長度相等之後數支直線狀 訊號線6及訊號線7，以絶纗板表裡上之絶绨板中心一一 共同連接點為中心，等間隔且呈放射狀各自加以排列，里 放射狀形成.由該等各1對表裡同相位之訊號線6、 7構 成之複數組（例如31組）傅送線路（參照第1圖）。 形成於匯流排配線板5表側之各訊號線6其一端，中 介霣阻R1連接於以等間隔設置於匯流排配線板表侧外周部 之連接端子8。霣阻R1則以採用印刷霣阻或切Η霣阻等為 良適。 經濟部屮央榣準灼β工消费合作社印31 (請先閲讀背而之注意事項洱质寫木頁) 一方，形成於匯流排配線板5裡側之各訊號線7其一 端.則中介霄阻R1,連接於順沿匯流排配線板5裡側外周 部形成之環狀接地型樣9。而且，亦中介導通孔10將接地 型樣9速接於設置於匯流排配線板5表側之接Η11。於接 片11與連接端子8之間，則連接霣阻R2(參照第2圖及第 3圖）。而笛咀R2則以採用印刷霣阻或切片電阻等為良適 〇 具有上述構成之匯流排配線板5.如第4圈所示.偽 於其上下方向之同一軸線上，隔開相等間隔.且以令各匯 流排配線板5之訊號線6、 7各自成為同相位狀態.配置 規定之片數者。因此，該等配置成同相位之柑藺聯訊號線 本紙尺度边用中a Η家榀準（CHS) 規格（2)0x297公茇） 經沭部屮央橾準Λ;κχ工消费合作杜印31 ^01832 Λ 6 _____Π6__ 五、發明説明（） 6、 7之集合即成為一單位.亦成為呈放射狀拂列於同一 軸線上之立*化匯流排.而且，將該形成一單位之各訊號 線6、7各自分配在資料線、位址線、以及控制線等。 然後，將實裝有處理要件12之印刷基板13.以豎立且 呈放射狀，顒沿配置成上述狀態之匾流排配線板5之周綠 配列（參照第5圃）。設置於各印刷基板13之外部連接端 子14則利用霣路各自中介連接器（不予圖示）連接於與匯 流排配線板5對鼴之各連接端子8。另外，如第2圃所示 於匯流排配線板5之各連接端子8上亦連接有插座15,該 插座15可以裝卸自如狀態插入上述連接器之各連接銷。 裝載於各印刷基板13之處理要件12則除處理器（CPU) 及各種記億器外，尚有控制鍵盤或顯示裝置等输出入装置 之输出入處理器。 其次，將自具有上述構成之匯流排配線板5中心向半 徑方向，由訊號線6、7所構成之一組傳送線路之高頻訊 號中等價電路提示於第6圖。 於第6圖中，C1指産生於電阻R1兩端之靜電容置，C2 則指形成於訊號線6、 7間之靜霣容量。而該等靜電容量 C1及C2則與霣阻ΙΠ及R2相組合.形成如圔示之整合霣路16 〇 其次，就形成整合電路16之霣阻R1及R2其各值之決定 方法加以說明。 設假定匯流排配線板5上配設有由訊號線6、 7所形 成之放射狀傳送線路Η支，則該匯流排卽可推定為自第6 (請先Μ讀背而之注意事項孙艰寫本页) 裝- 線. 本紙張尺度逍用中8困家標iMCNS) T4«tM2】0x297公:it) -6- 經濟部屮央櫺準而A工消f»··合作杜印3i 01832 Λ 6 ___Π6___ 五、發明説明（） 所示等價霣路之傅送線路1支，分技出與之相同等價霣 路之傅送線路（Η-1)支者。 因此，於決定《阻R1、霣阻R2之各值之際.考慮上述 之重黏，同時，亦考盧傅送線路之特性阻抗之值等，求出 能在傅送条全鼸整合咀抗之最適值即可。 然後，依據經上述步驟所決定之霣阻R1、霣阻R2之各 值，形成各傅送線路之整合霣路16,即可實現各處理要件 12間之資料高速轉送且不致誤傳。 其次.參照第7圈说明匯流排配線板之3外之實施例 0 該匯流排配線板17傜使用2 Η第1·所示之匯流排配 線板5,中介隔層（Prepreg) 18將兩者加以積醱化使成一 «，並令下锢I之匯流排配線板5之訊號線6,位於上側之 匯流排配線板5其訊號線6與訊號線6之中間之位置者。 另外，於第7匯中，匯流排配線板5之整合霣路16其詳細 情形則加以省略。 具有上述構成之匯流排配線板17,由於令下侧之匯流 排配嫌板5之訊《線6,位於上側之匯流排配線板5其訊 號線6舆訊號線6之中間之位置，故使用連接銷之配置與 訊號線6之位置對應之現成缠接器.形成如第5圈所示之 霣腦糸統則棰為利便。 第8圈傜提示訊號線另外之實施例者。 第8圖中之匯流排配線板51像中介絶綠板令表側訊號 線61與裡侧訊號線71彼此交叉，並以绝緣板中央之共同連 (請先閲讀背而之注意事項再塡寫木页) 裝· 線· 本紙張尺度边用中SH家樣準（CNS) Ή規格（210x297公龙） Λ 6 η 6 201832 五、發明説明（） 接點為中心，將其呈放射狀配列於绝鐮板之表裡，將該等 相nil之表側訊號線61舆裡侧訊轚線71兩者中介導通孔81 .呈杻曲《狀彼此交叉加以連接，形成複數组放射狀且長 度相等之傳送線路。 形成各傅送線路之表侧訊號缠61及裡側訊號線71其終 端則各自速接於形成整合霣路91之絶嫌板表侧之霣阻R11 及绝纗板裡餹之霣阻R11 (參照第9圈）。 绝鐮板表側之霣阻R11之另外一端中介導龌101連接 於以等間隔設置於匯流排配線板51表侧外周部之連接端子 111。絶鐮板裡側之《阻R11之另外一端則中介導通孔121 連接於配置於绝鎳板表镅之電阻R21 ,而霣阻R21之另外 一端亦達接於達接蠕子111。 具有上述構成之匯流排配線板51亦舆第4 者相間， 於上下方向同一_線上以隔Ml相等間隔且令各匯流排配線 板51其各訊»線61、71各自成^位之狀態，配置規定之個 數。因此，該等配置成间相位之相鼷聯訊虢線61、71之集 合單位邸各自形成並聯匯流排。形成該並聯匯流排之各訊 號線61、71則各自分配在資料線、位址線、以及，控制線 等。 其次，將具有上述構成一即由訊號線61、71構成之傳 送線路其离頻訊號之等價霣路提示於第10圈。 由於第8鼷中之訊號線路换表侧訊號線6〗與裡侧訊號 線71兩者形成扭曲狀態者，故具有可將靜霣感慝或霣磁感 應加以消除，不受外部雜訊之影同時，亦可抑制來自 本紙尺度逍用中國《家榣準（CNS) 規怙（2丨0x297公;¢) (請先閲讀背而之注意事項再艰窍本頁) 装· 線· 經濟部屮央櫺準杓EX工消仲合作社印¾ -8- ^01832 五、發明説明（） 傅送線路之無用鞴射之優貼。 (發明之效果） 如上述，本發明由於於長度相等之傅送纗路之各終端 ,各自連接有整合霣路，故各處理要件間之霣學上距離全 成為相等，全部處理要件間之傳送距離均勻化，同時，傅 送線路条上訊號之反射或損失亦不易産生。因此，慝用本 發明時，可實現訊號之高速傳送之理想.而且，亦可獲得 不易産生訊號傳送錯誤之效果。 團面之籣單說明 經濟部十央標準：：^工消卟合作社印驭 (請先閱讀背而之注意枣項再艰寫本豇) 第1圈係提示匯流排配線板一例之平面圖；第2騙偽 提示其主要部分之斷面圔；第3圔换提示第2_中導體型 樣舆霣阻間連接覇傜之斜視圖；第4H傜提示匯流排配線 板配置例之·;第5像使用匯流排配線板構成霣腦糸统 時之斜視圔；第6圔偽自匯流排配線板之中心向半徑方向 延伸之一支傳送線路其高頻訊號之等價霣路；第7圈你提 示匯流排配線板之另外實施例之分解斜視鼸；第8顯傜訊 號線之另外實施例之匯流排配線板平面画；第9圏像提示 第8匾之導體型樣與霣阻間連接鼷偽之斜視圔；第10圃俱 第8圃中傅送線路其高頻訊號之等價霣路；而第11圃則你 説明以往技術之圈。 至於5、17换匯流排配線板；6、7偽訊號線；12偽 «理要件；而16則傲整合電路。 本紙5lc尺度边用中a Η家*格（210x297公茇）Λ 6 Η 6 201832 5. Description of the invention () (Utilization field in industry) (Please read the back-to-back precautions and then write the wooden page) In the present invention, you have η to the CPU and the memory device that will constitute the brain Etc., the improvement of the busbars connected in an energetic manner. (Conventional technology) In the past, the hardware that constituted the brain was mounted on the printed circuit board 1 as shown in Section 11 on the printed circuit board 1, and each element, such as a CPU or a memory, was connected to the connector 2 , And make the mounting surface parallel, and then use the circuit to connect the two connectors 2 to each other to form an example of a planar bus 3 composed of data bus, control bus, and address bus , Is well known. (Problems to be solved by the invention) As mentioned above, since the conventional busbar 3 image is formed by planarization, the rear printed circuit boards 1 are arranged parallel to each other along the long direction of the busbar 3. Therefore, the CPU or When there are many constituent elements such as 100 million devices and it is necessary to connect a plurality of printed circuit boards 1, the distance between the printed circuit boards 1, that is, the lattice distance, increases. It is only approved by the Ministry of Economic Affairs and is only printed by the cooperative. Therefore, in the past, the bus delivery time was not only uneven due to the difference in the delivery distance between the components such as the CPU or the memory, but the time difference must be implemented. At the same time, the transmission control is also complicated, which makes the high-speed transmission of the signal difficult to achieve. The problem of high-speed β-framing is difficult. Therefore, the present inventors developed a radial arrangement of signal lines centered on a common connection point to make the distance between CPUs uniform and shortened. A radial bus that can transmit signals at a high speed. Would like to apply for the patent of No. 152985. The size of the paper is used in the middle of the H ffl home standard (CNS) TIM specifications (2) 0x297 g. And it is based on the standards of the Ministry of Economic Affairs and Industry. "Cooperative printing 31 201832 Λ 6 _Π_6 V. Description of the invention. The above patent is improved, the purpose of which is to solve the problem between the reflection and distortion of the signal on the bus line of the radial plaque bus (the means used to solve the problem). To achieve the above purpose, the present invention Take the following structure. That is to say, the purpose of the present invention is to arrange a plurality of signal lines of equal length, centered on a common connection point, in a radial manner in the surface of the insulation board, and put these 2 signals in a group of opposite signals The lines are combined to form a complex array transmission line in a radial shape. At the front end of the complex array transmission line, each is connected to an integrated en route to form a busbar wiring board, and the busbar wiring board is overlapped on the same axis to configure Pull out several wiring boards. Further, the use of 霣 路 connects one end of the above-mentioned integrated m-way to the external connection part of each processing element arranged along the above-mentioned each bus bar circumference. (Function) In the present invention having the above-mentioned configuration, the busbar wiring boards overlapped on the same axis. The collection of related transmission lines becomes one unit, and becomes a three-dimensional arrangement of the radial arrangement on the same axis Shaped bus bar. In addition, each transmission line composed of the set is allocated to a data line, an address line, and a control line. In addition, when using the present invention, since the length of each transmission line is equal, and the integrated circuit is connected to each transmission line terminal, the transmission distance between the processing elements is uniform, and the reflection of the signal on the transmission line is not easy to cause. . Therefore, the application of the present invention can achieve the purpose of high-speed transmission of signals, and it is not easy to generate errors in the transmission of signals. (Please read the back and the precautions #code to write this page) This paper is used in the standard a Η 家 i? 准 (CNS) τ Ί specification (2) 0X297 Gonglu) -4-201832 Λ 6 Π 6 V. Invention Description () (Embodiment) Hereinafter, an embodiment of the present invention will be described with reference to the image. The busbar wiring board 5 is shown as 1H, and you are formed by forming a double-sided printed circuit board with a guide pattern as described later on the surface of an insulating board having a national shape. In other words, the busbar wiring board 5 will have several straight signal lines 6 and 7 after the same length, centered on the common connection point of the center of the insulation board on the surface of the insulation board, equally spaced and radiating The signals are arranged separately, and are formed radially. The complex array (for example, 31 groups) of transmission lines (refer to Figure 1) composed of the signal lines 6 and 7 of the same phase in the front and back of each pair. One end of each signal line 6 formed on the front side of the busbar wiring board 5 is connected to the connection terminal 8 provided at an equal interval on the outer periphery of the front side of the busbar wiring board with an intermediate resistance R1. It is good to use the printing resistance or the cutting resistance as the resistance R1. 31 printed by the Ministry of Economic Affairs of the Ministry of Economic Affairs and the β-Consumer Cooperative Cooperative Society (please read the precautions for writing wooden pages first). One side is formed at one end of each signal line 7 on the back side of the busbar wiring board 5. The resistance R1 is connected to a ring-shaped grounding pattern 9 formed along the inner periphery of the busbar wiring board 5. In addition, the via hole 10 quickly connects the ground pattern 9 to the connection H11 provided on the front side of the busbar wiring board 5. Between the contact 11 and the connection terminal 8, a resistance R2 is connected (refer to FIG. 2 and FIG. 3). The flute nozzle R2 is well-suited for the use of printed resistance or slicing resistors. The busbar wiring board with the above structure 5. As shown in the fourth circle. Pseudo on the same axis in the up and down direction, equally spaced. In addition, the signal lines 6 and 7 of each busbar wiring board 5 are in the same phase state. The specified number of pieces is arranged. Therefore, the tandem signal lines that are configured in the same phase are used on the paper standard side. The standard is (CHS) specification (2) 0x297 g. 31 ^ 01832 Λ 6 _____ Π6__ V. Description of invention () The set of 6, 7 becomes a unit. It also becomes a vertical bus that is arranged radially on the same axis. Moreover, the signals that form a unit Lines 6 and 7 are allocated to data lines, address lines, and control lines, respectively. Then, the printed circuit board 13 on which the processing elements 12 are mounted is erected and arranged in a radial pattern along the perimeter green of the plaque flow wiring board 5 arranged in the above state (refer to the fifth garden). The external connection terminals 14 provided on the printed circuit boards 13 are connected to the respective connection terminals 8 that are opposite to the busbar wiring board 5 by way of respective intermediary connectors (not shown). In addition, as shown in the second garden, a socket 15 is also connected to each connection terminal 8 of the busbar wiring board 5, and the socket 15 can be detachably inserted into each connection pin of the connector. The processing elements 12 loaded on each printed circuit board 13 include an input / output processor that controls an input / output device such as a keyboard or a display device, in addition to a processor (CPU) and various types of megameters. Next, a high-frequency signal equivalent circuit of a group of transmission lines composed of the signal lines 6 and 7 from the center of the busbar wiring board 5 having the above-mentioned configuration to the radial direction is shown in FIG. 6. In Figure 6, C1 refers to the static capacitance generated across resistor R1, and C2 refers to the static capacitance formed between signal lines 6 and 7. The capacitances C1 and C2 are combined with the resistances ΠΠ and R2. The integrated circuit 16 is formed as shown. Secondly, the methods for determining the values of the resistances R1 and R2 forming the integrated circuit 16 are described. Assuming that the busbar wiring board 5 is equipped with a radial transmission line formed by the signal lines 6, 7, the busbar can be presumed to be from the 6th (please read the background and notes Write this page) Pack-Line. This paper standard is used for 8 sleepy home standard iMCNS) T4 «tM2】 0x297 public: it) -6- Ministry of Economic Affairs, Pengyang and A Gongxiao f» ·· Cooperation Duin 3i 01832 Λ 6 ___ Π6 ___ Fifth, the invention description () shows the equivalent of the Fu Road of Fu Road, and the equivalent of the Fu Road of the same route (H-1) branch. Therefore, when deciding the values of “Resistance R1 and Ensistance R2. Consider the above re-sticking, and at the same time, also consider the value of the characteristic impedance of the Lu Fu transmission line, etc. The optimum value is sufficient. Then, according to the values of the resistance R1 and the resistance R2 determined by the above steps, an integrated road 16 of each transmission line is formed, so that the data between the processing elements 12 can be transferred at high speed without mistransmission. Next, refer to the seventh circle to explain the third embodiment of the busbar wiring board 0. The busbar wiring board 17 傜 uses 2 Η busbar wiring board 5 shown in the first, intermediary barrier (Prepreg) 18 will both It is integrated into one, and the signal line 6 of the busbar wiring board 5 of the lower I is located at a position between the signal wire 6 and the signal wire 6 of the busbar wiring board 5 on the upper side. In addition, in the seventh busbar, the details of the integrated wiring 16 of the busbar wiring board 5 are omitted. The busbar wiring board 17 having the above-mentioned structure is used because the signal "line 6 of the lower busbar distribution board 5 is located in the middle of the signal wire 6 and the signal wire 6 of the upper busbar wiring board 5". The configuration of the connecting pin corresponds to the ready-made splicer corresponding to the position of the signal line 6. It is convenient to form the system as shown in the fifth circle. On the 8th circle, Yao reminded other embodiments of the signal line. The busbar wiring board 51 in Figure 8 acts like an intermediary insulating green board so that the front side signal line 61 and the back side signal line 71 cross each other and are connected together by the center of the insulating board (please read the precautions before writing Wooden page) Installation · Line · This paper is used in the SH home sample standard (CNS) Ή specification (210x297 male dragon) Λ 6 η 6 201832 5. Description of the invention () The contact is the center, and it is arranged radially in the In the surface of the absolute sickle board, the surface-side signal line 61 of the same phase nil and the side-side signal line 71 are interposed through the via 81. They are connected in a zigzag shape to form a radial array of equal lengths. Transmission line. The front side signal line 61 and the back side signal line 71 forming the respective transmission lines are respectively quickly connected to the front side resistance R11 and the front side resistance R11 which form the integrated night road 91. Refer to circle 9). The other end of the front side resistance R11 on the front side of the absolute sickle board mediates the connection of the Qiang 101 to the connection terminals 111 provided at the outer peripheral portion of the front side of the busbar wiring board 51 at equal intervals. The other end of the resistance R11 on the inner side of the absolute sickle plate is connected to the resistance R21 disposed on the surface of the absolute nickel plate through the via hole 121, and the other end of the resistance R21 is also connected to the access worm 111. The busbar wiring board 51 having the above-mentioned configuration is also in a state where the fourth one is on the same line in the up-down direction at equal intervals with M1, and each of the busbar wiring boards 51 has its signals 61 and 71 in the respective positions. Configure the specified number. Therefore, the integrated units of the phase-connected signal cables 61 and 71 arranged in phases each form a parallel bus. The signal lines 61 and 71 forming the parallel bus are respectively allocated to data lines, address lines, and control lines. Secondly, the equivalent distance of the off-frequency signal of the transmission line having the above-mentioned structure, that is, the transmission line composed of the signal lines 61 and 71 is presented on the 10th lap. Since the signal line in the 8th line is in a twisted state when the signal line 6 on the side and the signal line 71 on the back side form a twisted state, it can eliminate the static sense or the magnetic induction and is not affected by external noise. ， Can also suppress the use of the Chinese standard “China Family Standard (CNS) Regulations (2 丨 0x297 g; ¢) (Please read the back-to-back precautions before going to this page). Installation · Line · Ministry of Economic Affairs Printed by Zhuo Zhuo EX Gongongzhong Cooperative ¾ -8- ^ 01832 V. Description of invention () The best post for useless shots of Fusong Line. (Effect of the invention) As mentioned above, since the present invention connects the integrated terminals to the terminals of the same length, the distance between the processing elements becomes equal, and the transmission distance between all processing elements The distance is uniform, and at the same time, the reflection or loss of the signal on the transmission line is not easy to produce. Therefore, when the present invention is used, the ideal of high-speed signal transmission can be realized. Moreover, the effect of not easily generating signal transmission errors can also be obtained. The sheet of the group's face explains the standard of the Ministry of Economic Affairs :: ^ Yongxiao Porch Cooperative Co., Ltd. Yin Yu (please read the back to the date and then write the book). The first circle is a plan view showing an example of a bus wiring board; 2nd Fraudulent prompting the cross section of its main part; the third crossover prompting the second _ perspective view of the connection between the middle conductor type and the resistance; the 4H crossprompting the configuration example of the busbar wiring board; fifth image The strabismus when using the busbar wiring board to form the 霣 鳸 鳸 system; the sixth 圔 se is equivalent to the equivalent of the high-frequency signal of a transmission line extending from the center of the busbar wiring board to the radial direction; you are prompted on circle 7 Decomposed squint ray of another embodiment of the busbar wiring board; plane drawing of the busbar wiring board of another embodiment of the 8th display signal line; the 9th image shows the connection between the conductor pattern of the 8th plaque and the resistance The squint; the equivalent of the high-frequency signal of the high-frequency signal in the 10th school and the 8th school; the 11th garden explains the circle of the past technology. As for 5, 17 exchange busbar wiring board; 6, 7 pseudo signal lines; 12 pseudo «requirements; and 16 proudly integrated circuits. The paper is used in the 5lc scale with a middle Η family * grid (210x297 gong)