TW201924515A - Circuit board and electromagnetic band gap structure thereof - Google Patents
Circuit board and electromagnetic band gap structure thereof Download PDFInfo
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- 230000001629 suppression Effects 0.000 claims abstract description 48
- 239000004020 conductor Substances 0.000 claims description 23
- 230000002093 peripheral effect Effects 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011152 fibreglass Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
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Abstract
Description
本發明係關於一種電磁帶隙結構(EBG)以及電路板,特別是能抑制雙頻段訊號的電磁帶隙結構以及具有此電磁帶隙結構的電路板。The present invention relates to an electromagnetic bandgap structure (EBG) and a circuit board, particularly an electromagnetic bandgap structure capable of suppressing a dual band signal and a circuit board having the electromagnetic bandgap structure.
目前電路板等產品的內部功能趨於複雜,多頻段的訊號會在內部四處傳輸,使得電源與訊號間的交互耦合現象(Crosstalk)愈趨頻繁且無法避免。一般來說,為了保持訊號的完整性,都有額外配置微帶線做阻抗控制,以保護訊號的完整性。此外,電路板電源層的部分由於本身功能無須另外的保護,且有額定電流限制,因此大面積的電源層(Power plan)無法避免。電源層如果經過訊號線時,訊號線內的訊號以耦合的方式被帶入電源層,再經由大面積的電源層輻射(radiated)到空氣中,將會造成自干擾現象,進而影響無線(Wireless)的接收(Receiving)效能。At present, the internal functions of products such as circuit boards tend to be complicated, and signals of multiple frequency bands are transmitted inside, so that the cross-talk between the power supply and the signal (Crosstalk) becomes more frequent and unavoidable. In general, in order to maintain the integrity of the signal, there is an additional configuration of the microstrip line for impedance control to protect the integrity of the signal. In addition, the power supply layer of the board cannot be avoided because it does not require additional protection due to its own function and has a rated current limit. When the power layer passes through the signal line, the signal in the signal line is brought into the power layer by coupling, and then radiated into the air through a large area of the power layer, which will cause self-interference and affect wireless (Wireless) Receiving performance.
現有的做法是利用大面積的屏蔽蓋(Shielding)、導電布或是鋁箔覆蓋電源層以達到防止自干擾現象的目的,但其缺點就是額外的輔料增加產線組裝產品所需的步驟,因而增加成本。The existing method is to cover the power layer with a large area of Shielding, conductive cloth or aluminum foil to prevent self-interference, but the disadvantage is that the additional auxiliary materials increase the steps required for the production line assembly product, thus increasing cost.
鑒於以上的問題,本發明揭露一種電路板及其電磁帶隙結構,有助於阻擋特定頻率之訊號傳輸以防止自干擾現象。In view of the above problems, the present invention discloses a circuit board and an electromagnetic bandgap structure thereof, which helps to block signal transmission at a specific frequency to prevent self-interference.
本發明所揭露的電路板包含一介電層、一導體層以及一電磁能隙結構。導體層設置於介電層的一表面,並且電磁能隙結構設置於介電層內。電磁能隙結構包含一過孔以及一訊號抑制板。過孔之相對二端分別連接於導體層與訊號抑制板,且訊號抑制板具有至少一鏤空圖案。The circuit board disclosed in the present invention comprises a dielectric layer, a conductor layer and an electromagnetic energy gap structure. The conductor layer is disposed on a surface of the dielectric layer, and the electromagnetic energy gap structure is disposed in the dielectric layer. The electromagnetic energy gap structure comprises a via and a signal suppression plate. The opposite ends of the via are respectively connected to the conductor layer and the signal suppression board, and the signal suppression board has at least one hollow pattern.
本發明所揭露的電磁帶隙結構包含一過孔以及一訊號抑制板。訊號抑制板連接於過孔,且訊號抑制板具有以過孔為中心呈點對稱的二鏤空圖案。二鏤空圖案各自具有一第一L形槽道與一第二L形槽道。第一L形槽道具有相連的一第一延伸段以及一第二延伸段。第二L形槽道具有相連的一第三延伸段以及一第四延伸段。第一延伸段與第三延伸分別位於過孔的相對二側,且第二延伸段與第四延伸段分別位於過孔的另相對二側。第二延伸段連接於第三延伸段,且第一延伸段遠離第二延伸段之一端與第四延伸段相間隔。The electromagnetic band gap structure disclosed in the present invention comprises a via hole and a signal suppressing plate. The signal suppression plate is connected to the via hole, and the signal suppression plate has a two-empty pattern which is point-symmetric centered on the via hole. The two hollow patterns each have a first L-shaped channel and a second L-shaped channel. The first L-shaped channel has a first extension and a second extension. The second L-shaped channel has a third extension and a fourth extension. The first extension and the third extension are respectively located on opposite sides of the via hole, and the second extension section and the fourth extension section are respectively located on opposite sides of the via hole. The second extension is connected to the third extension, and the first extension is spaced apart from the fourth extension by one end away from the second extension.
本發明另揭露的電磁帶隙結構包含一過孔以及一訊號抑制板。訊號抑制板連接於過孔,且訊號抑制板具有二第一鏤空圖案與二第二鏤空圖案。二第一鏤空圖案以過孔為中心呈點對稱,且二第二鏤空圖案亦以過孔為中心呈點對稱。二第一鏤空圖案與二第二鏤空圖案圍繞著過孔交錯排列。二第一鏤空圖案各自具有相連的一第一L形槽道與一螺旋形槽道,且二第一L形槽道分別位於過孔的相對二側。二第二鏤空圖案各自具有相連的一第二L形槽道與一梳狀槽道,且二第二L形槽道分別位於過孔的另相對二側。The electromagnetic bandgap structure disclosed in the present invention comprises a via hole and a signal suppressing plate. The signal suppression board is connected to the via hole, and the signal suppression board has two first hollow patterns and two second hollow patterns. The first hollow pattern is point-symmetric centered on the via hole, and the second second hollow pattern is also point-symmetric centered on the via hole. The first first hollow pattern and the second second hollow pattern are staggered around the via. The first first hollow patterns each have a first L-shaped channel and a spiral channel, and the two first L-shaped channels are respectively located on opposite sides of the via. The second hollow patterns each have a second L-shaped channel and a comb channel, and the second L-shaped channels are respectively located on opposite sides of the via.
根據本發明所揭露的電磁帶隙結構與電路板,電路板的介電層內設置具有鏤空圖案的電磁帶隙結構以電性連接於導體層,並且鏤空圖案具有特定的幾何造型以阻擋特定雙頻段的訊號繼續傳輸,進而減少自干擾現象,達到減少雜訊擴散、輻射之效用。According to the electromagnetic band gap structure and the circuit board disclosed in the present invention, an electromagnetic band gap structure having a hollow pattern is disposed in the dielectric layer of the circuit board to be electrically connected to the conductor layer, and the hollow pattern has a specific geometric shape to block the specific double The signal of the frequency band continues to be transmitted, thereby reducing the self-interference phenomenon and reducing the effect of noise diffusion and radiation.
以上之關於本揭露內容之說明及以下之實施方式之說明係用以示範與解釋本發明之精神與原理,並且提供本發明之專利申請範圍更進一步之解釋。The above description of the disclosure and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.
以下在實施方式中詳細敘述本發明之詳細特徵以及優點,其內容足以使任何熟習相關技藝者瞭解本發明之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。以下之實施例進一步詳細說明本發明之觀點,但非以任何觀點限制本發明之範疇。The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.
請同時參照圖1至圖3。圖1為根據本發明第一實施例之電路板的立體示意圖。圖2為圖1之電路板的剖視示意圖。圖3為圖1之電路板中電磁帶隙結構之訊號抑制板的仰視示意圖。在本實施例中,電路板1包含一介電層10、一導體層20、一接地層30以及一電磁帶隙結構40。Please refer to FIG. 1 to FIG. 3 at the same time. 1 is a perspective view of a circuit board in accordance with a first embodiment of the present invention. 2 is a cross-sectional view of the circuit board of FIG. 1. 3 is a bottom view of the signal suppression plate of the electromagnetic bandgap structure in the circuit board of FIG. 1. In the present embodiment, the circuit board 1 includes a dielectric layer 10, a conductor layer 20, a ground layer 30, and an electromagnetic bandgap structure 40.
介電層10例如可以是電木板、玻璃纖維板或塑膠板,其具有相對的二表面110。導體層20設置於介電層10的其中一個表面110。導體層20例如但不限於金屬層,其包含多條微帶線(Microstrip),用於作為訊號走線以控制阻抗。接地層30設置於介電層10的另一個表面110,而使導體層20和接地層30分別位於介電層10的相對二側。The dielectric layer 10 can be, for example, an electric wood board, a fiberglass board, or a plastic board having opposing two surfaces 110. The conductor layer 20 is disposed on one of the surfaces 110 of the dielectric layer 10. The conductor layer 20 is, for example but not limited to, a metal layer comprising a plurality of microstrips for signal routing to control impedance. The ground layer 30 is disposed on the other surface 110 of the dielectric layer 10 such that the conductor layer 20 and the ground layer 30 are respectively located on opposite sides of the dielectric layer 10.
電磁帶隙結構40設置於介電層10內而位於導體層20之微帶線與接地層30之間。電磁帶隙結構40包含多個過孔410以及與過孔410數量對應的多個訊號抑制板420,但過孔410與訊號抑制板420之數量並非用以限制本發明。過孔410之相對二端分別電性連接於導體層20與訊號抑制板420。在本實施例中,過孔410為內側壁上鍍有金屬膜的穿孔,但本發明並不以此為限。在其他實施例中,過孔410為埋設於介電層10內的一實心金屬柱。The electrical tape gap structure 40 is disposed in the dielectric layer 10 between the microstrip line of the conductor layer 20 and the ground layer 30. The electrical tape gap structure 40 includes a plurality of vias 410 and a plurality of signal suppression plates 420 corresponding to the number of vias 410. However, the number of vias 410 and signal suppression plates 420 is not intended to limit the present invention. The opposite ends of the via hole 410 are electrically connected to the conductor layer 20 and the signal suppression plate 420, respectively. In the present embodiment, the via hole 410 is a through hole on which the metal film is plated on the inner sidewall, but the invention is not limited thereto. In other embodiments, the via 410 is a solid metal pillar embedded in the dielectric layer 10.
訊號抑制板420例如但不限於金屬板,其具有二個第一鏤空圖案421與二個第二鏤空圖案422。每個第一鏤空圖案421與第二鏤空圖案422皆貫穿訊號抑制板420。在本實施利中,由於每個訊號抑制板420具有相同的結構尺寸,故以下就其中一個訊號抑制板420詳細說明。The signal suppression plate 420 is, for example but not limited to, a metal plate having two first hollow patterns 421 and two second hollow patterns 422. Each of the first hollow pattern 421 and the second hollow pattern 422 runs through the signal suppression plate 420. In the present embodiment, since each of the signal suppression plates 420 has the same structural size, one of the signal suppression plates 420 will be described in detail below.
如圖3所示,訊號抑制板420的第一鏤空圖案421與第二鏤空圖案422圍繞著過孔410交錯排列。詳細來說,鏤空圖案是依照第一鏤空圖案421、第二鏤空圖案422、第一鏤空圖案421與第二鏤空圖案422的排列順序圍繞著過孔410。二第一鏤空圖案421以過孔410的中心軸411為中心呈點對稱分布。類似地,二第二鏤空圖案422也以過孔410的中心軸411為中心呈點對稱分布。As shown in FIG. 3, the first hollow pattern 421 and the second hollow pattern 422 of the signal suppression plate 420 are staggered around the via 410. In detail, the hollow pattern surrounds the via hole 410 in accordance with the arrangement order of the first hollow pattern 421 , the second hollow pattern 422 , the first hollow pattern 421 and the second hollow pattern 422 . The two first hollow patterns 421 are distributed point-symmetrically about the central axis 411 of the via 410. Similarly, the second second hollow patterns 422 are also distributed point-symmetrically about the central axis 411 of the via 410.
二第一鏤空圖案421各自具有相連的一第一L形槽道4211與一螺旋形槽道4212,且二個第一L形槽道4211分別位於過孔410的相對二側。螺旋形槽道4212與第一L形槽道4211的相連。在本實施例中,螺旋形槽道4212係與第一L形槽道4211的長邊相連,但本發明並不以此為限。在其他實施例中,螺旋形槽道4212係與第一L形槽道4211的短邊相連。此外,本實施例的二個第一鏤空圖案421皆為封閉迴圈,意即第一鏤空圖案421沒有經由任何缺口與訊號抑制板420的周邊423相連。The two first hollow patterns 421 each have a first L-shaped channel 4211 and a spiral channel 4212, and the two first L-shaped channels 4211 are respectively located on opposite sides of the via 410. The spiral channel 4212 is connected to the first L-shaped channel 4211. In the present embodiment, the spiral channel 4212 is connected to the long side of the first L-shaped channel 4211, but the invention is not limited thereto. In other embodiments, the spiral channel 4212 is coupled to the short side of the first L-shaped channel 4211. In addition, the two first hollow patterns 421 of the embodiment are all closed loops, that is, the first hollow pattern 421 is not connected to the periphery 423 of the signal suppression plate 420 via any gap.
二第二鏤空圖案422各自具有相連的一第二L形槽道4221與一梳狀槽道4222,且二個第二L形槽道4221分別位於過孔410的另相對二側,而使第一L形槽道4211與第二L形槽道4221共同包圍住過孔410。梳狀槽道4222與第二L形槽道4221相連,並且梳狀槽道4222具有一螺旋段4222a以及被螺旋段4222a圍繞的一分支段4222b。在本實施例中,梳狀槽道4222係與第二L形槽道4221的長邊相連,但本發明並不以此為限。在其他實施例中,梳狀槽道4222係與第二L形槽道4221的短邊相連。此外,本實施例的二個第二鏤空圖案422皆為非封閉迴圈,意即第二鏤空圖案422經由一缺口424與訊號抑制板420的周邊423相連。The second hollow patterns 422 each have a second L-shaped channel 4221 and a comb channel 4222, and the two second L-shaped channels 4221 are respectively located on opposite sides of the via 410. An L-shaped channel 4211 and a second L-shaped channel 4221 collectively surround the via 410. The comb channel 4222 is coupled to the second L-shaped channel 4221, and the comb channel 4222 has a spiral section 4222a and a branch section 4222b surrounded by the spiral section 4222a. In the present embodiment, the comb channel 4222 is connected to the long side of the second L-shaped channel 4221, but the invention is not limited thereto. In other embodiments, the comb channel 4222 is coupled to the short side of the second L-shaped channel 421. In addition, the two second hollow patterns 422 of the embodiment are all non-closed loops, that is, the second hollow pattern 422 is connected to the periphery 423 of the signal suppression board 420 via a notch 424.
藉由配置於介電層10中的電磁帶隙結構40,可以降低特定頻率信號的S21參數(饋入損失,S(2,1)),以阻擋此特定頻率信號於導體層20內傳輸完整性。進一步來說,電磁帶隙結構40能調整寄生電感與寄生電容,使得欲阻擋之頻率的整體頻寬增加,並且改變諧振頻率。可透過改變過孔410位置以及在訊號抑制板420上形成特定幾何造型的鏤空圖案以增加寄生電感。此外,還能透過訊號抑制板420的尺寸與鏤空圖案來調整寄生電容。以過孔410為中心呈點對稱分布的鏤空圖案能在鏤空圖案的相鄰處產生訊號共振點,進而實現雙頻段訊號的阻擋。藉此,電磁帶隙結構40有助於防止雜訊輻射或是沿著電源層擴散,進而減少自干擾現象。By the electromagnetic bandgap structure 40 disposed in the dielectric layer 10, the S21 parameter (feed loss, S(2, 1)) of the specific frequency signal can be reduced to block the transmission of the specific frequency signal in the conductor layer 20. Sex. Further, the electromagnetic bandgap structure 40 can adjust the parasitic inductance and the parasitic capacitance such that the overall bandwidth of the frequency to be blocked increases and the resonant frequency is changed. The parasitic inductance can be increased by changing the position of the via 410 and forming a hollow pattern of a particular geometric shape on the signal suppression plate 420. In addition, the parasitic capacitance can be adjusted by the size of the signal suppression board 420 and the hollow pattern. A hollow pattern with a point symmetry distribution around the via 410 can generate a signal resonance point adjacent to the hollow pattern, thereby achieving blocking of the dual band signal. Thereby, the electromagnetic bandgap structure 40 helps to prevent noise radiation or spread along the power layer, thereby reducing self-interference.
圖4為本發明第一實施例中S21參數對訊號頻率之關係圖。當在介電層10中設置圖3的電磁帶隙結構40時,可實現雙頻段訊號的阻絕效果,使得導體層20之微帶線當中頻段介於2.26 GHz(吉赫)至2.60 GHz之訊號的S21參數小於-30 dB(分貝),而其他頻段之訊號的S21參數維持在約-5 dB。這意味著,頻段介於2.26 GHz至2.60 GHz之訊號被電磁帶隙結構40阻擋而無法於微帶線內繼續傳輸,而其他頻段訊號大部分都能完整地於微帶線內傳輸。4 is a diagram showing the relationship between the S21 parameter and the signal frequency in the first embodiment of the present invention. When the electromagnetic bandgap structure 40 of FIG. 3 is disposed in the dielectric layer 10, the blocking effect of the dual-band signal can be achieved, so that the frequency band of the microstrip line of the conductor layer 20 is between 2.26 GHz (GHz) and 2.60 GHz. The S21 parameter is less than -30 dB (decibel), while the S21 parameter of the signal in other bands is maintained at approximately -5 dB. This means that signals with a frequency band between 2.26 GHz and 2.60 GHz are blocked by the electromagnetic bandgap structure 40 and cannot continue to be transmitted within the microstrip line, while most of the other band signals can be transmitted completely within the microstrip line.
本發明的電磁帶隙結構之訊號抑制板並不限於第一實施例所揭露的鏤空圖案。圖5為根據本發明第二實施例之電路板的立體示意圖。圖6為圖5之電路板中電磁帶隙結構之訊號抑制板的仰視示意圖。在本實施例中,電路板1”包含一介電層10、一導體層20、一接地層30以及設置於介電層10內的一電磁帶隙結構40”。介電層10、導體層20與接地層30的結構均與第一實施例的電路板1類似,故以下不再重覆說明。The signal suppression plate of the electromagnetic bandgap structure of the present invention is not limited to the hollow pattern disclosed in the first embodiment. Figure 5 is a perspective view of a circuit board in accordance with a second embodiment of the present invention. 6 is a bottom view of the signal suppression plate of the electromagnetic bandgap structure in the circuit board of FIG. 5. In the present embodiment, the circuit board 1 ′′ includes a dielectric layer 10 , a conductor layer 20 , a ground layer 30 , and an electromagnetic band gap structure 40 ′′ disposed in the dielectric layer 10 . The structures of the dielectric layer 10, the conductor layer 20, and the ground layer 30 are similar to those of the circuit board 1 of the first embodiment, and therefore will not be repeatedly described below.
電磁帶隙結構40”包含多個過孔410以及多個訊號抑制板420”,但過孔410與訊號抑制板420”之數量並非用以限制本發明。過孔410之相對二端分別電性連接於導體層20與訊號抑制板420。The electrical tape gap structure 40" includes a plurality of vias 410 and a plurality of signal suppression plates 420", but the number of vias 410 and signal suppression plates 420" is not intended to limit the invention. The opposite ends of the vias 410 are respectively electrically Connected to the conductor layer 20 and the signal suppression plate 420.
每個訊號抑制板420”各自具有二個鏤空圖案421”,且每個鏤空圖案421”皆貫穿訊號抑制板420”。在本實施利中,由於每個訊號抑制板420”具有相同的結構尺寸,故以下就其中一個訊號抑制板420”詳細說明。Each of the signal suppression plates 420" has two hollow patterns 421", and each of the hollow patterns 421" runs through the signal suppression plate 420". In the present embodiment, since each of the signal suppression plates 420" has the same structural size, one of the signal suppression plates 420" will be described in detail below.
如圖6所示,二個鏤空圖案421”以過孔410的中心軸411為中心呈點對稱分布。每個鏤空圖案421”各自具有圍繞過孔410的一第一L形槽道4211”與一第二L形槽道4212”。第一L形槽道4211”具有相連的一第一延伸段4211a”以及一第二延伸段4211b”,並且第一延伸段4211a”的寬度大於第二延伸段4211b”的寬度。第二L形槽道4212”具有相連的一第三延伸段4212a”、一第四延伸段4212b”以及一突出段4212c”,並且第三延伸段4212a”的寬度大於第四延伸段4212b”的寬度。較寬的第一延伸段4211a”與第三延伸段4212a”分別位於過孔410的相對二側,並且較細的第二延伸段4211b”與第四延伸段4212b”分別位於過孔410的另相對二側。第一L形槽道4211”的第二延伸段4211b”連接於第二L形槽道4212”的第三延伸段4212a”,並且第一延伸段4211a”遠離第二延伸段4211b”之一端與第四延伸段4212b”相間隔而形成一穿越區A。其中一個鏤空圖案421”的第一L形槽道4211”穿過穿越區A而被另一個鏤空圖案421”圍繞。第二L形槽道4212”的突出段4212c”連接於第四延伸段4212b”遠離第三延伸段4212a”之一端,並且突出段4212c”自第四延伸段4212b”朝遠離過孔410之方向延伸。As shown in FIG. 6, the two hollow patterns 421" are distributed point-symmetrically about the central axis 411 of the via 410. Each of the hollow patterns 421" has a first L-shaped channel 4211" surrounding the via 410 and A second L-shaped channel 4212". The first L-shaped channel 4211" has a first extension 4211a" and a second extension 4211b", and the width of the first extension 4211a" is greater than the width of the second extension 4211b". The channel 4212" has a third extension 4212a", a fourth extension 4212b" and a projection 4212c", and the width of the third extension 4212a" is greater than the width of the fourth extension 4212b". The first extension 4211a" and the third extension 4212a" are respectively located on opposite sides of the via 410, and the thinner second extension 4211b" and the fourth extension 4212b" are respectively located on the opposite side of the via 410. The second extension 4211b" of the first L-shaped channel 4211" is coupled to the third extension 4212a" of the second L-shaped channel 4212", and the first extension 4211a" is remote from the second extension 4211b" One end is spaced from the fourth extension 4212b" to form a crossing area A. The first L-shaped channel 4211" of one of the hollow patterns 421" passes through the crossing area A and is surrounded by another hollow pattern 421". The protruding section 4212c" of the second L-shaped channel 4212" is connected to the fourth extension 4212b One end away from the third extension 4212a, and the projection 4212c" extends from the fourth extension 4212b" away from the via 410.
此外,本實施例的每個訊號抑制板420”的周邊423”形狀皆為平行四邊形,並且每個訊號抑制板420”的二個鏤空圖案421”皆為封閉迴圈。進一步來說,本實施例中,鏤空圖案421”沒有經由任何缺口與訊號抑制板420”的周邊423”相連,並且周邊423”的任二相鄰側邊的夾角不為90度,意即周邊423”形狀並非正方形或長方形。In addition, the shape of the perimeter 423" of each of the signal suppression plates 420" of the present embodiment is a parallelogram, and the two hollow patterns 421" of each of the signal suppression plates 420" are closed loops. Further, in this embodiment, the hollow pattern 421" is not connected to the periphery 423" of the signal suppression plate 420" via any gap, and the angle between any two adjacent sides of the perimeter 423" is not 90 degrees, that is, the periphery The 423" shape is not square or rectangular.
藉由配置電磁帶隙結構40”,可以降低特定頻率信號的S21參數,以阻擋此特定頻率信號於導體層20內傳輸完整性。圖7為本發明第二實施例中S21參數對訊號頻率之關係圖。當在介電層10中設置圖6的電磁帶隙結構40”時可實現雙頻段訊號的阻絕效果,使得導體層20當中頻段介於2.26 GHz(吉赫)至2.59 GHz之訊號的S21參數小於-30 dB(分貝),而其他頻段之訊號的S21參數維持在約-5 dB。這意味著,頻段介於2.26 GHz至2.59 GHz之訊號被電磁帶隙結構40”阻擋而無法於導體層20內繼續傳輸,而其他頻段訊號大部分都能完整地於導體層20內傳輸。By configuring the electromagnetic bandgap structure 40", the S21 parameter of the specific frequency signal can be lowered to block the transmission integrity of the specific frequency signal in the conductor layer 20. Figure 7 is a S21 parameter versus signal frequency in the second embodiment of the present invention. The relationship between the dual-band signals can be achieved when the electromagnetic bandgap structure 40" of FIG. 6 is disposed in the dielectric layer 10, so that the frequency of the conductor layer 20 is between 2.26 GHz (GHz) and 2.59 GHz. The S21 parameter is less than -30 dB (decibel), while the S21 parameter of the signal in the other bands is maintained at approximately -5 dB. This means that signals with a frequency band between 2.26 GHz and 2.59 GHz are blocked by the electromagnetic bandgap structure 40" and cannot continue to be transmitted in the conductor layer 20, while most of the other frequency band signals can be transmitted completely within the conductor layer 20.
綜上所述,本發明所揭露的電路板以及電磁帶隙結構中,電路板的介電層內設置具有鏤空圖案的電磁帶隙結構以電性連接於導體層,並且鏤空圖案具有特定的幾何造型以阻擋特定雙頻段的訊號繼續傳輸,進而減少自干擾現象,達到減少雜訊擴散、輻射之效用。In summary, in the circuit board and the electromagnetic band gap structure disclosed in the present invention, an electromagnetic band gap structure having a hollow pattern is disposed in the dielectric layer of the circuit board to be electrically connected to the conductor layer, and the hollow pattern has a specific geometry. The styling prevents the transmission of specific dual-band signals, thereby reducing self-interference and reducing the effects of noise diffusion and radiation.
雖然本發明以前述之實施例揭露如上,然而這些實施例並非用以限定本發明。在不脫離本發明之精神和範圍內,所為之更動與潤飾,均屬本發明之專利保護範圍。關於本發明所界定之保護範圍請參考所附之申請專利範圍。Although the present invention has been disclosed above in the foregoing embodiments, these embodiments are not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.
1、1”‧‧‧電路板1, 1" ‧ ‧ circuit board
10‧‧‧介電層10‧‧‧Dielectric layer
110‧‧‧表面110‧‧‧ surface
20‧‧‧導體層20‧‧‧Conductor layer
30‧‧‧接地層30‧‧‧ Grounding layer
40、40”‧‧‧電磁帶隙結構40, 40" ‧ ‧ electromagnetic band gap structure
410‧‧‧過孔410‧‧‧through hole
411‧‧‧中心軸411‧‧‧ center axis
420、420”‧‧‧訊號抑制板420, 420"‧‧‧ signal suppression board
421‧‧‧第一鏤空圖案421‧‧‧ first openwork pattern
4211‧‧‧第一L形槽道4211‧‧‧First L-shaped channel
4212‧‧‧螺旋形槽道4212‧‧‧Spiral channel
422‧‧‧第二鏤空圖案422‧‧‧Second hollow pattern
4221‧‧‧第二L形槽道4221‧‧‧Second L-shaped channel
4222‧‧‧梳狀槽道4222‧‧‧Comb channel
4222a‧‧‧螺旋段4222a‧‧‧Spiral section
4222b‧‧‧分支段Section 4222b‧‧‧
423、423”‧‧‧周邊423, 423" ‧ ‧ surrounding
424‧‧‧缺口424‧‧‧ gap
421”‧‧‧鏤空圖案421"‧‧‧ hollow pattern
4211”‧‧‧第一L形槽道4211”‧‧‧First L-shaped channel
4212”‧‧‧第二L形槽道4212”‧‧‧Second L-shaped channel
4211a”‧‧‧第一延伸段4211a”‧‧‧First extension
4211b”‧‧‧第二延伸段4211b”‧‧‧Second extension
4212a”‧‧‧第三延伸段4212a”‧‧‧ third extension
4212b”‧‧‧第四延伸段4212b”‧‧‧4th extension
4212c”‧‧‧突出段4212c”‧‧‧High section
A‧‧‧穿越區A‧‧‧ crossing area
圖1為根據本發明第一實施例之電路板的立體示意圖。 圖2為圖1之電路板的剖視示意圖。 圖3為圖1之電路板中電磁帶隙結構之訊號抑制板的仰視示意圖。 圖4為本發明第一實施例中S21參數對訊號頻率之關係圖。 圖5為根據本發明第二實施例之電路板的立體示意圖。 圖6為圖5之電路板中電磁帶隙結構之訊號抑制板的仰視示意圖。 圖7為本發明第二實施例中S21參數對訊號頻率之關係圖。1 is a perspective view of a circuit board in accordance with a first embodiment of the present invention. 2 is a cross-sectional view of the circuit board of FIG. 1. 3 is a bottom view of the signal suppression plate of the electromagnetic bandgap structure in the circuit board of FIG. 1. 4 is a diagram showing the relationship between the S21 parameter and the signal frequency in the first embodiment of the present invention. Figure 5 is a perspective view of a circuit board in accordance with a second embodiment of the present invention. 6 is a bottom view of the signal suppression plate of the electromagnetic bandgap structure in the circuit board of FIG. 5. Figure 7 is a diagram showing the relationship between the S21 parameter and the signal frequency in the second embodiment of the present invention.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW106139451A TW201924515A (en) | 2017-11-15 | 2017-11-15 | Circuit board and electromagnetic band gap structure thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW106139451A TW201924515A (en) | 2017-11-15 | 2017-11-15 | Circuit board and electromagnetic band gap structure thereof |
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| Publication Number | Publication Date |
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| TW201924515A true TW201924515A (en) | 2019-06-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116130955A (en) * | 2021-11-12 | 2023-05-16 | 英业达科技有限公司 | Signal isolation device and improvement method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116130955A (en) * | 2021-11-12 | 2023-05-16 | 英业达科技有限公司 | Signal isolation device and improvement method thereof |
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