TW237563B - Process for static random access device - Google Patents

Abstract

A process for static random access device with buried layer structure includes the following steps: 1. forming N-type and P-type well area on the substrate, then growing one pad oxide and one mask to define the source/drain polysilicon trench, after removing the photoresist, then growing one oxide by thermal oxidation; 2. depositing the first polysilicon and etching it by etching back technology to remain proper thickness in the source/drain polysilicon trench, and the thickness depending on the factors from the side wall oxide area to the value of anti-leaking current; 3. removing oxide by wet etching to leave the side wall oxide persisted by the first polysilicon for preventing current leaking; 4. depositing the first polysilicon, doping and etching back until co-planar with the pad oxide, then removing the pad oxide; then conducting one mask to define the polysilicon gate trench and depositing SOG insulating layer; 5. with one pass transistor mask to expose the pass transistor area, then implanting the channel stop ion; removing the SOG insulating layer, then implanting the threshold voltage adjustable ion, then growing one gate oxide, after defining buried layer contact window through the mask, then removing the gate oxide; 6. depositing the second polysilicon and doping, then etching back until aligning with the substrate surface as the buried gate; 7. repeating one intermediate insulating layer and one mask to define the connecting contact window between the polysilicon load and gate, overlaying the third polysilicon, after photolithography and etching as resistance load.