TW312871B - - Google Patents
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- Publication number
- TW312871B TW312871B TW085107831A TW85107831A TW312871B TW 312871 B TW312871 B TW 312871B TW 085107831 A TW085107831 A TW 085107831A TW 85107831 A TW85107831 A TW 85107831A TW 312871 B TW312871 B TW 312871B
- Authority
- TW
- Taiwan
- Prior art keywords
- circuit
- clock
- output
- phase
- latch
- Prior art date
Links
- 230000000903 blocking effect Effects 0.000 claims description 2
- 230000001360 synchronised effect Effects 0.000 claims description 2
- 230000002079 cooperative effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 16
- 239000013078 crystal Substances 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 230000010363 phase shift Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 101100276976 Drosophila melanogaster Drak gene Proteins 0.000 description 1
- 206010041349 Somnolence Diseases 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- SYQBFIAQOQZEGI-UHFFFAOYSA-N osmium atom Chemical compound [Os] SYQBFIAQOQZEGI-UHFFFAOYSA-N 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 210000003462 vein Anatomy 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Manipulation Of Pulses (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7164257A JP2982659B2 (ja) | 1995-06-29 | 1995-06-29 | 位相検出回路 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW312871B true TW312871B (fr) | 1997-08-11 |
Family
ID=15789663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW085107831A TW312871B (fr) | 1995-06-29 | 1996-06-28 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2982659B2 (fr) |
| KR (1) | KR970003242A (fr) |
| TW (1) | TW312871B (fr) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3039464B2 (ja) * | 1997-07-31 | 2000-05-08 | 日本電気株式会社 | クロック発生回路 |
| JP2000183172A (ja) | 1998-12-16 | 2000-06-30 | Oki Micro Design Co Ltd | 半導体装置 |
| KR100303781B1 (ko) | 1998-12-30 | 2001-09-24 | 박종섭 | 레지스터 제어 디지털 디디엘에 있어서의 언록 문제를 해결하기위한 언록 보상회로를 갖는 디디엘 클럭 발생기 |
| JP4446070B2 (ja) * | 2000-04-11 | 2010-04-07 | エルピーダメモリ株式会社 | Dll回路、それを使用する半導体装置及び遅延制御方法 |
| JP4392678B2 (ja) | 2000-04-18 | 2010-01-06 | エルピーダメモリ株式会社 | Dll回路 |
| JP4573007B2 (ja) | 2000-07-13 | 2010-11-04 | エルピーダメモリ株式会社 | Dll回路、及び、dll制御方法 |
| KR100422572B1 (ko) | 2001-06-30 | 2004-03-12 | 주식회사 하이닉스반도체 | 레지스터 제어 지연고정루프 및 그를 구비한 반도체 소자 |
| JP4558458B2 (ja) * | 2004-11-25 | 2010-10-06 | 三菱電機株式会社 | 位相同期回路 |
| JP5641697B2 (ja) * | 2009-02-12 | 2014-12-17 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | クロック制御回路及びこれを備える半導体装置 |
| US9069652B2 (en) * | 2013-03-01 | 2015-06-30 | Arm Limited | Integrated level shifting latch circuit and method of operation of such a latch circuit |
-
1995
- 1995-06-29 JP JP7164257A patent/JP2982659B2/ja not_active Expired - Fee Related
-
1996
- 1996-06-28 TW TW085107831A patent/TW312871B/zh not_active IP Right Cessation
- 1996-06-28 KR KR1019960024832A patent/KR970003242A/ko not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0917179A (ja) | 1997-01-17 |
| JP2982659B2 (ja) | 1999-11-29 |
| KR970003242A (ko) | 1997-01-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |