TW368732B - Manufacturing method for integrated circuit dual damascene - Google Patents
Manufacturing method for integrated circuit dual damasceneInfo
- Publication number
- TW368732B TW368732B TW087103803A TW87103803A TW368732B TW 368732 B TW368732 B TW 368732B TW 087103803 A TW087103803 A TW 087103803A TW 87103803 A TW87103803 A TW 87103803A TW 368732 B TW368732 B TW 368732B
- Authority
- TW
- Taiwan
- Prior art keywords
- dielectric
- dual damascene
- photoresistant
- manufacturing
- layer
- Prior art date
Links
- 230000009977 dual effect Effects 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 abstract 5
- 238000001312 dry etching Methods 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 2
- 238000000206 photolithography Methods 0.000 abstract 2
- 230000003667 anti-reflective effect Effects 0.000 abstract 1
- 238000000151 deposition Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention relates to a manufacturing method for dual damascene which can reduce the photolithography process steps and increase the precision. The method includes: providing a substrate with dielectric insulation layer which comprises a first dielectric, a second dielectric and a dielectric intermediate layer; depositing two photoresistant layers with water-soluble anti-reflective layer in the middle on the dielectric insulation layer; employing single photolithography process and dry etching to accomplish dual damascene structure. The process includes: defining the connection pattern of the second photoresistant; then, defining the contact pattern of the first photoresistant layer; employing twice dry etching process to transfer the connection pattern onto the first dielectric and transfer the contact pattern onto the second dielectric at the same time; removing photoresistant and filling out the connection pattern and contact pattern with metal and accomplish the dual damascene structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW087103803A TW368732B (en) | 1998-03-13 | 1998-03-13 | Manufacturing method for integrated circuit dual damascene |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW087103803A TW368732B (en) | 1998-03-13 | 1998-03-13 | Manufacturing method for integrated circuit dual damascene |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW368732B true TW368732B (en) | 1999-09-01 |
Family
ID=57941362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW087103803A TW368732B (en) | 1998-03-13 | 1998-03-13 | Manufacturing method for integrated circuit dual damascene |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW368732B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6821896B1 (en) | 2001-05-31 | 2004-11-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method to eliminate via poison effect |
| US6946391B2 (en) | 2003-09-08 | 2005-09-20 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for forming dual damascenes |
| TWI397108B (en) * | 2006-09-22 | 2013-05-21 | 東京威力科創股份有限公司 | Dual graphic method for developable anti-reflective coating |
-
1998
- 1998-03-13 TW TW087103803A patent/TW368732B/en not_active IP Right Cessation
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6821896B1 (en) | 2001-05-31 | 2004-11-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method to eliminate via poison effect |
| US6946391B2 (en) | 2003-09-08 | 2005-09-20 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for forming dual damascenes |
| TWI397108B (en) * | 2006-09-22 | 2013-05-21 | 東京威力科創股份有限公司 | Dual graphic method for developable anti-reflective coating |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |