五、發明说明（ Λ7 15? 經濟部中央標球局tEC工消贽合作社印t 發明領域： 本發明與一種半導體封裝有關，特別是一種可以增進 散熱效果的半導體封裝，並揭露一種散熱片（heat sink) 與模穴（cavity)之接合方式的半導體封裝。發明眢箦： 隨著丰導體技術之快速演進’電子產品在輕薄短小、 多功能速度快之趨勢的推動下，使得構裝元件的引腳數亦 隨之越來越多，速度的要求亦越來越快，因此，封裝元件 消耗功率越來越高，表示積體電路元件產熱越多，也就是 會達到較高的溫度，所以封裝結構的一項重要目的，就是 要能幫助晶片散去產生的高熱°然而晶片正上方與正下方 的區域是散熱最關鑑的地方，此區域的最佳利用則是確保 優異散熱效能之鑰。使用散熱片（heat s〖nk)取代晶片貼合 墊（die attach pad)，最能改善散熱效能。可以將一外部的 散熱片（heat sink)直接貼在晶片背面’大部分的熱會從這 裡散逸出去。因此為了獲得更好的散熱效果*亦即擁有較 低的熱阻抗，除了在選擇黏著劑、導線架、電鍍層、基板 時，應選擇熱傳導系數較大的材質外’在晶片背面貼上散 熱片（heat sink)，直接將熱傳到周圍的氣流，是處理散熱 方式的較佳選擇。最常用的增進散熱之半導體封裝如第」 圖所示，晶片2 2與基板2 0之間之電性連結主要利用信號 傳遞裝置26,通常利用複數根導電線如金線銲著於晶片22 之上，以具有電性通道分佈於基板之上，通常電性通道之 本紙張尺度璉凋中周國家摞準（CRS ) /⑷見松（2)0X2W,:.>^ ) 請k. 閲 背 面 之 ί主 再 寫 本 頁 裴 訂 線 ...1:08455.:.一、 - :... Λ7 _-______137 五、發明説明（） - 末端與附有導體球陣列28(BGA)之導體板連接，通常利用 焊接H(solder balls)28做為訊號之傳遞。焊接錫珠 (solder bal Is )陣列28利用習知之植球技術將焊接锡珠 形成於基板20之下表面上》在晶片22、基板20與一散熱 片（heat sink)32間則以絕緣封裝體30加以覆蓋，可以利用 封膠技術或液態¥膠技，來製作-一。…習m:—封_裝~11—構 一裝置位於晶片上之散熱片（heat sink)32，上述之散熱片 (heat sink)3 2可以與基板20接觸或不接觸。此外，散熱元 件之頂部將曝露於絕緣封裝體30之外以增進散熱效率， 藉由散熱元件32可以將晶片產生之熱傳導至封裝體之 外。此封裝結構利於增進散熱的提升，但是為更增進散熱 效率及提高散熱鑄模系統之自動化生產，以節省成本迎合 市場的接受性，本發明提出一種可以增進散熱效果之半導 體封裝。 發明目油及概述： 鑒於上述之發明背景中，傳統增進散熱效果的封裝方 法是將散熱片（heat sink)置於晶片之上（如第2圖所示）， 經濟部中央標丨局只工消费合作社印裝 其中晶片22、基板20與一散熱片（heat sink)32間則以絕 緣封裝體3 0加以覆蓋，可以利用封膠技術或液態封膠技 術來製作-此散熱片經由鑄模系統（molding system)挾 起，藉由精確之定位裝置，放置於晶片之上，再由模穴 (cavity)壓合覆蓋。 本發明的目的在於經由鑄模系統（molding system)挾 本紙张尺度適用中國國家橾率（cns )以叱枋（2ΐ〇χ297ϋ7 經消部中央標準局员工消费合作社印裝 ....-*·Γ"ΙΡ·· . - . -..: Λ，.一 .，.. /A^···»·, .· «―*·^. ....... * * * * * - " --- --,. . _ _,_ 一 _ ... ..··_·. * ·· · 二，.， · . 408455"..—…Λ7 ______117 五、發明説明（） — 起之散熱片（heat sink)，精確放置於晶片之上，其散熱片 (heat sink)之高度高於模穴（cavi ty)壓合覆蓋後之高 度’藉由模穴（cavity)壓合覆蓋之壓力貼合於散熱片 (heat sink)之上，使其固定再經封膠技術予以封合使 化（cure ) 〇 根據以上所述之目的’本發明提供了一種散熱禱模系 統之半導體封裝。 ' 明式簡覃說明： 本發明的較佳實施例將於往後之說明文字中辅以下列 圖形做更詳細的闡述： 第1圖為傳統封裝之截面圖β 第2圖為本發明之較佳實施例之截面圖。 第3a圖至第3f圖為.本發明之較佳實施例組裝之戴面 圖。 第4圖為本發明之較佳實施例之散熱片與模穴高度比 較之截面圖》* 發明详細說明： 本發明揭露一種散熱鑄模系統之半導體封裝，首先， 參閱第2圖，此封裝包含有一基板2〇'晶片22貼於其上、 晶片22與基板20之間之電性連結主要利用信號傳遞裝 置26，通常利用複數根導電線如金線銲著於晶片22之 本紙張尺颇财（咖丨 {請先閲讀背面之注意事项-r艰湾本頁) -裳. 線. 408455 Α7 ____ _____Β7 五、發明説明（）V. Description of the invention (Λ7 15? TEC Industrial and Commercial Cooperative Cooperative Association of the Ministry of Economic Affairs) Field of the invention: The present invention relates to a semiconductor package, particularly a semiconductor package that can improve the heat dissipation effect, and discloses a heat sink (heat A semiconductor package with a sink) and a cavity connection. Invention 眢 箦: With the rapid evolution of abundant conductor technology, electronic products are driven by the trend of light, thin, short, and multifunctional speeds, making the introduction of structured components The number of pins is increasing, and the speed requirements are becoming faster and faster. Therefore, the power consumption of packaged components is getting higher and higher, which means that the more heat generated by integrated circuit components, that is, the higher temperature will be reached, so An important purpose of the package structure is to help the chip dissipate the high heat generated. However, the area directly above and below the chip is the most important place for heat dissipation. The best use of this area is to ensure the key to excellent heat dissipation performance. The use of heat sinks (nk) instead of die attach pads can best improve the heat dissipation performance. An external heat sink (heat s ink) directly attached to the back of the chip. 'Most of the heat will be dissipated from here. Therefore, in order to obtain better heat dissipation effect *, that is, it has a lower thermal resistance, except when selecting adhesives, lead frames, plating layers, and substrates. It is better to choose a material with a larger thermal conductivity and attach a heat sink on the back of the chip to directly transfer heat to the surrounding airflow. This is a better choice for heat dissipation methods. The most commonly used semiconductor packages that improve heat dissipation are As shown in the figure, the electrical connection between the wafer 22 and the substrate 20 mainly uses the signal transmission device 26, and usually a plurality of conductive wires such as gold wires are welded on the wafer 22 to have electrical channels distributed on On the substrate, the paper size of the electrical channel is usually in accordance with the National Standards of China (CRS) / See Jiansong (2) 0X2W,:. ≫ ^) Please k. Please read the master on the back and write this page again Ordering ... 1: 08455.:. I.-: ... Λ7 _-______ 137 V. Description of the invention ()-The end is connected to the conductor plate with the conductor ball array 28 (BGA), usually by welding H ( solder balls) 28 are used for signal transmission. Solder bal is array 28 uses solder ball technology to form solder balls on the lower surface of substrate 20. An insulating package is used between wafer 22, substrate 20 and a heat sink 32. 30 to cover, you can use sealing technology or liquid ¥ glue technology to make-one. ... Xi m: —encapsulation_installation ~ 11—constructs a heat sink 32 on the wafer. The heat sink 32 can be in contact with the substrate 20 or not. In addition, the top of the heat dissipation element will be exposed to the outside of the insulating package 30 to improve heat dissipation efficiency, and the heat generated by the chip can be conducted to the outside of the package by the heat dissipation element 32. This packaging structure is conducive to the improvement of heat dissipation, but in order to further improve the heat dissipation efficiency and improve the automatic production of the heat dissipation mold system to save costs and meet the market acceptance, the present invention proposes a semiconductor package that can improve the heat dissipation effect. SUMMARY OF THE INVENTION In view of the above background of the invention, the traditional packaging method for improving the heat dissipation effect is to place a heat sink on the chip (as shown in Figure 2). The consumer cooperative prints the space between the chip 22, the substrate 20 and a heat sink 32 covered with an insulating package 30, which can be produced by using sealing technology or liquid sealing technology-this heat sink is passed through a mold system ( The molding system is lifted up, placed on the wafer by a precise positioning device, and then covered by a cavity. The purpose of the present invention is to apply the Chinese national standard (cns) to the paper size through a molding system (2ΐ〇χ297ϋ7) printed by the Consumer Cooperative of the Central Standard Bureau of the Ministry of Consumer Affairs ... ; IP ... ; ----,.. _ _, _ 一 _ ... .. ·· _ ·. * ·· · Two,., ·. The heat sink is placed precisely on the chip, and the height of the heat sink is higher than the height of the cavity after the press-capped cover is covered by the press-capped cavity. The pressure is attached to a heat sink, which is fixed and then sealed by a sealant technology. According to the purpose described above, the present invention provides a semiconductor package for a heat dissipation prayer system. ”Explanation of the simple and clear form: The preferred embodiment of the present invention will be explained in more detail in the following explanatory text with the following figures: Figure 1 is a cross-sectional view of a traditional package β Figure 2 is a diagram of the present invention Compare Sectional view of the embodiment. Figures 3a to 3f are surface views of the assembly of the preferred embodiment of the present invention. Figure 4 is a sectional view of the height comparison between the heat sink and the cavity of the preferred embodiment of the present invention. 》 * Detailed description of the invention: The present invention discloses a semiconductor package for a heat-dissipating mold system. First, referring to FIG. 2, this package includes a substrate 20 ′ wafer 22 attached to it, and the electrical properties between the wafer 22 and the substrate 20. The connection mainly uses the signal transmission device 26, and usually a plurality of conductive wires such as gold wires are welded to the paper ruler of the chip 22 (Ca 丨 {Please read the precautions on the back-r difficult bay page)-clothes. 408455 Α7 ____ _____ Β7 V. Description of the invention ()
訂· 上’以具有電彳i通道分佈於基板之上，通常電性通道之 末端與附有導體球陣列28 (BGA)之導體板連接，通常利用 烊接錫珠（solder balls)28做為訊號之傳遞。再由自動 化鱗模系統’藉由機械手臂挾取散熱片（heat sink)32位於 晶片之上’由於具有精確之定位裝置，使能夠精確地將 散熱片（heat sink:)32放置於晶片之上》此外，散#片（heat sink)32利用熱阻較低之材質製作，例如金屬或》》金。晶 片22與散熱片（heat sink)32之間並無任何之黏著物質， 僅精確地貼合著，再由模穴（cavi ty)壓合覆蓋，藉由壓 合覆蓋的力量固定其密合度’使其木致偏離，壓合覆蓋 後之高度38低於壓合覆蓋前散熱片（heat sink)32之高度 36(如第4圖所示）’亦即，利用，模穴（cavity)壓合覆蓋 之力，向下施以壓力，使散熱片（heat sink)32更緊密貼合 於晶片2 2上’具有強行麗制（c 1 amp )之效果。其中晶片 22、基板20與一散熱片（heat sink) 32間則以絕緣封裝體 3 0加以覆蓋’可以利用封膠技術或液態封膠技術來完 成，使其硬化（cure ) > 本發明實施例之製作流程如第3 a圖至第3 f圖所 示。首先，參考第3a圖，晶片22與基板20之間以晶片 黏合物質24加以固定，使晶片22完成黏著於基板之上。 經濟部中央標卒局負工消费合作社印焚 參考第3b圖’晶片22與基板20之間之電性連結主 要利用信號傳遞裝置2 6，通常利用複數根導電線如金線 銲著於晶片22之上，一般而言，基板20具有電性通道 分佈於基板之上。 本紙张尺度適用中國國家標準（CNS M4规捎（210χ2ϋ)ΓΤ 408455 Λ7 Β7 五、 發明説明（ 參考第3c圖，由自動化鑄模系統，藉由機械手臂34 挾取散熱片（heat sink)32位於晶片之上’由於具有精確之 定位裝置（圖未顯示），使能夠精確地將散熱片（heat sink)32放置於晶片之上。 參考第3d圖，再由模穴_(cavity)愿合覆蓋，藉由壓 合覆蓋的力量固定其密合度，使其不致偏離，壓合覆蓋 後之高度38低於壓合覆蓋前散熱片（heat sink)32之高度 36(如第4圖所示），亦即，利用模穴（cavity)壓合覆蓋 之力，向下施以壓力，使散熱片（heat sink)32更緊密貼合 於晶片2 2上，具有強行壓制（c 1 amp )之效果。其中晶片 22、基板20與一散熱片（heat sink)32間則以絕緣封裝體 3 〇加以覆蓋，可以利用封膠技術或液態封膠技術來完 成’使其硬化（cure)。 參考第3e圖，將基板20翻轉進行植球步驟，利用 烊接錫珠（solder balls)28做為訊號之傳遞。完成最後 之結果如第3f圖所示。 以上所述僅為本發明之較佳實施例而已，並非用以限 定本發明之申請專利範圍；凡其它未脫離本發明所揭示之 精神下所完成之等效改變或修飾，均應包含在下述之申請 專利範圍内。 (諳先間讀背面之注意事項-S球寫本頁) .裝. 訂 .11 線 經濟部中央標窣局®;工消f合作社印製 本纸掁尺度適用中囷國家榡孪（CNS } 規梢（210ΧΜ7ϋIt is distributed on the substrate with electrical channels, and the ends of the electrical channels are usually connected to the conductor plate with a conductive ball array 28 (BGA). Solder balls 28 are usually used as The transmission of signals. Then the automated scale mold system 'takes the heat sink 32 on the wafer by the robot arm'. With the accurate positioning device, it can accurately place the heat sink 32 on the wafer. In addition, the heat sink 32 is made of a material with low thermal resistance, such as metal or gold. There is no adhesive substance between the chip 22 and the heat sink 32, and it is only accurately adhered, and then it is covered by a press-fit cavity (cavi ty), and its closeness is fixed by the force of the press-over cover ' Make it deviate from the wood, and the height 38 after the pressing and covering is lower than the height 36 (shown in FIG. 4) of the heat sink 32 before the pressing and covering (that is, using the cavity pressing) The force of the covering exerts pressure downward to make the heat sink 32 more closely adhere to the chip 22, which has the effect of forcibly making (c 1 amp). Among them, the wafer 22, the substrate 20 and a heat sink 32 are covered with an insulating package 30, which can be completed by using a sealant technology or a liquid sealant technology to cure it (Cure) > The present invention is implemented The manufacturing process of the example is shown in Figures 3a to 3f. First, referring to FIG. 3a, the wafer 22 and the substrate 20 are fixed with a wafer adhesive substance 24, so that the wafer 22 is completely adhered to the substrate. The central government bureau of the Ministry of Economic Affairs and the Consumers' Cooperative printed the reference to Figure 3b. The electrical connection between the chip 22 and the substrate 20 is mainly using the signal transmission device 26, and usually a plurality of conductive wires such as gold wires are bonded to the chip 22 Above, in general, the substrate 20 has electrical channels distributed on the substrate. This paper scale applies Chinese national standard (CNS M4 Regulation (210x2ϋ) ΓΤ 408455 Λ7 Β7 V. Description of the invention (refer to Figure 3c, the automatic mold system, through the robot arm 34, the heat sink 32 is located on the chip The above has a precise positioning device (not shown in the figure), so that the heat sink 32 can be accurately placed on the wafer. Referring to FIG. 3d, the cavity is covered by the cavity. The tightness of the cover is fixed by the force of the cover, so that it will not deviate. The height 38 after the cover is lower than the height 36 of the heat sink 32 before the cover (as shown in Figure 4). That is, the pressure of the cavity is used to press and cover the pressure, and downward pressure is applied to make the heat sink 32 more closely adhere to the wafer 22, which has the effect of forced pressing (c 1 amp). The chip 22, the substrate 20, and a heat sink 32 are covered with an insulating package 30, which can be completed by using a sealant technology or a liquid sealant technology to make it cure. Referring to FIG. 3e, Turn the substrate 20 over for the ball-planting step The solder ball 28 (solder balls) is used as the signal transmission. The final result is shown in Figure 3f. The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of patent application of the present invention. ; All other equivalent changes or modifications made without departing from the spirit disclosed in the present invention should be included in the scope of patent application below. (谙 Please read the precautions on the back-S ball write this page). Order .11 Central Bureau of Standards of the Ministry of Economic Affairs®; printed on paper produced by the Industrial Cooperative Cooperative, the standard applicable to China (China) (CNS) regulations (210 × 7)