456143 A7 B7 五、發明說明（1 ) 發明背景 本發明乃關於一種使用交換電容器電路而可處理 CCD彩色影像感應器與CIS彩色影像感應器兩者之輸 出的影像感應器介面電路。 爲將影像感應器的類比資訊數位化，吾人需要一類比 信號處理電路，俾於一類比/數位轉換器與影像感應器之 間執行減低噪音與增益控制。在以往，這是以一取樣/保 持電路、一可程式增益放大器等製造的.，如圖6之範例所 示。 有兩種類型的影像感應器可將光學信號轉換爲電信號 ，一種是C CD影像感應器，另一種是C I S影像感應器 ，但這兩種感應器的輸出信號彼此相反。 換句話說，對C C D影像感應器的輸出信號而言（如 圖7所示），在響應光強度增加時，信號在從某一偏移位 準（通常大於5伏特）到地電位的負方向上會變得較大。 另一方面，對一 C I S影像感應器而言，如圖1 2所示， 在響應光強度增加時，信號在從地電位（0伏特）開始的 正方向上會變得較大。 因此，由於輸出信號的形式視影像感應器的類型而異 ，在以往，吾人難以實現可以處理C C D影像感應器與 CIS影像感應器兩者的類比信號處理電路。以往吾人需 要應用特別供某一類型的感應器使用的電路配置，或使用 一類比多工器（MPX)來切換信號路徑，使其通過或不 通過位準移位電路，如圖7所示。 請 先 間 讀 背. 面 之 注 意· 事 項 再 r I 本 頁 裝 訂 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -4- 456143 A7 B7 五、發明說明（2 ) 發明之槪述 {請先閱讀背面之注東事項再疒本頁) 難以實現可處理上述兩種感應器類型的信號處理電路 的理由，是因爲除了因爲這兩種影像感應器完全不同的直 流位準而需要不同的類比預處理之外，由於這兩種信號彼 此相反，吾人尙需將某一信號反相，亦需使直流位準均勻 0 換句話說，從兩信號之信號處理的觀點來說’直流位 準的處理方法如下：在c C D影像感應器的情況下’爲直 流再生，在C I S影像感應器的情況下，則爲直流移位。 此差異起源於來自兩種影像感應器類型的信號位準彼此完 全不同 <=來自C CD影像感應器的信號具有一通常大於5 伏特的直流偏移電壓。由於信號必須使用電容性耦合輸入 至半導體積體電路，而該電路的電源供應電壓一般而言爲 5伏特或更低，因此必須使用箝位器，使類比信號處理電 路端上的直流位準不會起伏。 經濟部智慧財產局員工消費合作社印製 另一方面，對C I S影像感應器而言，信號是由地電 位（0伏特）往上，故可將信號直接輸入電源供應電壓爲 5伏特或更低的半導體積體電路內。然而，正常的類比電 路無法在地電位附位的類比信號，因此需要直流移位，俾 將信號設定於類比電路可處理的動態範圍內。 再者，對來自兩種影像感應器類型的信號而言，即使 在信號已經過箝位或直流移位的預處理之後，信號仍然彼 此相反。因此，爲以同一個可程式增益放大器處理兩種信 -5- 本紙張尺度適用中0國家標準（CNS)A4規格（210 X 297公釐> 經濟部智慧財產局員工消費合作社印製 456 彳 43 A7 ____B7_ 五、發明說明（3 ) 號，需要將某一信號反相，俾使偏移位準相等。若偏移位 準不均勻，與可程式增益放大器之地電位的差異會被放大 ，且即使信號強度爲零，因響應其存在，也會發生操作錯 誤。 本發明的目標爲提供一種影像感應器介面電路，其可 以單一電路處理CCD彩色影像感應器和CIS彩色影像 感應器兩者的信號。 根據本發明，吾人建造一類比信號處理電路，它使用 一個利用信號取樣-保持、位準移位及位準反相功能的交 換電容器電路，而可應用於經由同一信號路徑的c C D彩 色影像感應器與CIS彩色影像感應器兩者。透過此電路 ，C CD彩色影像感應器與C I S彩色影像感應器的輸出 均可以一個電路處理。 根據本發明，吾人提議一影像感應器介面，其特性爲 包含：一第一交換電容器電路，其響應c CD及C I S之 三個R G B彩色輸出信號及至少一位準位移電壓，而對每 一個R G B彩色輸出信號於預定的時鐘時序執行取樣保持 ，•一第二交換電容器電路，其響應第一交換電容器電路的 輸出（對應於三個RGB彩色輸出信號中的每一個），而 對每一輸出信號執行取樣-保持，此係由第二個眾多時鐘 信號所控制；以及一第三交換電容器電路，由第三個眾多 的時鐘信號所控制，以響應第二交換電容器電路的每一個 輸出。第三交換電容器電路具有一功能，可在第二交換電 容器電路的每一輸出沿類比地電位的位準反相，以及第二 H ϋ ι* ϋ .^1 n I * ϋ n n I 1 n t {請先閱讀"面之注t事項再浐k本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -6- 經濟部智慧財產局員工消費合作社印製 456143 A7 B7 五、發明說明（4 ) 交換電容器電路之每一輸出的前向輸出之間切換，視第三 個眾多時鐘信號而定。 有此結構之後，當C C D彩色影像感應器的輸出信號 被輸入時，即由第一與第二交換電容器電路執行取樣-保 持，且信號由第三交換電容器電路反相。在C I S彩色影 像感應器的輸出信號被輸入的情況下，則由第一交換電容 器電路執行取樣-保持及直流位準移位，並由第二與第三 交換電容器電路執行取樣-保持。 > 亦根據本發明，吾人提議一影像感應器介面電路，其 包含：一第一交換電容器電路，其響應C CD及C I S之 三個R G B彩色輸出信號及至少一位準位移電壓，而對每 一個R G B彩色輸出信號於預定的時鐘時序執行取樣保持 :一第二交換電容器電路，其響應第一交換電容器電路的 輸出（對應於三個RGB彩色輸出信號中的每一個），而 對每一輸出信號執行取樣-保持，此係由第二個眾多時鐘 信號所控制：以及一第三交換電容器電路，由第三個眾多 的時鐘信號所控制，以響應第二交換電容器電路的每一個 輸出。第三交換電容器電路具有一功能，可在應第二交換 電容器電路的每一輸出沿類比地電位的位準反相，以及第 二交換電容器電路之每一输出的前向輸出之間切換，視第 三個眾多時鐘信號而定：一具由第四個眾多時鐘信號控制 的類比多工器，以響應對應於第三交換電容器電路之 RGB彩色的三個輸出，用於根據第四個眾多時鐘信號， 以選擇並輸出對應於三個R G B彩色之輸出的其中之一； 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） - - ----I--III---· 11 I---I ^ ·111111 — ί請先閱讀背面之注意事項再炉K本頁) 經濟部智慧財產局員工消费合作社印製 4561 43 A7 B7 五、發明說明（5 ) 一可程式增益放大器，其響應類比多工器的輸出與預先決 定的數位資料，將類比多工器的輸出與一預定的參考位準 (根據數位資料）之間的差距放大；以及一類比/數位轉 換器，用於透過一緩衝放大器，將可程式增益放大器的輸 出轉換爲數位資料。接下來可由至少一類比/數位轉換器 輸出移位電壓。再者，亦可有一種結構，其中類比/數位 轉換器的電壓位準輸出係根據以類比/數位轉換器資料爲 基礎而計算出來的數位資料而決定。、 亦根據本發明，吾人建議如申請專利範圍第3項提出 的影像感應器介面電路，其中：類比/數位轉換器爲一備 有差動輸入端點的類比/數位轉換器，且其響應兩信號， 將兩信號的電壓差轉換爲數位資料；一第一電阻性元件連 接至緩衝放大器的輸出端；第一電阻性元件的另一端與一 第一電容器一同連接至類比/數位轉換器之差動輸入端點 的第一端點：一第二電阻性元件（其電阻等於第一電阻性 元件），與一第二電容器（其電容値等於第一電容器）一 同連接至類比/數位轉換器之差動輸入端點的第二端點； 且第二電阻性元件的另一端連接至提供給類比/數位轉換 器的兩參考電壓其中之一。 附圖的簡短說明 圖1爲顯示本發明之範例實施例中之影像感應器介面 電路的方塊圖。 圖2爲圖1之第一交換電容器電路、第二交換電容器 ---— lllllllli — — — — — — II « — — — — — — It (請先閱讀背面之注"事項再Γ本頁) 本紙張又度適用中國國家標準（CNS)A4規格（210 X 297公釐） -8 - 4561 43 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（6 ) 電路、與第三交換電容器電路電路的詳細電路圖，用於處 理C C D彩色影像感應器的輸出信號。 圖3爲圖2中所示之電路每一部份的信號波形圖，以 說明其操作。 圖4爲圖1之第一交換電容器電路，第二交換電容器 電路，與第三交換電容器電路電路的詳細電路圖，用於處 理CIS彩色影像感應器的輸出信號。 圖5爲圖4中所示之電路每一部份的信號波形圖，以 說明其操作。 圖6爲一方塊圖，顯示傳統影像感應器介面電路的範 例。 圖7爲一顯示C C D彩色影像感應器之輸出信號波形 的範例。 圖8爲一顯示CIS彩色影像感應器之輸出信號波形 的範例。 圖9爲圖1之第一交換電容器電路、第二交換電容器 電路、與第三交換電容器電路電路的詳細電路圖，用於處 理C C D彩色影像感應器的輸出信號。 圖1 0爲圖9中所示之電路每一部份的信號波形圖， 以說明其操作。 圖1 1爲圖9中所示之電路每一部份的信號波形圖， 以說明其操作。 圖12爲圖1之第一交換電容器電路，第二交換電容 器電路，與第三交換電容器電路電路的詳細電路圖，用於 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公 — — — — — — — —---- 裝------ 訂---------線 (請先間讀背面之注免事項再沪、本頁) A7 B7 456143 玉、發明說明（7 ) 處理C I S彩色影像感應器的輸出信號。 圖1 3爲圖1 2中所示之電路每一部份的信號波形圖 ，以說明其操作。 圖1 4爲圖1 2中所示之電路每一部份的信號波形圖 ，以說明其操作。 較佳實施例的說明 圖1爲一方塊圖，顯示根據本發明之影像感應器介面 電路的第一示範實施例。影像感應器介面電路1爲一可處 理CCD彩色影像感應器或CIS彩色影像感應器之輸出 的影像感應器介面電路，且備有一第一交換電容器電路， 一第二交換電容器電路，以及一第三交換電容器電路。 第一交換電容器電路2響應C C D彩色影像感應器或 CIS彩色影像感應器的三個RGB彩色輸出信號及一移 位電壓，俾於預先決定的時鐘時序對輸出信號進行取樣-保持。第二交換電容器電路3再對第一交換電容器電路2 的輸出信號進行取樣-保持。第三交換電容器電路4係於 必要時，沿類比地電位對第二交換電容器電路3的輸出進 行位準反相。 圖2顯示第一交換電容器電路2，第二交換電容器電 路3及第三交換電容器電路4的一特殊範例，來自CCD 彩色影像感應器的信號即在此處理。爲簡單起見，圖中只 顯示處理C C D彩色影像感應器之R G B彩色信號輸出中 R信號的電路。處理其他G與B兩信號的電路，其差異僅 --------------------I--« — — — — —II <請先閱讀背面之注奮事項再产"本頁) 經濟部智慧財產局員工消費合作社印*'1^ +纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -10- 經濟部智慧財產局員工消費合作社印製 456143 五、發明說明（8 ) 在於控制時鐘信號的時序（將於稍後顯示），電路配置則 完全相同。第一交換電容器電路2係將運算放大器2 1 ， 電容器2 2至2 4，以及取樣開關2 5至2 9連接而成， 如圖2所示。開關2 5至2 9係由時鐘信號SAMP L E 20K及XSAMPLE2 1K控制開啓-關閉。CCD 影像感應器（未顯示）的輸出信號，經由一外部相連的電 容器C 1輸入至輸入端2 A。一箝制電位產生器電路9亦 連接至輸入端2A，且開關1 2 1若因CLAMP信號而 開啓，則箝制電位產生器電路9將在輸入端2 A上施加一 箱制電位V C L。另一方面，一用於輸出類比地電位的數456143 A7 B7 V. Description of the invention (1) Background of the invention The present invention relates to an image sensor interface circuit that can process the output of both a CCD color image sensor and a CIS color image sensor using a switching capacitor circuit. In order to digitize the analog information of the image sensor, we need an analog signal processing circuit to perform noise reduction and gain control between an analog / digital converter and the image sensor. In the past, this was manufactured with a sample / hold circuit, a programmable gain amplifier, etc., as shown in the example of Fig. 6. There are two types of image sensors that convert optical signals into electrical signals. One is the C CD image sensor and the other is the C I S image sensor. However, the output signals of these two sensors are opposite to each other. In other words, for the output signal of the CCD image sensor (as shown in Figure 7), when the response light intensity increases, the signal is in a negative direction from a certain offset level (usually greater than 5 volts) to the ground potential. It will become larger. On the other hand, for a C IS image sensor, as shown in Figure 12, when the response light intensity increases, the signal becomes larger in the positive direction from the ground potential (0 volts). Therefore, since the form of the output signal varies depending on the type of the image sensor, in the past, it has been difficult for us to implement an analog signal processing circuit that can handle both the C C D image sensor and the CIS image sensor. In the past, we need to apply a circuit configuration specially for a certain type of inductor, or use an analog multiplexer (MPX) to switch the signal path to pass or fail the level shift circuit, as shown in Figure 7. Please read it back first. The above notices and notes will be printed on the page. This page is bound to be printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and the Consumer Cooperatives. The paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) -4- 456143 A7 B7 V. Description of the invention (2) Description of the invention {please read the note on the back first, and then this page) The reason why it is difficult to implement a signal processing circuit that can handle the above two types of inductors is because in addition to the two This kind of image sensor has completely different DC levels and requires different analog preprocessing. Since these two signals are opposite to each other, we need to invert a signal and make the DC level uniform. In other words, From the point of view of the signal processing of the two signals, the 'DC level processing method is as follows: in the case of the c CD image sensor', it is DC reproduction, and in the case of the CIS image sensor, it is DC shift. This difference stems from the fact that the signal levels from the two image sensor types are completely different from each other. ≪ = The signal from the C CD image sensor has a DC offset voltage, usually greater than 5 volts. Because the signal must be input to the semiconductor integrated circuit using capacitive coupling, and the power supply voltage of the circuit is generally 5 volts or lower, a clamp must be used to make the DC level on the analog signal processing circuit different. Will rise and fall. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. On the other hand, for the CIS image sensor, the signal is from the ground potential (0 volts), so the signal can be directly input to the power supply voltage of 5 volts or lower. Semiconductor integrated circuit. However, normal analog circuits cannot attach analog signals at ground potential, so a DC shift is required. Set the signal within the dynamic range that the analog circuit can handle. Furthermore, for the signals from the two image sensor types, even after the signals have been pre-processed by clamping or DC shifting, the signals are still opposite each other. Therefore, in order to process two kinds of letters with the same programmable gain amplifier, this paper size is applicable to the 0 National Standard (CNS) A4 specification (210 X 297 mm > printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 456) 彳43 A7 ____B7_ V. Invention Description (3), it is necessary to invert a signal so that the offset levels are equal. If the offset levels are not uniform, the difference in ground potential from the programmable gain amplifier will be amplified. And even if the signal strength is zero, an operation error will occur due to its existence. The object of the present invention is to provide an image sensor interface circuit that can process both the CCD color image sensor and the CIS color image sensor in a single circuit. Signal. According to the present invention, we construct an analog signal processing circuit that uses a switched capacitor circuit that uses signal sample-and-hold, level shift, and level inversion functions, and can be applied to the CD color through the same signal path. Both the image sensor and the CIS color image sensor. Through this circuit, the output of the C CD color image sensor and the CIS color image sensor can be both One circuit processing. According to the present invention, we propose an image sensor interface, which includes: a first switching capacitor circuit that responds to three RGB color output signals of c CD and CIS and at least one quasi-shift voltage, and Perform sample-and-hold on each RGB color output signal at a predetermined clock timing. A second switching capacitor circuit responds to the output of the first switching capacitor circuit (corresponding to each of the three RGB color output signals), and Each output signal performs sample-and-hold, which is controlled by a second plurality of clock signals; and a third switching capacitor circuit, which is controlled by a third plurality of clock signals, in response to each of the second switching capacitor circuits Output. The third switching capacitor circuit has a function that can be inverted at the level of the analog ground potential at each output of the second switching capacitor circuit, and the second H ϋ ι * ϋ. ^ 1 n I * ϋ nn I 1 nt {Please read the note above and then tk this page) This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -6- Ji Intellectual Property Office employee consumer cooperative printed 456143 A7 B7 V. Description of the Invention (4) between the output of the switched handover before each output of the capacitor circuit, depending on a third predetermined number of clock signal. With this structure, when the output signal of the CC color image sensor is input, the first and second switching capacitor circuits perform sampling-and-holding, and the signal is inverted by the third switching capacitor circuit. When the output signal of the C I S color image sensor is input, the sample-and-hold and DC level shift are performed by the first switching capacitor circuit, and the sample-and-hold are performed by the second and third switching capacitor circuits. > Also according to the present invention, I propose an image sensor interface circuit, which includes: a first switching capacitor circuit, which responds to three RGB color output signals of C CD and CIS and at least one quasi-shift voltage, and One RGB color output signal performs sample-and-hold at a predetermined clock timing: a second switching capacitor circuit that responds to the output of the first switching capacitor circuit (corresponding to each of the three RGB color output signals), and The signal performs sample-and-hold, which is controlled by a second plurality of clock signals: and a third switching capacitor circuit, which is controlled by a third plurality of clock signals, in response to each output of the second switching capacitor circuit. The third switching capacitor circuit has a function to switch between the level at which each output of the second switching capacitor circuit should be inverted along the analog ground potential, and the forward output of each output of the second switching capacitor circuit. Depending on the third plurality of clock signals: an analog multiplexer controlled by the fourth plurality of clock signals in response to three outputs corresponding to the RGB colors of the third switching capacitor circuit for use in accordance with the fourth plurality of clocks Signal to select and output one of the three RGB color outputs; this paper size applies the Chinese National Standard (CNS) A4 specification (210 x 297 mm)------ I--III-- -· 11 I --- I ^ · 111111 — ί Please read the precautions on the back to reprint this page) Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 4561 43 A7 B7 V. Description of the invention (5) A program A gain amplifier that responds to the output of the analog multiplexer and predetermined digital data, amplifies the gap between the output of the analog multiplexer and a predetermined reference level (based on digital data); and an analog / digital converter A buffer amplifier for transmitting the output of the programmable gain amplifier to convert to digital data bits. The shift voltage can then be output by at least one analog / digital converter. Furthermore, there may be a structure in which the voltage level output of the analog / digital converter is determined based on the digital data calculated based on the analog / digital converter data. According to the present invention, we suggest that the image sensor interface circuit proposed in item 3 of the scope of patent application, wherein: the analog / digital converter is an analog / digital converter with a differential input terminal, and its response is two Signal, converts the voltage difference between the two signals into digital data; a first resistive element is connected to the output of the buffer amplifier; the other end of the first resistive element is connected to a difference of the analog / digital converter together with a first capacitor The first terminal of the moving input terminal: a second resistive element (its resistance is equal to the first resistive element), and a second capacitor (whose capacitance is equal to the first capacitor) is connected to the analog / digital converter A second terminal of the differential input terminal; and the other terminal of the second resistive element is connected to one of two reference voltages provided to the analog / digital converter. Brief Description of the Drawings Fig. 1 is a block diagram showing an image sensor interface circuit in an exemplary embodiment of the present invention. Figure 2 shows the first switching capacitor circuit and the second switching capacitor in Figure 1 ----- lllllllli — — — — — — II «— — — — — It (Please read the note on the back " ) This paper is again applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -8-4561 43 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (6) Circuit, and third The detailed circuit diagram of the switching capacitor circuit is used to process the output signal of the CCD color image sensor. Figure 3 is a signal waveform diagram of each part of the circuit shown in Figure 2 to illustrate its operation. Fig. 4 is a detailed circuit diagram of the first exchange capacitor circuit, the second exchange capacitor circuit, and the third exchange capacitor circuit of Fig. 1 for processing the output signals of the CIS color image sensor. Figure 5 is a signal waveform diagram of each part of the circuit shown in Figure 4 to illustrate its operation. Fig. 6 is a block diagram showing an example of a conventional image sensor interface circuit. Fig. 7 is an example showing an output signal waveform of a CC color image sensor. Fig. 8 shows an example of the output signal waveform of the CIS color image sensor. Fig. 9 is a detailed circuit diagram of the first exchange capacitor circuit, the second exchange capacitor circuit, and the third exchange capacitor circuit of Fig. 1 for processing the output signals of the CC color image sensor. Figure 10 is a signal waveform diagram of each part of the circuit shown in Figure 9 to illustrate its operation. Figure 11 is a signal waveform diagram of each part of the circuit shown in Figure 9 to illustrate its operation. Fig. 12 is a detailed circuit diagram of the first, second, and third exchange capacitor circuits of the first exchange capacitor circuit of Fig. 1 for this paper size applicable to China National Standard (CNS) A4 specification (210 X 297 male- — — — — — —---- Install ------ Order --------- line (please read the notes on the back first and then Shanghai, this page) A7 B7 456143 Jade and invention Explanation (7) Processing the output signal of the CIS color image sensor. Figure 13 is a signal waveform diagram of each part of the circuit shown in Figure 12 to illustrate its operation. Figure 14 is shown in Figure 12 The signal waveform diagram of each part of the circuit to explain its operation. Description of the preferred embodiment Figure 1 is a block diagram showing a first exemplary embodiment of the image sensor interface circuit according to the present invention. Image sensor interface Circuit 1 is an image sensor interface circuit that can process the output of a CCD color image sensor or a CIS color image sensor, and is provided with a first switching capacitor circuit, a second switching capacitor circuit, and a third switching capacitor circuit. First exchange capacitor circuit 2 Based on the three RGB color output signals and a shift voltage of the CCD color image sensor or CIS color image sensor, the output signal is sampled and held at a predetermined clock timing. The second switching capacitor circuit 3 The output signal of the switching capacitor circuit 2 is sampled and held. When necessary, the third switching capacitor circuit 4 inverts the level of the output of the second switching capacitor circuit 3 along the analog ground potential. Figure 2 shows the first switching capacitor circuit 2. A special example of the second switching capacitor circuit 3 and the third switching capacitor circuit 4. The signals from the CCD color image sensor are processed here. For simplicity, the figure only shows the processing of the RGB of the CCD color image sensor. The circuit of the R signal in the color signal output. The circuit that processes the other G and B signals is only -------------------- I-- «— — — — —II < Please read the remarks on the back page before re-production " this page) Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs * '1 ^ + The paper size is applicable to China National Standard (CNS) A4 (210 X 297) %) -10- Ministry of Economy Printed by the Intellectual Property Bureau employee consumer cooperative 456143 V. Invention description (8) is to control the timing of the clock signal (to be shown later), and the circuit configuration is exactly the same. The first switching capacitor circuit 2 is formed by connecting an operational amplifier 2 1, capacitors 2 2 to 24, and sampling switches 25 to 29, as shown in FIG. Switches 2 5 to 2 9 are on-off controlled by clock signals SAMP L E 20K and XSAMPLE2 1K. The output signal of the CCD image sensor (not shown) is input to the input 2 A via an externally connected capacitor C 1. A clamp potential generator circuit 9 is also connected to the input terminal 2A, and if the switch 1 2 1 is turned on by the CLAMP signal, the clamp potential generator circuit 9 will apply a box potential V C L to the input terminal 2 A. On the other hand, a number for outputting analog ground potential
位至類比轉換電路（DAC) 10，則連接至輸入端2B 0 - 第二交換電容器電路3係將一運算放大器31 ，電容 器3 2和3 3 ，以及取樣開關3 4至3 6連接而成，如圖 所示。開關3 4至3 6係由時鐘信號SH_RED3 0K 及XSH — RED 3 1 K控制開啓一關閉，且對第一交換 電容器電路2的輸出進行取樣-保持。 第三交換電容器電路4係將一運算放大器4 1 ，電容 器4 2和4 3，以及準反相/不反相控制開關4 4至 4 6 6連接而成，如圖所示。開關4 4至4 6係由時鐘信 號 INV — RED 40K 和 XINV — RED 41 KA控制開啓-關閉，且對第二交換電容器電路3的輸出 進行位準反相。 其次，圖2所示之電路，在處理C CD彩色影像感應 I--------------裝—_| 訂-------1 ·線 (請先閱讀背面之注^事項再浐、本頁) 本纸張尺度適用中國國家標隼（CNS)A4規格（210 X 297公釐） -11 - 經濟部智慧財產局員工消費合作社印製 45 61 43 A7 B7 玉、發明說明（9 ) 器之R輸出信號時的操作情形，將參照圖3予以說明。 C CD彩色影像感應器的信號輸出經由電容器C 1輸 入至輸入端2 A，以除去直流成份，因其通常含有超過5 伏特的直流偏移電壓。爲重新產生被移除的直流成份，吾 人建立一箝制電位產生器電路9，且將箝制電位產生器電 路9的直流信號一箝制電位CVL，施加於輸入端2A， 輸入端2A處的R信號波形在圖3中顯示爲一 C CD R E D輸出。 以此種方式輸入第一交換電容器電路2的信號輸入在 第一交換電容器電路2內被取樣-保持。控制第一交換電 容器電路2之操作的時鐘信號SAMPLE 20K，在 圖3所示的時序，控制第一交換電容器電路2預先決定的 開關。對應於R信號的波前，亦即第一交換電容器電路2 的輸出信號，在圖3中顯示爲一節點R 1。請注意*由於 C C D彩色影像感應器的信號由本實施例處理，故不需位 準移位。因此，連接到輸入端2 B的數位至類比轉換電路 (D A C ) 1 0輸出類比地電位，且不進行位準移位。 第一交換電容器電路的輸出被輸入至第二交換電容器 電路3，並於此處進行取樣與保持。第二交換電容器電路 3的操作係由時鐘信號SH — RED 3 0K控制，俾使 第二交換電容器電路3中預先決定的開關依圖3所示之時 序受控制。對應於R信號的波形•即第二交換電容器電路 3的輸出，在圖3中顯示爲節點R2。 第二交換電容器電路3的輸出被輸入至第三交換電容 — — —— —— — IP — — — — - I I I I I I I * — — — — — — — — (請先閱讀背面之注^事項再/、本頁) 本紙張尺度適用中國國家標準（CNS)A4規烙（210 X 297公笼） -12- 經濟部智慧財產局具工消費合作社印製 4 5 6 彳 4 3 a? B7 五、發明說明（1〇 ) 器電路4，然後沿類比地電位進行位準反相。時鐘信號 INV — RED 30K 及 XINV_RED 31K 提 供控制，俾將第三交換電容器反相，且時鐘信號I NV_ RED 30K的時序示於圖3。對應於R信號的波形， 即第三交換電容器.電路4的輸出，在圖3中顯示爲節點 R 3。 現在回到圖1，對應於……的三個輸出信號，通過一 類比多工器5，且吾人透過分時選擇三個輸出信號其中之 一，其波形係由圖3中的MP X輸出顯示。類比多工器5 的輸出被輸入一可程式增益放大器（PGA) 4，並以預 先決定的位準爲參考位準，將該輸出放大。該信號接著經 由緩衝放大器5及一濾波器電路6被輸入一類比至數位轉 換電路（ADC) 7的差動輸入端之一。提供給ADC的 參考電壓V r經由一濾波器電路8被輸入另一差動輸入端 。依據此結果，從類比至數位轉換電路〔ADC) 7處在 同一時序由C C D彩色影像感應器輸出的三個R G B彩色 輸出信號，其個別的數位化版本，可透過分時由類比/數 位轉換器得到。 C C D彩色影像感應器的三個RGB彩色輸出信號中 ，每一信號經由第一交換電容器電路2，第二交換電容器 電路3及第三交換電容器電路4(均示於圖1)進行的處 理，已參考圖2與圖3說明於上。第一交換電容器電路2 ，第二交換電容器電路3及第三交換電容器電路4 (均示 於圖1 )，亦可用於處理C I S彩色影像感應器的輸出信 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） -13- ιιί_Ιιίί — — — ·· · I I I I — I 訂.— — — I — — — — (請先Μ讀背面之注t'事項再r 本頁) 4 5 614 3 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（11 ) 號，此種信號的形式與C CD彩色影像感應器的輸出信號 不同。 至於一CIS彩色影像感應器之三個RGB彩色信號 輸出中，每一信號經由影像感應器介面電路1進行的處理 ，其操作將參考圖4與圖5說明於下。爲簡明起見，吾人 仍然只顯示處理CIS彩色影像感應器之三個RGB彩色 信號輸出中之R信號的電路。C I S彩色影像感應器的輸 出信號並不具超過5伏特的直流偏移電壓，故C I S彩色 影像感應器的輸出信號被直接輸入至輸入端2 A。因此， 吾人並不需要箝制電位產生器電路9產生的箝制電壓，且 在此情況下，箝制電位產生器電路9上的開關9 1將由 C L A Μ P信號設定爲關閉。. C I S彩色影像感應器的輸出信號爲一通常由地電位 開始的信號，因此由第一交換電容器電路2對其進行位準 移位與取樣-保持。第一交換電容器電路2的輸出在通過 第二交換電容器電路3與第三交換電容器電路4之後即被 取出，而不進行位準反相。 圖5顯示此時的時鐘信號輸出，第一交換電容器電路 2的輸出波形，第二交換電容器電路3的輸出波形及第二 交換電容器電路4的輸出波形。 藉由如上述C I S彩色影像感應器的輸出信號，可程 式增益放大器（PGA) 4之輸入信號的直流位準等於 C CD彩色影像感應器的直流位準，且在可程式增益放大 器（PGA) 4之後的處理過程與CCD彩色影像感應器 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -14- ---------------訂11!11 ·*^ (請先閱讀贫面之注t·事項再本頁) 經濟部智慧財產局員工消費合作社印製 4561 43 A7 B7 五、發明說明（12 ) 完全相同。 圖2所示處理C C D彩色影像感應器信號的影像感應 器介面電路，與圖4所示處理C I S彩色影像感應器信號 的影像感應器介面電路，其差異爲提供對第三交換電容器 電路4上開關4 5與4 6的開啓-關閉之控制的時鐘信號 。在圖2中，時鐘信號INV_RED 30K控制開關 45，且時鐘信號XINV — RED 31K控制開關 46 ，而在圖4中，箝制電位XINV_RED 3 1 K 控制開關45 ，且時鐘信號INV_RED 30K控制 開關4 6。這是唯一的差異。根據本發明，藉由使用完全 相同的電路配置，且只改變時鐘信號，即可建造可處理 C CD與C I S彩色影像感應器兩者的電路。 圖9顯示一詳細範例，其對應於在處理C C D彩色影 像感應器信號的情況下，影像感應器介面電路1之三個 •RGB彩色輸出信號的每一個信號。圖1 0與圖1 1顯示 該時間的時鐘信號，第一交換電容器電路2的輸出節點 R1, G1, B1 ，第二交換電容器零路3的輸出節點 R2，G2 ，B2，第三交換電容器電路4的輸出節點 R3 | G3，B3 ，以及類比多工器5的輸出波形。 圖1 2顯示一詳細範例，其對應於在處理C I S彩色 影像感應器信號的情況下，影像感應器介面電路1之三個 RGB彩色輸出信號的每一個信號。圖13與圖14顯示 該時間的時鐘信號，第一交換電容器電路2的輸出節點 Rl ，Gl，B1 ，第二交換電容器電路3的輸出節點 -------------裝-------訂--------，線 (請先閱讀背6'之注*-事項再\ .‘本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公芨） -15- A7 B7 五、發明說明（13 ) R2 ’ G2 ’ B2，第三交換電容器電路4的輸出節點 R3 ’ G3，B3，以及類比多工器5的輸出波形。 在圖2，圖4，圖9與圖1 2所示的電路配置中，吾 人使用一類比/數位轉換器來提供移位電壓。在此種構造 下’在沿信號路徑的電路中，主要由於運算放大器偏移而 可能發生的信號位準起伏，可藉由使用類比/數位轉換器 的結果’以數位資料修正，而產生大的效應。需要進行此 一修正的理由如下。除非修正非常成功，使得交換電容器 電路在沒有信號時的輸出位準可與可程式增益放大器的地 電位相符，否則可程式增益放大器會放大差距。即使信號 強度爲零，因響應其存在，也會發生操作錯誤。使用數位 至類比轉換電路（D A C ) 1 〇，則進行此修正很簡單。 如上所述，根據本發明，C C D彩色影像感應器的信 號與C I S彩色影像感應器的信號可使用一個電路處理， 故電路配置變得簡單。吾人可以獲得積體電路晶片面積較 小的優點，以及類似的優點。 1||1|!!|||_ · I I I I — I I * I I I I I I — I {請先閱讀背s之注*·事項再尹.本頁) 經濟部智慧財產局員工消費合作社印製 -16- 本紙張尺度適用中圉國家標準（CNS)A4規格（21〇 χ 297公釐）The bit-to-analog conversion circuit (DAC) 10 is connected to the input terminal 2B 0-the second switching capacitor circuit 3 is formed by connecting an operational amplifier 31, capacitors 3 2 and 3 3, and sampling switches 3 4 to 36, as the picture shows. Switches 3 4 to 36 are controlled by the clock signals SH_RED3 0K and XSH — RED 3 1 K to be turned on and off, and the output of the first switching capacitor circuit 2 is sampled and held. The third switching capacitor circuit 4 is formed by connecting an operational amplifier 4 1, capacitors 4 2 and 4 3, and a quasi-inverting / non-inverting control switch 4 4 to 4 6 6 as shown in the figure. The switches 4 4 to 4 6 are controlled on-off by the clock signals INV — RED 40K and XINV — RED 41 KA, and the level of the output of the second switching capacitor circuit 3 is inverted. Secondly, the circuit shown in Figure 2 is processing the C CD color image sensor I -------------- install—_ | subscribe ------- 1 · line (please read first Note on the back ^ Matters to be read again, this page) This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -11-Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Employee Consumer Cooperatives 45 61 43 A7 B7 Jade, invention description (9) The operation of the R output signal of the device will be described with reference to FIG. 3. The signal output of the C CD color image sensor is input to the input 2 A through the capacitor C 1 to remove the DC component, because it usually contains a DC offset voltage exceeding 5 volts. In order to regenerate the removed DC component, I set up a clamped potential generator circuit 9 and applied the DC signal of the clamped potential generator circuit 9 to a clamped potential CVL to the input 2A and the R signal waveform at the input 2A This is shown in Figure 3 as a C CD RED output. The signal input to the first switching capacitor circuit 2 in this way is sampled and held in the first switching capacitor circuit 2. The clock signal SAMPLE 20K which controls the operation of the first switching capacitor circuit 2 controls a predetermined switch of the first switching capacitor circuit 2 at the timing shown in FIG. The wavefront corresponding to the R signal, that is, the output signal of the first switching capacitor circuit 2 is shown as a node R 1 in FIG. 3. Please note * Since the signal of the C C D color image sensor is processed by this embodiment, no level shift is required. Therefore, the digital-to-analog conversion circuit (D A C) 10 connected to the input terminal 2 B outputs the analog ground potential without performing a level shift. The output of the first switching capacitor circuit is input to the second switching capacitor circuit 3, where it is sampled and held. The operation of the second switching capacitor circuit 3 is controlled by the clock signal SH_RED 3 0K, so that a predetermined switch in the second switching capacitor circuit 3 is controlled according to the timing shown in FIG. 3. The waveform corresponding to the R signal, that is, the output of the second switching capacitor circuit 3 is shown as a node R2 in FIG. 3. The output of the second switching capacitor circuit 3 is input to the third switching capacitor — — — — — — IP — — — — — IIIIIII * — — — — — — (Please read the notes on the back side before // (This page) The paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 male cage) -12- Printed by the Industrial and Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 5 6 彳 4 3 a? B7 V. Description of the invention (10) The inverter circuit 4 then performs level inversion along the analog ground potential. The clock signals INV — RED 30K and XINV_RED 31K provide control. The third switching capacitor is inverted, and the timing of the clock signal I NV_ RED 30K is shown in Figure 3. The waveform corresponding to the R signal, that is, the output of the third exchange capacitor. Circuit 4 is shown as a node R 3 in FIG. 3. Returning now to FIG. 1, the three output signals corresponding to ... pass through an analog multiplexer 5, and we select one of the three output signals through time sharing, and its waveform is shown by the MP X output in Fig. 3 . The output of the analog multiplexer 5 is input to a programmable gain amplifier (PGA) 4 and the output is amplified with a predetermined level as a reference level. This signal is then input via a buffer amplifier 5 and a filter circuit 6 to an analog to one of the differential input terminals of a digital conversion circuit (ADC) 7. The reference voltage V r supplied to the ADC is input to another differential input terminal via a filter circuit 8. According to this result, the three RGB color output signals output by the CCD color image sensor at the same timing from the analog-to-digital conversion circuit (ADC) 7 can be converted by the analog / digital converter through time sharing. get. Each of the three RGB color output signals of the CCD color image sensor is processed by the first switching capacitor circuit 2, the second switching capacitor circuit 3, and the third switching capacitor circuit 4 (all shown in FIG. 1). This is described above with reference to FIGS. 2 and 3. The first exchange capacitor circuit 2, the second exchange capacitor circuit 3 and the third exchange capacitor circuit 4 (all shown in FIG. 1) can also be used to process the output letter of the CIS color image sensor. The paper size is applicable to the Chinese National Standard (CNS) A4 Specifications (210 x 297 mm) -13- ιιί_Ιιίί — — — · · · IIII — I order. — — — I — — — — (Please read the note on the back t 'matter on the back page before r this page) 4 5 614 3 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, V. Invention Description (11), the form of this signal is different from the output signal of the C CD color image sensor. As for the three RGB color signal outputs of a CIS color image sensor, each signal is processed by the image sensor interface circuit 1 and its operation will be described below with reference to FIGS. 4 and 5. For the sake of brevity, I still show only the circuits that process the R signals of the three RGB color signal outputs of the CIS color image sensor. The output signal of the C I S color image sensor does not have a DC offset voltage exceeding 5 volts, so the output signal of the C I S color image sensor is directly input to the input terminal 2 A. Therefore, we do not need to clamp the clamping voltage generated by the potential generator circuit 9, and in this case, the switch 91 on the clamping potential generator circuit 9 will be set to be closed by the CLAMP signal. The output signal of the C I S color image sensor is a signal usually started from the ground potential, so it is level-shifted and sample-held by the first switching capacitor circuit 2. The output of the first switching capacitor circuit 2 is taken out after passing through the second switching capacitor circuit 3 and the third switching capacitor circuit 4, without level inversion. Fig. 5 shows the clock signal output at this time, the output waveform of the first exchange capacitor circuit 2, the output waveform of the second exchange capacitor circuit 3, and the output waveform of the second exchange capacitor circuit 4. With the output signal of the CIS color image sensor as described above, the DC level of the input signal of the programmable gain amplifier (PGA) 4 is equal to the DC level of the C CD color image sensor, and the programmable gain amplifier (PGA) 4 Subsequent processing and CCD color image sensor The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -14- --------------- order 11! 11 ** ^ (Please read the note on the poor side first t matters later on this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Employee Cooperatives 4561 43 A7 B7 5. The invention description (12) is exactly the same. The image sensor interface circuit for processing the CCD color image sensor signal shown in FIG. 2 is different from the image sensor interface circuit for processing the CIS color image sensor signal shown in FIG. 4. The difference is that it provides a switch on the third switching capacitor circuit 4. 4 5 and 4 6 clock signals for on-off control. In FIG. 2, the clock signal INV_RED 30K controls the switch 45, and the clock signal XINV — RED 31K controls the switch 46. In FIG. 4, the clamp potential XINV_RED 3 1 K controls the switch 45, and the clock signal INV_RED 30K controls the switch 46. This is the only difference. According to the present invention, by using the exact same circuit configuration and changing only the clock signal, a circuit capable of processing both C CD and C I S color image sensors can be constructed. Figure 9 shows a detailed example, which corresponds to each of the three • RGB color output signals of the image sensor interface circuit 1 in the case of processing a C C D color image sensor signal. Figures 10 and 11 show the clock signal at this time. The output nodes R1, G1, B1 of the first switching capacitor circuit 2 and the output nodes R2, G2, B2 of the third switching capacitor circuit 2 are the third switching capacitor circuit. Output node R3 | G3, B3 of 4 and the output waveform of analog multiplexer 5. FIG. 12 shows a detailed example corresponding to each of the three RGB color output signals of the image sensor interface circuit 1 in the case of processing a C I S color image sensor signal. Figures 13 and 14 show the clock signal at this time. The output nodes R1, Gl, B1 of the first switching capacitor circuit 2 and the output nodes of the second switching capacitor circuit 3 ------- Order --------, line (please read the note of 6 '**-item before \.' This page) This paper size is applicable to China National Standard (CNS) A4 specifications ( 210x 297 cm) -15- A7 B7 V. Description of the invention (13) R2 'G2' B2, output nodes R3 'G3, B3 of the third switching capacitor circuit 4 and output waveforms of the analog multiplexer 5. In the circuit configurations shown in Figure 2, Figure 4, Figure 9 and Figure 12, we use an analog / digital converter to provide the shift voltage. With this configuration, 'in the circuit along the signal path, the signal level fluctuations that may occur mainly due to the offset of the operational amplifier can be corrected with digital data by using the result of an analog / digital converter', resulting in a large effect. The reason for this amendment is as follows. Unless the correction is so successful that the output level of the switching capacitor circuit can match the ground potential of the programmable gain amplifier when there is no signal, the programmable gain amplifier will amplify the gap. Even if the signal strength is zero, an operation error may occur due to its presence. Using a digital-to-analog conversion circuit (D A C) 1 0, this correction is simple. As described above, according to the present invention, the signal of the C C D color image sensor and the signal of the C I S color image sensor can be processed by one circuit, so the circuit configuration becomes simple. We can get the advantages of smaller integrated circuit chip area, and similar advantages. 1 || 1 | !! ||| _ · IIII — II * IIIIII — I {Please read the note of * s and the matter before Yin. This page) Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -16- This Paper size is applicable to China National Standard (CNS) A4 (21〇χ 297 mm)