TW494443B - Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on a workpiece - Google Patents

Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on a workpiece Download PDF

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Publication number
TW494443B
TW494443B TW088107682A TW88107682A TW494443B TW 494443 B TW494443 B TW 494443B TW 088107682 A TW088107682 A TW 088107682A TW 88107682 A TW88107682 A TW 88107682A TW 494443 B TW494443 B TW 494443B
Authority
TW
Taiwan
Prior art keywords
layer
metallization
tool set
copper
workpiece
Prior art date
Application number
TW088107682A
Other languages
English (en)
Chinese (zh)
Inventor
E Henry Stevens
Robert W Berner
Original Assignee
Semitool Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/076,695 external-priority patent/US6143126A/en
Priority claimed from US09/076,565 external-priority patent/US6376374B1/en
Priority claimed from US09/128,238 external-priority patent/US6120641A/en
Application filed by Semitool Inc filed Critical Semitool Inc
Application granted granted Critical
Publication of TW494443B publication Critical patent/TW494443B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/66—Wet etching of conductive or resistive materials
    • H10P50/663—Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/038—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers covering conductive structures
    • H10W20/039—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers covering conductive structures also covering sidewalls of the conductive structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H10W20/065—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying by making at least a portion of the conductive part non-conductive, e.g. by oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Wire Bonding (AREA)
TW088107682A 1998-05-12 1999-05-12 Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on a workpiece TW494443B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/076,695 US6143126A (en) 1998-05-12 1998-05-12 Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on an integrated circuit
US09/076,565 US6376374B1 (en) 1998-05-12 1998-05-12 Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece
US09/128,238 US6120641A (en) 1998-05-12 1998-08-03 Process architecture and manufacturing tool sets employing hard mask patterning for use in the manufacture of one or more metallization levels on a workpiece

Publications (1)

Publication Number Publication Date
TW494443B true TW494443B (en) 2002-07-11

Family

ID=27372911

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088107682A TW494443B (en) 1998-05-12 1999-05-12 Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on a workpiece

Country Status (4)

Country Link
EP (1) EP1086485A2 (fr)
JP (1) JP2002515645A (fr)
TW (1) TW494443B (fr)
WO (1) WO1999059190A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI579228B (zh) * 2011-05-18 2017-04-21 應用材料股份有限公司 電化學處理器

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8960099B2 (en) 2002-07-22 2015-02-24 Brooks Automation, Inc Substrate processing apparatus
US7988398B2 (en) 2002-07-22 2011-08-02 Brooks Automation, Inc. Linear substrate transport apparatus
US7959395B2 (en) 2002-07-22 2011-06-14 Brooks Automation, Inc. Substrate processing apparatus
AU2003259203A1 (en) 2002-07-22 2004-02-09 Brooks Automation, Inc. Substrate processing apparatus
JP2011154380A (ja) * 2003-03-20 2011-08-11 Toshiba Mobile Display Co Ltd 表示装置の形成方法
US7215006B2 (en) * 2005-10-07 2007-05-08 International Business Machines Corporation Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement
US20070117377A1 (en) * 2005-11-23 2007-05-24 Chih-Chao Yang Conductor-dielectric structure and method for fabricating

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5178682A (en) * 1988-06-21 1993-01-12 Mitsubishi Denki Kabushiki Kaisha Method for forming a thin layer on a semiconductor substrate and apparatus therefor
US5316974A (en) * 1988-12-19 1994-05-31 Texas Instruments Incorporated Integrated circuit copper metallization process using a lift-off seed layer and a thick-plated conductor layer
US5256565A (en) * 1989-05-08 1993-10-26 The United States Of America As Represented By The United States Department Of Energy Electrochemical planarization
JPH0812846B2 (ja) * 1991-02-15 1996-02-07 株式会社半導体プロセス研究所 半導体製造装置
US5563095A (en) * 1994-12-01 1996-10-08 Frey; Jeffrey Method for manufacturing semiconductor devices
US5994678A (en) * 1997-02-12 1999-11-30 Applied Materials, Inc. Apparatus for ceramic pedestal and metal shaft assembly
US5933758A (en) * 1997-05-12 1999-08-03 Motorola, Inc. Method for preventing electroplating of copper on an exposed surface at the edge exclusion of a semiconductor wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI579228B (zh) * 2011-05-18 2017-04-21 應用材料股份有限公司 電化學處理器

Also Published As

Publication number Publication date
JP2002515645A (ja) 2002-05-28
WO1999059190A3 (fr) 2000-04-06
EP1086485A2 (fr) 2001-03-28
WO1999059190A2 (fr) 1999-11-18

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees