559900 五、發明說明（1) [發明的技術領域] 本發明和利用可有效迴避元件動作電流無必要之漏電或 流通的高電阻磷化硼（BP)系半導體層構成磷化硼系半導體 元件之技術相關。 [習知技術] 由屬於元素周期律之III族的硼（B)及V族元素所構成之 III-V族化合物半導體，以磷化硼（BP)爲大家所熟知（參照 Nature、179(No· 4569)(1 957)、1 075 頁）。關於磷化硼，從 以前就有頻帶閘的各種相關報告。例如，B. Stone等就發 現多晶BP膜約有6電子伏特（eV)之室溫頻帶閘（參照Phys. Rev. Lett·，Vo 1. 4、No.6(1960)、282 〜284 頁）。又， Manca 則提出 4.2eV 之頻帶聞（參照 J. Phys. Chem. Solids， 20(1961)、268·)。然而，從以往將磷化硼之頻帶隙視爲約 2 eV(參照① RCA Review，25(1964)、159 〜167 頁、② Z. anory. allg. chem.，349 ( 1 967 )、151 〜157 頁、及③寺 本巖著、「半導體DEVICE槪論」（株）培風館、1 995年3 月30日發行初版、28頁）。 此外，碟化硼之菲律浦離子鍵結度只有相當低的0.006 (參照PHILLIPS著、「半導體結合論」（（株）吉岡書店、 1985年7月25日發行、第3版）、49〜51頁），具有容易 獲得導電性半導體層之特徵（參照曰本特開平2-288388號 公報）。因此，以往就知道有人將導電性BP層當做構成 III族氮化物半導體雷射二極體（LD)之電流壓縮層使用的 9900 五、發明說明（2) 實例（參照日本特開平1 0-242569號公報）。又，在發光電 二極體（LED)則當做如單晶體基板上之緩衝層使用（參照日 本特開平2-275682號公報）。另一方面，爲了使磷化硼具 有相對較大之電子有效質量（參照前述日本特開平2-275 682號公報），而不易獲得η型低電阻BP結晶（參照前 述日本特開平2-288388號公報）。 從結晶學之性質的觀點而言，閃鋅礦型（參照PHILLIPS 著、「半導體結合論」（（株）吉岡書店、1 985年7月25日 發行、第3版）、14〜15頁）之磷化硼，具有和等軸晶體 (cubic)之氮化鎵（c-GaN:晶格常數=4·51〇Α)大致相同的 4.53 8Α晶格常數。又，ΒΡ之{110}晶格面間隔約爲3.209Α ，和六方晶GaN(h-GaN)之a軸晶格常數3.180Α槪略相等（ 參照前述「半導體DEVICE槪論」、28頁）。以往就是利 用此良好晶格相似性，以BP緩衝層及GaN結晶層之連接 構造來構成蕭特基（Schottky)連接場效型電晶體（MESFET)( 參照日本特開2000-3 1 1 64號公報）。 磷化硼（BP)爲間接躍遷型半導體（參照前述「半導體 DEVICE槪論」、28頁）。和直接躍遷型半導體相比，間接 躍遷型半導體會導致發光之載體的輻射性復合效率較小（ 參照K. Seeger著、「半導體之物理學（下）」（株）吉岡書店 、1991年6月25日發行第1版、392頁）。因此間接躍遷 型半導體之磷化硼未被利用做LED及LD之發光層（活化 層），而利用爲如前面所述之電流壓縮層。此外，正嚐試 『59900 五、發明說明（3) 當做場效型電晶體中之緩衝層來應用。 [發明所欲解決之問題] 以場效型電晶體用途之緩衝層爲例來進行說明時，爲了 防止汲極電流之漏電，必須以高電阻之結晶層構成緩衝層 。然而，傳統之磷化硼的室溫下頻帶隙爲較低的約2eV(參 照前述① RCAReview、及② Z. anory. allg. chem·)， 因爲是離子連接性較低之結晶而容易附與導電性，故具有 傳統技術不易獲得適合MESFET用途之高電阻緩衝層的缺 點。 此外，習知技術中，有製造2eV頻帶隙之磷化硼、及氮 化鋁（A1N)系混晶之超晶格構造，而獲得2eV以上之室溫 頻帶隙的構造體之技術（參照前述日本特開平2-275682號） 。然而，習知技術手段之問題點，就是必須以煩雜之機構 才能形成超晶格構造。 本發明的目的就在提供一種磷化硼系半導體元件及其製 造方法，不但可以克服習知技術之缺點，且無需傳統上之 複雜步驟即可形成高電阻磷化硼系半導體層，並利用該高 電阻磷化硼系半導體層來構成磷化硼系半導體元件。 [解決問題之手段] 本發明提供下面（1)至（4)之具有含氧磷化硼系半導體層 之磷化硼系半導體元件。 (1)含有積層於基板上之硼（B)及磷（P)的構成元素，且 有含氧（〇)之含氧磷化硼系半導體層的磷化硼系半導體元 559900 五、發明說明（4) 件。 (2) 含氧磷化硼系半導體層中含有之氧原子濃度爲1 X l〇18cm·3以上、5 X 102()cm·3以下，具有前述特徵之前述（1) 磷化硼系半導體元件。 (3) 含氧磷化硼系半導體層之電阻率爲1〇2Ω^πι以上， 具有前述特徵之前述（1)或（2)的磷化硼系半導體元件。 (4) 含氧磷化硼系半導體層設置於非晶或多晶之磷化硼 系半導體層上，具有前述特徵之前述（1)至（3)中任一項的 磷化硼系半導體元件。 本發明爲前述（1)至（4)中任一項具有含氧磷化硼系半導 體層之磷化硼系半導體元件當中之下面記載的電晶體或發 光元件，也是利用發光元件之燈或光源。 (5) 具備前述（1)至（4)中任一項之含氧磷化硼系半導體 層的電晶體。 (6) 由含氧磷化硼系半導體層構成之緩衝層，具有前述 特徵之前述（5)電晶體。 (7) 電晶體爲在含氧磷化硼系半導體層上設置通道層之 場效型電晶體，具有前述特徵之前述（5)或（6)的電晶體。 (8) 電晶體爲在含氧磷化硼系半導體層上設有蕭特基閘 極之場效型電晶體，具有前述特徵之前述（5)至（7)中任一 項的電晶體。 (9) 具有由前述（1)至（4)中任一項之含氧磷化硼系半導 體層所構成之電流阻止層的發光元件。 559900 五、發明說明（5) (10) 發光元件爲在含氧磷化硼系半導體層構成之電流 阻止層上設置電極的發光二極體（LED)，具有前述特徵之 前述（9)的發光元件。 (11) 使用前述（10)之發光元件的燈。 (12) 使用前述（11)之燈的光源。 (13) 發光元件爲含氧磷化硼系半導體層構成之電流阻 止層以對向方式配置而在其中央之開口部上設置電極的發 光二極體（LED)，具有前述特徵之前述（9)的發光元件。 此外，本發明提供下面（14)至（17)之磷化硼系半導體元 件的製造方法。 (14) 在基板上以金屬有機化學蒸氣沉積法（MOCVD法） 積層而成之磷化硼系半導體層上，以含氧化合物爲原料添 加氧而形成含氧磷化硼系半導體層，具有前述特徵之前述 (1)至（4)中任一項的磷化硼系半導體元件之製造方法。 (15) 含氧化合物爲附有烷氧基（-OR ; R爲碳數1至12 之直鏈狀或分支狀的飽和或不飽和烷基、碳數6至20之 芳香族基或脂環基等和氧結合之基（group)。然而，前述芳 香族基之基本架構之實例爲苯環、萘環、蒽環、及菲環等 ，而芳香族基可任意以CN、鹵原子、OH、羰基、及羧基 等取代。又，前述脂環基之基本架構如環己基環。）之有 機化合物，具有前述特徵之前述（14)磷化硼系半導體元件 製造方法。 (16) 具有含氧化合物爲三烷氧基硼化合物之特徵的前 59900 五、發明說明（6) 述（14)或（15)之磷化硼系半導體元件製造方法。 (17)在基板上以250°C以上、700°C以下之溫度形成以 非晶或多晶爲主體之磷化硼系半導體層後，以700 °C以上 、120(TC以下之溫度形成含氧磷化硼系半導體層，具有前 述特徵之前述（4)之磷化硼系半導體元件製造方法。 [發明之實施形態] 本發明中，將含有如以一般式BaA1/sGaTlnimPijAs 5(〇<α^1 ' 0^/S<l ' 0 £ γ <1 ' 0<a + /S + r^l ' 0^(5<1) 標記之硼（B)及磷（P)構成元素的III-V族化合物半導體稱 爲磷化硼系半導體。又，以BaAhGaJi^mP^N, (0<α$1、0$ 冷 <1、0$7<1、0<α + /3 + 7$1、0^5<1)標 記之III-V族化合物半導體亦稱爲磷化硼系半導體。本發 明之第1實施形態中，利用含有積層於基板上之硼（B)及 磷（P)的構成元素、及含有氧之含氧磷化硼系半導體層來構 成磷化硼系半導體元件。例如，利用含氧磷化鋁·硼混晶 (Ba A1^P:0< a > α + 々=1)來構成磷化硼系半導體元件 。或者，以含氧磷化硼·鎵混晶（BaGaTP:0< a S 1、a + r =1)、或含氧磷化硼•銦混晶（ΒαΙη^ΡιίΧ a S 1)來構成磷 化硼系半導體元件。或者，利用以含氧氮磷化硼（BP ^ χΝχ:0<Χ<1)等複數V族元素爲構成元素之含氧磷化硼系 半導體來構成磷化硼系半導體元件。和由3種或4種構 成元素構成之3元或4元半導體的混晶等相比，2元結晶 較容易形成（參照前述「半導體裝置槪論」、24頁）。因 |559900 五、發明說明（7) 此，第1實施形態之磷化硼系半導體層，最好由單體之磷 化硼（BP)所構成。 在無摻雜狀態下，磷化硼系半導體層上之殘留雜質的氧 原子若爲前述（2)發明之濃度，則不必爲了形成含氧磷化硼 系半導體層而在磷化硼系半導體層中摻雜氧。另一方面， 若殘留雜質之氧原子濃度爲lXl018cm·3以下時，爲了製作 本發明之磷化硼系半導體元件，在積層磷化硼，系半導體層 時就需摻雜氧，形成氧原子濃度爲lXl018cnT3以上之含氧 磷化硼系半導體層。本發明之第2實施形態中，以金屬有 機化學蒸氣沉積法（MOCVD法）（參照Inst. Phys. Conf· Ser,， No· 129(IOP Publishing Ltd·，1 993)、157 〜162 頁）、分子 束泵晶（MBE)法（參照 J. Solid State Chem·，1 33(1 997)、 269〜2 72頁）、鹵化物（halide)法（參照①「日本結晶成長 學會誌」、Vol. 24、No. 2(1 997)、150 頁、② J · Appl · Phys·，42( 1 )( 1 97 1 )、420 〜4 24 頁）、及氫化物（hydride) 法等蒸氣沉積機構，依據殘留之氧濃度，配合需要摻雜氧 ，形成氧原子濃度爲lX1018cm_3以上含氧磷化硼系半導體 層。爲了維持半導體層之良好結晶性，含氧磷化硼系半導 體層之氧原子濃度最好爲5X102()Cnr3以下。磷化硼系半導 體層內之氧原子濃度，可以利用如一般之2次離子質量分 析法（SIMS)等分析機構來實施定量。 本發明之電阻率爲1〇2Ω %πι以上之含氧磷化硼系半導 體層，可有效應用於半導體元件之、防止元件動作電流漏 r559900 五、發明說明（8) 之高電阻層上。電阻率會隨著磷化硼系半導體層內部含有 之氧原子濃度而變化。會呈現氧原子濃度愈高則電阻率亦 愈高的傾向。這是因爲半導體層中之氧對電子或電子空洞 會發揮補償作用。因此，本發明之第3實施形態中，就是 利用適度調整氧之摻雜量形成電阻率爲102Ωκηι以上磷化 硼系半導體層，並利用其來製作磷化硼系半導體元件。電 阻率（比電阻）可利用一般之霍爾（Hall)效應測量機構來測 得。 例如，利用具有三乙基硼（（C2H5) 3B)/硼烷（BH3)/膦（PH3) 反應系、三乙基硼/乙硼烷（B2H6)/膦反應系、或三乙基硼 及第三丁基膦等有機磷化合物之反應系的常壓（近大氣壓） 或減壓MOCVD法實施氧摻雜，而得到氧原子濃度爲lx l〇18cnr3以上之含氧磷化硼系半導體層。氧之摻雜原料如 氧氣（〇2)。例如，利用（C2H5) 3B/ PH3/ H2反應系之 MOCVD法成磷化硼系半導體層成長時，以每分鐘20cc添 加含有約50vol. ppm(體積百萬分率）之氧的氫氣，在 8〇〇°C下使其成長，則可得到電阻率約1〇3Ωκιη以上之高 電阻磷化硼（ΒΡ)單晶層。爲了得到單晶之含氧磷化硼系半 導體層，積層溫度最好爲超過700°C之高溫。然而，磷化 硼系半導體層之層積溫度若爲超過1 200°C之高溫時，磷化 硼結晶層內之單體BP會明顯轉變成如B13P2等之聚合體（ 參照 J. Amer· Ceramic Soc·，47(1 964)、44 〜46 頁），而無 法獲得均質之磷化硼層。 -10- 五、發明說明（9) 爲了獲得含氧磷化硼系半導體層，其他適當之氧添加原 料如附有含氧之官能基的有機硼化合物。尤其是，附有烷 氧基（-OR;R爲碳數1至12之直鏈狀或分支狀的飽和或不 飽和烷基、碳數6至20之芳香族基或脂環基等和氧結合 之基。然而，前述芳香族基之基本架構之實例爲苯環、萘 環、蒽環、及菲環等，而芳香族基可任意以CN、鹵原子 、OH、羰基、及羧基等取代。又，前述脂環基之基本架 構如環己基環。）之有機化合物，最適合當做氧添加原料 。例如，若以構成磷化硼系半導體層之元素--烷氧化合物 做爲氧添加原料，則在積層磷化硼系半導體層時，具有很 容易形成含氧磷化硼系半導體層之優點。構成元素之烷氧 化合物如三甲氧基硼（B(OCH3) 3;融點与-29°C、沸點％ + 69°C )、三乙氧基硼（B(OC2H5)3 ;融點与-85 °C、沸點与+ 117°C)、及異丙氧基硼（B(i-OC3H7)3 ;沸點与+140°C)等。 又，含低級烷基之硼烷氧化合物之融點較低，而沸點又高 於室溫，故很容易以一般之發泡機構即可添加於反應系內 ，是十分便利的液體原料。含氧磷化硼系半導體層之構成 元素--磷（P)之烷氧化合物則爲磷酸甲酯（P〇(〇CH3)3)、亞 磷酸三甲酯（P(〇CH3)3)、磷酸三乙酯（PO(OC2H5)3)、亞磷 酸三乙酯（P(0C2H5)3)等。這些磷烷氧化合物在室溫爲液體 ，可以利用發泡機構添加於反應系。又，砷（As)之烷氧化 合物有三乙氧基砷（As(OC2H5)3;沸點与+165°C)等。磷化硼 系半導體之構成元素的烷氧化合物中，前述之硼烷氧化合 -11- 559900 五、發明說明（1〇) 物因毒性較其他磷或砷化合物小，故特別適合用做氧添加 原料。 本發明之含氧磷化硼系半導體設置於如矽單晶（Si)、砷 化鎵（GaAs)、磷化鎵（GaP)、氮化鎵（GaN)等III-V旋化合 物半導體單晶、藍寶石（α -A1203單晶）及氧化鋅（ΖηΟ)等氧 化物單晶、或鉬（Mo)等之金屬的結晶基板表面上。又，磷 硼（BP)單晶亦可當做基板使用（參照j. Electrochem. Soc·， 1 2 0(1 973)、802〜806頁）。然而，BP以外之基板材料及 BP系半導體層一般因晶格失配，晶格失配等導致之移位 等結晶缺陷的增長，而不易安定地得到結晶性優良之磷化 硼系半導體層。故，本發明之第4實施形態中，在結晶基 板上以含氧磷化硼系半導體層之底層方式，配置可緩和晶 格失配之磷化硼系半導體層當做緩衝層。 當做緩衝層使用磷化硼系半導體層，在生成態以非晶或 多晶構成，其可發揮之緩和晶格失配的作用，比單晶構成 時更大。由生成狀態之非晶或多晶磷化硼系半導體構成的 緩衝層（磷化硼系緩衝層），在前述氣相成長機構中，可以 25 0°C〜70CTC之積層溫度形成。積層溫度愈低，則愈容易 形成以非晶爲主體之磷化硼系緩衝層。然而，250 °C以下 時，因積層用原料無法充份分解，會由積層不安定之問題 。在超過大約450°C之積層溫度時，則容易形成以多晶爲 主體之磷化硼系緩衝層。若爲超過700°C之溫度，則容易 形成無法充份發揮晶格失配緩和效果之單晶層，故應避免 -12- 559900 五、發明說明（11) 。以緩和晶格失配爲目的之磷化硼系緩衝層的層厚應約爲 2nm〜5 Onm。將適當層厚之磷化硼系緩衝層配置於基板及 含氧磷化硼系半導體層間，同時具有另外的效果，例如， 可避免因兩材料間之熱膨漲差異而導致含氧磷化硼層從基 板表面上剝離。緩衝層爲非晶層或多晶層，一般可以X線 繞射法或電子束繞射法等來解析。 磷化硼系緩衝層可以由故意不摻雜雜質之無摻雜層所構 成。又，積層磷化硼系緩衝層時，添加η型或p型雜質， 可以得到具導電性之緩衝層。例如，添加屬於II族之鋅 (Ζη)及鎂（Mg)，可以得到ρ型磷化硼系緩衝層。又，添加 矽（Si)或錫（Sn)等之第IV族元素，則可得到η型磷化硼系 緩衝層。又，添加硫（S)及硒（Se)亦可得到η型磷化硼系緩 衝層。又，添加時可以利用離子植入法植入這些元素之離 子。不論採用摻雜或離子植入，添加過度雜質元素會損害 磷化硼系緩衝層之結晶性，故元素之添加量，以原子濃度 而言，最好爲5x 1019cm·3以下。又，亦可利用摻雜氧（〇) 之高電阻含氧磷化硼系半導體層來形成緩衝層。氧環境下 ’具有容易形成多晶磷化硼層之特徵（參照日本特開2000-35 1 692號公報）。 爲了獲得合倂含有前述η型或ρ型雜質及氧之磷化硼系 緩衝層，適合採用含有η型或ρ型雜質元素之烷氧化合物 。Si之烷氧化合物如四甲氧基矽烷（Si(〇CH3)4;沸點与+ 121 °C)、四乙氧基矽烷（Si(OC2H5)4;融點与- 77°C、沸點与 -13- 559900 五、發明說明（12) + 166t)、異丙氧基矽烷（Si(i-〇C3H7)4;沸點 4+226°C)等 。又，鋅（Zn)則如二甲氧基鋅（Zn(OCH3)2)等。這些烷氧化 合物中，因爲含有之附與導電性的元素（在上述實例爲Si 、Zn)、以及對其進行電氣補償之非活化氧（〇)的比率爲 1 : 1，以單純之推論，應很容易可以得到高電阻之含氧磷 化硼系結晶層。然而，因爲各雜質元素進入結晶層內之機 率並不一定相同，故因爲實際情況進入結晶層之雜質量的 不均一性，無法保証一定可以獲得高電阻層。因此，例如 爲了全部形成導電性結晶層’除了則述院氧化合物以外， 應將如氧-氫（H2)、氧-氮（N2)、或氧-氬（Α〇等含氧混合氣 體當做另一氧添加源，亦是獲得高電阻層的一種方法。 前述含氧磷化硼系半導體層因爲是高電阻，故可有效抑 制元件動作電流之沒有必要的漏電。所以，本發明之第6 實施形態中，就是利用此種高電阻層，構成具優良特性之 電晶體，例如，異質結雙極電晶體（ΗΒΤ)或場效型電晶體 (FET) 〇例如，將本發明之高電阻磷化硼系半導體層當做 緩衝層而連接於活性層之下方的蕭特基連接型 FET(MESFET)中，因可抑制汲極電流對緩衝層之漏電，而 具有良好之閘極夾斷特性。又，因而可得到具有優良跨導 (gm)之MESFET。又，本發明之含氧磷化硼系半導體高電 阻層上若具有2次元電子移動層（通道層），則可提供同時 發揮良好閘極夾斷特性及跨導之2次元電子場效型電晶體 (TEGFET)。 -14-559900 V. Description of the Invention (1) [Technical Field of the Invention] The present invention and the use of a high-resistance boron phosphide (BP) -based semiconductor layer that can effectively avoid unnecessary leakage or flow of element operating currents constitute a boron phosphide-based semiconductor device. Technology related. [Know-how] Group III-V compound semiconductors composed of boron (B) and group V elements belonging to the periodic law of elements, boron phosphide (BP) is well known (see Nature, 179 (No · 4569) (1 957), p. 1 075). Regarding boron phosphide, there have been various reports on band gates. For example, B. Stone et al. Found that the polycrystalline BP film has a room temperature band gate of about 6 electron volts (eV) (see Phys. Rev. Lett ·, Vo 1. 4, No. 6 (1960), pages 282 ~ 284 ). In addition, Manca proposed a frequency band of 4.2 eV (see J. Phys. Chem. Solids, 20 (1961), 268 ·). However, the band gap of boron phosphide has conventionally been regarded as about 2 eV (see ① RCA Review, 25 (1964), pages 159 to 167, ② Z. anory. Allg. Chem., 349 (1 967), 151 to 157 pages, and ③ by Teramoto Iwa, "Semiconductor Device Theory" Peifeng Hall, March 30, 995, first edition, 28 pages). In addition, the Phillips ionic bond degree of Boron Bronze has only a relatively low 0.006 (refer to PHILLIPS, "Semiconductor Bond Theory" (Yoshioka Bookstore Co., Ltd., issued on July 25, 1985, 3rd Edition), 49 ~ (Page 51), which has the characteristics of easily obtaining a conductive semiconductor layer (see Japanese Patent Application Laid-Open No. 2-288388). Therefore, it has been known in the past that some people use the conductive BP layer as a current compression layer constituting a III-nitride semiconductor laser diode (LD). V. Description of the invention (2) Example (refer to Japanese Patent Application Laid-Open No. 1 0-242569 Bulletin). The light-emitting diode (LED) is used as a buffer layer on a single crystal substrate (see Japanese Patent Application Laid-Open No. 2-275682). On the other hand, in order to make boron phosphide have a relatively large electron effective mass (refer to the aforementioned Japanese Patent Application Laid-Open No. 2-275 682), it is difficult to obtain n-type low-resistance BP crystals (refer to the aforementioned Japanese Patent Application Laid-Open No. 2-288388). Bulletin). From the viewpoint of the nature of crystallography, sphalerite type (refer to PHILLIPS, "Semiconductor Theory" (Yoshioka Co., Ltd., issued on July 25, 1985, 3rd edition), pages 14 to 15) Boron phosphide has a lattice constant of 4.53 8A, which is approximately the same as that of gallium nitride (c-GaN: lattice constant = 4.51OA). In addition, the {110} lattice plane interval of the BP is approximately 3.209A, and is slightly equal to the a-axis lattice constant of 3.180A of the hexagonal GaN (h-GaN) (refer to the aforementioned "Semiconductor Device Theory", page 28). In the past, the Schottky connection field-effect transistor (MESFET) was constructed by the connection structure of the BP buffer layer and the GaN crystal layer using this good lattice similarity (see Japanese Patent Application Laid-Open No. 2000-3 1 1 64). Bulletin). Boron phosphide (BP) is an indirect transition type semiconductor (see "Semiconductor Device Theory", page 28). Compared with direct transition type semiconductors, indirect transition type semiconductors result in less radiative recombination efficiency of the light-emitting carrier (see K. Seeger, "Physics of Semiconductors (Part 2)", Yoshioka Bookstore, June 1991 First edition, 25th issue, page 392). Therefore, boron phosphide of indirect transition type semiconductors is not used as the light emitting layer (active layer) of LED and LD, but is used as the current compression layer as described above. In addition, "59900 V. Description of the invention (3) is applied as a buffer layer in a field effect transistor. [Problems to be Solved by the Invention] When a buffer layer used as a field-effect transistor is used as an example, in order to prevent leakage of the drain current, a high-resistance crystal layer must be used as the buffer layer. However, the band gap of conventional boron phosphide at room temperature is about 2eV lower (refer to the aforementioned ① RCAReview and ② Z. anory. Allg. Chem ·), because it is a crystal with low ion connectivity and is easy to attach. Electrical conductivity makes it difficult to obtain a high-resistance buffer layer suitable for MESFET applications by conventional techniques. In addition, the conventional technology includes a technique for manufacturing a 2 eV band gap boron phosphide and an aluminum nitride (A1N) -based mixed crystal superlattice structure to obtain a structure having a room temperature band gap of 2 eV or higher (see the foregoing). Japanese Patent Laid-Open No. 2-275682). However, the problem with conventional technology is that complex structures must be used to form superlattice structures. The object of the present invention is to provide a boron phosphide-based semiconductor element and a method for manufacturing the same, which can not only overcome the shortcomings of the conventional technology, but also form a high-resistance boron phosphide-based semiconductor layer without the traditional complicated steps, and use the A high-resistance boron phosphide-based semiconductor layer constitutes a boron phosphide-based semiconductor element. [Means for Solving the Problems] The present invention provides boron phosphide-based semiconductor elements having an oxygen-containing boron phosphide-based semiconductor layer (1) to (4) below. (1) Boron phosphide-based semiconductor element containing constituent elements of boron (B) and phosphorus (P) laminated on a substrate and containing an oxygen-containing boron phosphide-based semiconductor layer containing oxygen (0) 559900 5. Description of the invention (4 pieces. (2) The oxygen atomic boron-based semiconductor layer contains oxygen atoms having a concentration of 1 X 1018 cm · 3 or more and 5 X 102 () cm · 3 or less. element. (3) The boron phosphide-based semiconductor element having the above-mentioned characteristics (1) or (2), the resistivity of the oxygen-containing boron phosphide-based semiconductor layer being greater than or equal to 10 2 Ω ^ πm. (4) An oxygen-containing boron phosphide-based semiconductor layer is provided on the amorphous or polycrystalline boron phosphide-based semiconductor layer, and the boron phosphide-based semiconductor element according to any one of the above (1) to (3) has the aforementioned characteristics. . The present invention is the transistor or light-emitting element described below among the boron phosphide-based semiconductor elements having an oxygen-containing boron phosphide-based semiconductor layer according to any one of (1) to (4) above, and is also a lamp or light source using the light-emitting element. . (5) A transistor including an oxygen-containing boron phosphide-based semiconductor layer according to any one of (1) to (4) above. (6) A buffer layer composed of an oxygen-containing boron phosphide-based semiconductor layer, and the aforementioned (5) transistor having the aforementioned characteristics. (7) The transistor is a field-effect transistor in which a channel layer is provided on an oxygen-containing boron phosphide-based semiconductor layer, and the transistor described in (5) or (6) above. (8) The transistor is a field-effect transistor provided with a Schottky gate on an oxygen-containing boron phosphide-based semiconductor layer. The transistor has any one of the characteristics (5) to (7) described above. (9) A light-emitting element having a current blocking layer composed of an oxygen-containing boron phosphide-based semiconductor layer according to any one of (1) to (4) above. 559900 V. Description of the invention (5) (10) The light-emitting element is a light-emitting diode (LED) provided with an electrode on a current blocking layer composed of an oxygen-containing boron phosphide-based semiconductor layer. element. (11) A lamp using the light-emitting element of (10) above. (12) A light source using the lamp of (11) above. (13) The light-emitting element is a light-emitting diode (LED) in which a current-blocking layer composed of an oxygen-containing boron phosphide-based semiconductor layer is arranged in an opposite manner and an electrode is provided on an opening portion in the center thereof. ) Light-emitting element. In addition, the present invention provides a method for producing a boron phosphide-based semiconductor device (14) to (17) below. (14) An oxygen-containing boron phosphide-based semiconductor layer is formed by adding oxygen to a boron phosphide-based semiconductor layer formed by laminating a metal organic chemical vapor deposition method (MOCVD method) on a substrate using an oxygen-containing compound as a raw material. The method for producing a boron phosphide-based semiconductor device according to any one of the above (1) to (4). (15) The oxygen-containing compound is an alkoxy group (-OR; R is a linear or branched saturated or unsaturated alkyl group having 1 to 12 carbon atoms, and an aromatic group or alicyclic ring having 6 to 20 carbon atoms And other groups that combine with oxygen. However, examples of the basic structure of the aforementioned aromatic groups are benzene ring, naphthalene ring, anthracene ring, and phenanthrene ring, etc., and the aromatic group may be arbitrarily CN, halogen atom, OH (Carbonyl), carboxyl, etc., and the basic structure of the aforementioned alicyclic group is a cyclohexyl ring.) An organic compound having the aforementioned characteristics (14) A method for manufacturing a boron phosphide-based semiconductor device. (16) The first 59900 which has the characteristics that the oxygen-containing compound is a trialkoxyboron compound. 5. Description of the invention (6) The method for manufacturing a boron phosphide-based semiconductor device according to (14) or (15). (17) After forming an amorphous or polycrystalline boron phosphide-based semiconductor layer at a temperature of 250 ° C or higher and 700 ° C or lower on the substrate, the semiconductor layer is formed at a temperature of 700 ° C or higher and 120 ° C or lower. The boron oxyphosphide-based semiconductor layer has the above-mentioned feature (4) of the boron phosphide-based semiconductor device manufacturing method. [Embodiment of the Invention] In the present invention, a general formula BaA1 / sGaTlnimPijAs 5 (0 < α ^ 1 '0 ^ / S < l' 0 £ γ < 1 '0 < a + / S + r ^ l' 0 ^ (5 < 1) Labeled boron (B) and phosphorus (P) constituent elements Group III-V compound semiconductors are called boron phosphide-based semiconductors. In addition, BaAhGaJi ^ mP ^ N, (0 < α $ 1, 0 $ cold < 1, 0 $ 7 < 1, 0 < α + / 3 + 7 The $ 1-, 0 ^ 5 < 1) labeled III-V compound semiconductor is also referred to as a boron phosphide-based semiconductor. In the first embodiment of the present invention, boron (B) and phosphorus (P) which are laminated on a substrate are used. And an oxygen-containing boron phosphide-based semiconductor layer containing oxygen to form a boron phosphide-based semiconductor device. For example, an oxygen-containing aluminum phosphide-boron mixed crystal (Ba A1 ^ P: 0 < a > α + 々 = 1) to form a boron phosphide-based semiconductor element Or, the phosphorus is composed of oxygen-containing boron phosphide · gallium mixed crystal (BaGaTP: 0 < a S 1, a + r = 1), or oxygen-containing boron phosphide · indium mixed crystal (ΒαΙη ^ ΡΙί a a 1). Boron phosphide-based semiconductor devices. Or, boron phosphide-based semiconductors are formed by using boron phosphide-based semiconductors containing a plurality of group V elements such as oxygen-containing nitrogen boron phosphide (BP ^ χχχ: 0 < X < 1). Element. Compared to a mixed crystal of a ternary or quaternary semiconductor composed of three or four constituent elements, a binary crystal is easier to form (see "Semiconductor Device Theory", page 24). | 559900 五Explanation of the invention (7) Therefore, the boron phosphide-based semiconductor layer of the first embodiment is preferably composed of a single boron phosphide (BP). In an undoped state, the If the oxygen atoms of the residual impurities are in the concentration of the above (2) invention, it is not necessary to dope oxygen in the boron phosphide-based semiconductor layer in order to form an oxygen-containing boron phosphide-based semiconductor layer. When the concentration is 1 × 1018 cm · 3 or less, in order to fabricate the boron phosphide-based semiconductor device of the present invention, phosphating In the case of the semiconductor layer, it is necessary to dope oxygen to form an oxygen-containing boron phosphide-based semiconductor layer having an oxygen atom concentration of 1 × 1018cnT3 or more. In the second embodiment of the present invention, a metal organic chemical vapor deposition method (MOCVD method) is used (see Inst. Phys. Conf · Ser, No. 129 (IOP Publishing Ltd ·, 1 993), pages 157 to 162), molecular beam pump crystal (MBE) method (see J. Solid State Chem ·, 1 33 (1 997 ), 269 ~ 2 pages 72), halide method (refer to ① "Journal of the Japanese Society for Crystal Growth", Vol. 24, No. 2 (1 997), 150 pages, ② J · Appl · Phys ·, 42 (1) (1 97 1), 420 ~ 4 24 pages), and hydride method, and other vapor deposition mechanisms, according to the residual oxygen concentration, combined with the need to dope oxygen to form oxygen atom concentration of 1X1018cm_3 or more oxygen-containing phosphorus Boron-based semiconductor layer. In order to maintain the good crystallinity of the semiconductor layer, the oxygen atom concentration of the oxygen-containing boron phosphide-based semiconductor layer is preferably 5X102 () Cnr3 or less. The oxygen atom concentration in the boron phosphide-based semiconductor layer can be quantified by an analysis mechanism such as a general secondary ion mass analysis method (SIMS). The present invention has an oxygen-containing boron phosphide-based semiconductor layer having a resistivity of more than 10 Ω% πm, and can be effectively applied to a semiconductor device to prevent leakage of an operation current of the device. R559900 V. High-resistance layer of the invention description (8). The resistivity changes depending on the oxygen atom concentration contained in the boron phosphide-based semiconductor layer. The higher the oxygen atom concentration, the higher the resistivity. This is because the oxygen in the semiconductor layer compensates for electrons or electron holes. Therefore, in the third embodiment of the present invention, a boron phosphide-based semiconductor layer having a resistivity of 102Ωκηm or more is formed by appropriately adjusting the doping amount of oxygen, and a boron phosphide-based semiconductor device is manufactured by using the same. The resistivity (specific resistance) can be measured using a general Hall effect measurement mechanism. For example, a triethylboron ((C2H5) 3B) / borane (BH3) / phosphine (PH3) reaction system, a triethylboron / diborane (B2H6) / phosphine reaction system, or triethylboron and An oxygen-doped boron-based phosphide-based semiconductor layer having an oxygen atom concentration of 1 × 1018cnr3 or more is obtained by performing oxygen doping under a normal pressure (near atmospheric pressure) or a reduced pressure MOCVD method of an organic phosphorus compound such as a third butylphosphine. Oxygen-doped raw materials such as oxygen (02). For example, when using a (C2H5) 3B / PH3 / H2 reaction-based MOCVD method to grow a boron phosphide-based semiconductor layer, 20 cc per minute is added with hydrogen containing about 50 vol. Ppm (volume parts per million) of oxygen. If it is grown at OO ° C, a high-resistance boron phosphide (BP) single crystal layer with a resistivity of about 103 Ω or more can be obtained. In order to obtain a single crystal boron-based phosphide-based semiconductor layer, the lamination temperature is preferably a high temperature exceeding 700 ° C. However, if the lamination temperature of the boron phosphide-based semiconductor layer is higher than 1 200 ° C, the monomer BP in the boron phosphide crystal layer will obviously change into a polymer such as B13P2 (see J. Amer · Ceramic Soc ·, 47 (1 964), 44 ~ 46), and a homogeneous boron phosphide layer cannot be obtained. -10- V. Description of the invention (9) In order to obtain an oxygen-containing boron phosphide-based semiconductor layer, other suitable oxygen-added materials such as an organic boron compound with an oxygen-containing functional group are attached. In particular, an alkoxy group (-OR; R is a linear or branched saturated or unsaturated alkyl group having 1 to 12 carbon atoms, an aromatic group or alicyclic group having 6 to 20 carbon atoms, etc., and oxygen However, examples of the basic structure of the aforementioned aromatic group are benzene ring, naphthalene ring, anthracene ring, and phenanthrene ring, etc., and the aromatic group may be optionally substituted with CN, halogen atom, OH, carbonyl group, and carboxyl group. Also, the basic structure of the aforementioned alicyclic group is a cyclohexyl ring.) Organic compounds are most suitable as raw materials for oxygen addition. For example, if an alkoxy compound, which is an element constituting a boron phosphide-based semiconductor layer, is used as an oxygen addition raw material, it is advantageous to easily form an oxygen-containing boron phosphide-based semiconductor layer when the boron phosphide-based semiconductor layer is laminated. The constituent alkoxy compounds such as trimethoxyboron (B (OCH3) 3; melting point and -29 ° C, boiling point% + 69 ° C), triethoxyboron (B (OC2H5) 3; melting point and- 85 ° C, boiling point and + 117 ° C), and isopropoxy boron (B (i-OC3H7) 3; boiling point and + 140 ° C). In addition, the lower alkyl-containing boralkoxy compound has a lower melting point and a boiling point higher than room temperature, so it can be easily added to the reaction system by a general foaming mechanism, and is a very convenient liquid raw material. The constituent elements of the oxygen-containing boron phosphide-based semiconductor layer, the alkoxy compounds of phosphorus (P) are methyl phosphate (P0 (〇CH3) 3), trimethyl phosphite (P (〇CH3) 3), Triethyl phosphate (PO (OC2H5) 3), triethyl phosphite (P (0C2H5) 3), etc. These phosphoalkoxy compounds are liquid at room temperature and can be added to the reaction system using a foaming mechanism. Also, alkoxides of arsenic (As) include triethoxyarsenic (As (OC2H5) 3; boiling point and + 165 ° C). Among the alkoxy compounds of the constituent elements of boron phosphide-based semiconductors, the aforementioned borane is oxidized-11- 559900 V. Description of the invention (1) Since the substance is less toxic than other phosphorus or arsenic compounds, it is particularly suitable for oxygen addition raw material. The oxygen-containing boron phosphide-based semiconductor of the present invention is provided in a III-V spin compound semiconductor single crystal such as silicon single crystal (Si), gallium arsenide (GaAs), gallium phosphide (GaP), and gallium nitride (GaN). Sapphire (α-A1203 single crystal) and oxide single crystals such as zinc oxide (ZηΟ), or crystal surfaces of metals such as molybdenum (Mo). Moreover, a single crystal of boron phosphorus (BP) can also be used as a substrate (see j. Electrochem. Soc., 120 (1 973), pages 802-806). However, substrate materials other than BP and BP-based semiconductor layers generally increase in crystal defects such as shift due to lattice mismatch, lattice mismatch, etc., and it is not easy to obtain boron phosphide-based semiconductor layers with excellent crystallinity in a stable manner. Therefore, in the fourth embodiment of the present invention, a boron phosphide-based semiconductor layer capable of alleviating lattice mismatch is provided as a buffer layer on the crystalline substrate with a bottom layer of an oxygen-containing boron phosphide-based semiconductor layer. As a buffer layer, a boron phosphide-based semiconductor layer is used, which is composed of amorphous or polycrystalline in the as-grown state, and it can play a role of mitigating lattice mismatch, which is greater than that in the case of a single crystal structure. A buffer layer (a boron phosphide buffer layer) composed of an amorphous or polycrystalline boron phosphide-based semiconductor in a generated state can be formed at a lamination temperature of 25 ° C to 70CTC in the aforementioned vapor phase growth mechanism. The lower the lamination temperature, the easier it is to form a boron phosphide buffer layer mainly composed of amorphous. However, when the temperature is below 250 ° C, the raw materials for lamination cannot be fully decomposed, which may cause the lamination to be unstable. When the lamination temperature exceeds about 450 ° C, a boron phosphide buffer layer mainly composed of polycrystals is easily formed. If the temperature exceeds 700 ° C, it is easy to form a single crystal layer that cannot fully exert the effect of mitigating the lattice mismatch, so it should be avoided -12- 559900 V. Description of the invention (11). The layer thickness of the boron phosphide buffer layer for the purpose of mitigating the lattice mismatch should be about 2nm ~ 5 Onm. An appropriate thickness of the boron phosphide buffer layer is arranged between the substrate and the oxygen-containing boron phosphide-based semiconductor layer, and at the same time, it has another effect, for example, it can avoid the oxygen-containing boron phosphide due to the difference in thermal expansion between the two materials. The layer is peeled from the substrate surface. The buffer layer is an amorphous layer or a polycrystalline layer, and is generally analyzed by an X-ray diffraction method or an electron beam diffraction method. The boron phosphide-based buffer layer may be composed of an undoped layer that is intentionally not doped with impurities. When a boron phosphide buffer layer is laminated, an n-type or p-type impurity is added to obtain a conductive buffer layer. For example, by adding zinc (Zη) and magnesium (Mg) belonging to Group II, a p-type boron phosphide buffer layer can be obtained. Further, by adding a Group IV element such as silicon (Si) or tin (Sn), an n-type boron phosphide buffer layer can be obtained. Further, by adding sulfur (S) and selenium (Se), an n-type boron phosphide-based buffer layer can be obtained. In addition, ions of these elements can be implanted by ion implantation during addition. Regardless of doping or ion implantation, the addition of excessive impurity elements will impair the crystallinity of the boron phosphide buffer layer. Therefore, in terms of atomic concentration, the amount of elements is preferably 5x 1019 cm · 3 or less. The buffer layer may be formed by using a high-resistance oxygen-containing boron phosphide-based semiconductor layer doped with oxygen (0). In an oxygen environment, it has a feature that a polycrystalline boron phosphide layer is easily formed (see Japanese Patent Application Laid-Open No. 2000-35 1 692). In order to obtain a boron phosphide buffer layer containing the aforementioned n-type or p-type impurity and oxygen, an alkoxy compound containing an n-type or p-type impurity element is preferably used. Si alkoxy compounds such as tetramethoxysilane (Si (〇CH3) 4; boiling point and + 121 ° C), tetraethoxysilane (Si (OC2H5) 4; melting point and-77 ° C, boiling point and- 13- 559900 V. Description of the invention (12) + 166t), isopropoxysilane (Si (i-〇C3H7) 4; boiling point 4 + 226 ° C) and so on. Zinc (Zn) is, for example, dimethoxyzinc (Zn (OCH3) 2). Among these alkoxy compounds, the ratio of the element (Si, Zn) attached to the conductive material and the non-activated oxygen (0) that electrically compensates it is 1: 1. In simple terms, It should be easy to obtain a high-resistance oxygen-containing boron phosphide-based crystal layer. However, because the probability of each impurity element entering the crystal layer is not necessarily the same, the heterogeneity of the impurity mass entering the crystal layer cannot guarantee that a high-resistance layer can be obtained. Therefore, for example, in order to form a conductive crystalline layer, in addition to the oxygen compounds described above, an oxygen-containing mixed gas such as oxygen-hydrogen (H2), oxygen-nitrogen (N2), or oxygen-argon (A〇) should be used as another An oxygen addition source is also a method for obtaining a high-resistance layer. The aforementioned oxygen-containing boron phosphide-based semiconductor layer has high resistance, so it can effectively suppress unnecessary leakage of the element's operating current. Therefore, the sixth implementation of the present invention In the form, such a high-resistance layer is used to form a transistor with excellent characteristics, such as a heterojunction bipolar transistor (ΗBT) or a field-effect transistor (FET). For example, the high-resistance phosphating of the present invention The boron-based semiconductor layer is used as a buffer layer and is connected to the Schottky-connected FET (MESFET) below the active layer, which has a good gate pinch-off characteristic because it can suppress the leakage of the drain current to the buffer layer. Therefore, a MESFET having excellent transconductance (gm) can be obtained. In addition, if a two-dimensional electron moving layer (channel layer) is provided on the high-resistance layer of the oxygen-containing boron phosphide semiconductor of the present invention, a good gate clamp can be provided at the same time Fault characteristics and Transconductance 2D Electronic Field Effect Transistor (TEGFET) -14-
五、發明說明（13) 在單晶基板上以非晶或多晶爲主體之緩衝層上設置含氧 磷化硼系半導體層’會形成可更有效防止元件動作電流漏 電之高電阻含氧磷化硼系半導體層。例如，利用非晶之緩 衝層的作用’可以獲得導致動作電流短路之失配位移較少 的高電阻含氧磷化硼系半導體層。又，利用和此良質高電 阻含氧磷化硼系半導體層之晶格相配的半導體材料構成通 道層，則會明顯提高電子移動度，除了可實現良好夾斷特 性以外，尙可獲得雜訊指數較小之低雜訊MESFET。本發 明之第7實施形態的晶格相配系積層構造的較佳實例，就 是在高電阻含氧磷化硼（BP:晶格常數=4.5 3 8人）層上，連接 由氮組成比爲3%( = 0.03)之等軸晶體的η型氮磷化鎵 (GaNQ.^P。^:晶格常數=4·5 3 8Α)所構成的通道層。又，亦 可爲在高電阻含氧氮磷化硼上設置由等軸晶體 氮化鎵（c-GaN)構成之通道層。 含氧磷化硼系半導體高電阻層並非只配置於通道層之正 下方而已，亦可當做以形成蕭特基閘極爲目的之閘極（gate) 形成層。本發明之第8實施形態中，因爲閘極係形成於高 電阻之含氧磷化硼系半導體層上，故可形成漏電電流較少 的閘極。因此，可提供跨導較大、夾斷特性優良之場效型 電晶體。因爲MESFET之構成上，有時會將源極/汲極之 兩電極和閘極都設置在高電阻含氧磷化氫系半導體層上， 故高電阻含氧磷化硼系半導體層之層厚，應爲構成此二電 極之材料的合金前緣能浸透、到達活性層、或是TEGFET -15- 559900 五、發明說明（14) 時可充份浸透、到達電子供應層之厚度。一般而言，以形 成蕭特基閘極爲目的之高電阻含氧磷化硼系半導體層的層 厚約爲100奈米（nm)以內。又，高頻用MESFET之蕭特基 電極之構成，亦可爲鈦（Ti)、白金（Pt)、或鉬（Mo)等高融 點金屬、或由其構成之層所積層而成之多層構造。 除了前述電子裝置用途以外，本發明之第9實施形態亦 可將高電阻含氧磷化硼系半導體層應用於發光元件上。發 光元件上以故意阻礙元件動作電流流通爲目的之電流阻止 層上，應用此磷化硼係高電阻半導體層特別有效。例如， 將含氧磷化硼系半導體層當做電流阻止層使用，可以構成 具有使元件動作電流優先流至外部開口之發光區域之機能 的發光二極體（LED)。若以發揮電流阻止作用而配置高電 阻磷化硼系半導體層，因可使元件動作電流集中流通開口 發光區域，可實現有效率之光電轉換，而提供高發光強度 之 LED。 基座電極之水平剖面的最大剖面積基座電極對被積 層層之投影區域的平面積）、及敷設電流阻止層之平面積 ( = S)有極端差異時，無法獲得高發光強度之發光元件。例 如，電流阻止層之平面積相對於基座電極之平面積爲極小 時（亦即S/S。《1)，無法充份防止元件動作電流之短路電 流流至基座電極之正下方區域。因此，因爲元件動作電流 無法有效流至開口發光區域，故無法獲得具有充份發光強 度之發光元件。另一方面，若S/SJ 1，則因爲電流阻止 -16- 559900 五、發明說明（15) 層佔有大部份開口發光區域，會縮小元件動作電流可流通 之區域。發光元件、尤其是LED之S/S。的範圍應爲0.7以 上、1.2以下。 本發明之電流阻止型LED，在本發明之第1〇實施形態 中，係在以流通動作電流爲目的之基座（pad)電極的正下方 配置高電阻含氧磷化硼系半導體層。亦即，在相當於基座 電極之投影區域，例如，構成單異質（SH)或雙異質（DH)連 接構造發光部之包覆（clad)層表面上，配置含氧磷化硼系 半導體層。基座電極及高電阻含氧磷化硼系半導體層之間 ，則以覆蓋基座電極之投影區域以外的開口發光區域表面 方式插入導電性層。利用此種配置，經由基座電極提供之 元件動作電流，會因爲高電阻含氧磷化硼系半導體層的存 在，而阻止其流至基座電極之正下方區域（亦即，不易對 外部發光之區域），相反的，會優先流至開放發光區域。 又，高電阻含氧磷化硼系半導體層應可當做雷射二極體 (LD)用之電流壓縮層。具體說明本發明之第11實施形態 ，首先，就是以連接當做DH連接型發光部之包覆層表面 方式，設置當做電流壓縮層之高電阻含氧磷化硼系半導體 層。其次，採用眾所皆知之光石版印刷技術的選擇圖案化 技術，以濕式蝕刻或電漿蝕刻等’對電流壓縮層之中央部 進行帶狀蝕刻，形成開口部。利用此方式’殘留之電流壓 縮層會隔著帶狀開口部相對。其次，將歐姆電極連接於使 電流壓縮層開口部外露之包覆層等之表面。一般而言’ n -17- 559900 五、發明說明（16) 型用或P型用之歐姆電極的平面形狀和開口部之平面形狀 相似。對電流壓縮層實施此加工，利用電流壓縮層阻止電 流流通之作用，可使歐姆電極提供之元件動作電流只流入 連接著電極之特定區域。因爲和發光部之平面積相比，特 定區域--亦即前述開口部之表面積較小，故高密度動作電 流會集中流入開口部正下方之發光部。因此，可以獲得良 好之受激發射的雷射光振盪。 傳統技術上，LD用途之電流壓縮層係由和包覆層等基 底層相對之電導型磷化硼系半導體所構成（參照前述曰本 特開平10-242 5 69號公報）。例如，針對p型包覆層配置η 型磷化硼系半導體層。然而，傳統技術上，因爲電子有效 質量之緣故，不容易獲得可以和當做電流壓縮層之ρ型磷 化硼系半導體層相比的η型磷化硼系半導體層。然而，本 發明因爲利用含有氧而形成高電阻之含氧磷化硼系半導體 層，故對Ρ型基底層亦可容易形成電流壓縮層。亦即，具 有下述優點，就是在添加氧而形成高電阻之含氧磷化硼系 半導體層上，可以在和被積層層之導電型式無關的情形下 ，形成泛用的電流阻止層。 由本發明之LED，可以構成高亮度之發光二極體燈。例 如，如第4圖所示，以導電性黏結材料，將基板11上具 有本發明之含氧磷化硼系半導體層12，固定於基座15上以 銀（Ag)或鋁（A1)等金屬電鍍之金屬製碗體16的中央部。利 用此方式，可以使設於基板1 1之底部的一方之極性的背 -18- 559900 五、發明說明（17) 面電極1 4電性相連於附屬於基座1 5之一方端子1 7。而設 置於LED10上之正面電極13則連接於另一方之端子18。 其後，以一般半導體密封用環氧樹脂1 9，以環繞碗體1 6 之方式進行密封，即構成燈。又，利用本發明亦可形成約 200 // m〜300 /z m方形的小型LED，因此，可以構成特別 適合設置容積較小之顯示器等的小型發光二極體燈。 又，集合前述LED燈即可構成光源。例如，將複數 LED燈進行電性並聯，即可構成定電壓驅動型光源。又， 若將LED燈實施電性串聯，則可構成定電流型光源。利用 此LED燈之光源，和傳統之白熱型燈光源不同，因爲不會 因爲亮燈而產生太大的放熱，故爲十分有用之冷光源。例 如，可利用爲冷凍食品之展示用光源。另外，亦可構成適 合屋外顯示器、以顯示交通信號爲目的之信號器、以及方 向指示器或照明機器等之光源。 [發明之作用] 含氧之含氧磷化硼系半導體層中，氧會補償半導體層內 之載體，具有電性非活化作用，而使其具有高電阻磷化硼 系半導體層之作用。 利用氧之電性補償作用形成高電阻之含氧磷化硼系半導 體層，具有防止元件動作電流之無必要漏電的作用。尤其 是，氧原子濃度爲lX1018cnr3以上、電阻率爲ΐ〇2Ω·οιη 以上之含氧磷化硼系半導體層可以當做電晶體用途之緩衝 層、及發光元件之電流阻止層或電流壓縮層來使用。 -19- 559900 五、發明說明（18) 非晶或多晶之磷化硼系半導體層具有優良結晶性之連續 高電阻含氧磷化硼系半導體層的作用。良質高電阻之含氧 磷化硼系半導體層且有優良結晶性之活性層的作用。 [實施例] (實施例1) 本實施例1中，採用製作具有高電阻之含氧磷化硼系 (BP)半導體層之發光二極體（LED)做爲實例，具體說明本 發明。第1圖爲本實施例1之LED 1 10的剖面模式圖。第 2圖爲LED110之平面模式圖。 本發明之發光元件用途的積層構造體111，係以各種結 晶材料構成基板101。本實施例中，利用硼（B)摻雜以具有 P型（Π1)面之Si單晶體構成基板101。基板1〇1上，利用 三乙硼（（C2H5)3B)/膦（PH3)/氫（H2)系常壓MOCVD法，在 35〇°C下積層由磷化硼所構成的低溫緩衝層102。低溫緩衝 層102之層厚約5nm。 低溫緩衝層102之表面，利用前述MOCVD氣相成長機 構，在800°C下積層摻雜鎂（Mg)之p型BP層，當做下部包 覆層103。鎂之摻雜源採用二茂合鎂（bis-(C5H4)2Mg)。構 成下部包覆層之P型BP層103的載體濃度約爲8x 1018cnr 3。層厚爲70 0nm。因爲以低溫緩衝層102做爲基底層， 故p型BP層103爲無龜裂之連續膜。P型BP下部包覆 層103上，積層和磷化硼（BP··晶格常數=4·5 3 8Α)爲晶格 相配之等軸晶體的η型GaNQ.97PQ.Q3層（晶格常數=4·5 3 8Α) -20· 559900 五、發明說明（19) ，當做發光層104。採用矽（Si)做爲摻雜劑，使載體濃度 約爲1 x l〇17cm_3。發光層104之層厚約180nm。η型 GaNQ.97P〇.〇3層發光層104之表面，利用前述MOCVD氣相 成長機構積層由η型BP層構成之上部包覆層105。採用 矽（Si)做爲η型摻雜劑，使載體濃度約爲8x 1016cm_3，層 厚則約80nm。形成由以同樣爲800°C之成長溫度積層之P 型BP下部包覆層103、η型GaN。^?。.”發光層104、及η 型BP上部包覆層105構成之ρη連接型雙異質（DH)構造的 發光部。 在η型ΒΡ上部包覆層105上，利用添加三甲氧基硼 (B(OCH3) 3當做氧摻雜原料之MOCVD氣相成長機構，積 層部份殘留之含氧磷化硼（BP)層當做電流阻止層106。三 甲氧基硼（B(OCH3) 3之MOCVD反應系的添加量，以使電 流k止層106內之氧原子濃度成爲2x 1018crir3來設定。電 流阻止層106之室溫下的電阻率，依一般之霍爾（Hall)效 應測量法約爲3x 103 Ω ·cm。電流阻止層106之層厚約爲 7Onm 〇 只在特定區域（基座電極1〇8之預定形成區域）上，利用 光石版印刷技術在電流阻止層1 06形成選擇圖案化。其次 ，使用甲烷（CH4)/氫/氬混合氣體之電漿蝕刻機構，在只限 於相當於基座電極108之預定形成區域下方之基座電極投 影區域上殘留電流阻止層106。殘留之電流阻止層106的 平面形狀爲和基座電極1 〇8之底面形狀相似的圓形，直徑 -21 - 559900 五、發明說明（2〇) 爲130/zm。殘留之電流阻止層106以外的區域，則露出上 部包覆層105之表面。然後，以導電性η型銦•錫複合氧 化物膜（ΙΤΟ) 107覆蓋於上部包覆層105及殘留之電流阻止 層106的表面。銦•錫複合氧化物膜107之電阻率約爲6χ 10_4Ω·οπι，層厚約爲 500nm。 以連接於電流阻止層106上之銦•錫複合氧化物膜107 表面的方式配置基座電極108。基座電極108爲金（Αιχ)構 成之真空蒸鍍膜。基座電極108之直徑爲120//m。基座電 極108之配置上，其中心應和殘留之圓形電流阻止層106 相似。電流阻止層之平面積（ = S)及基座電極之平面積（ = S。) 之比率（S/SQ)約爲1.17。又，p型Si單晶基板101之背面 的幾乎全面都配置p型歐姆電極109,構成LED 110。p型 歐姆電極109爲鋁（A1)之真空蒸鍍膜。以和[211]方向平行 及垂直之方向裁切Si單晶基板101而得到之LED晶片 110的平面形狀，爲一邊長約300 //m之正方形。 基座電極108及p型歐姆電極109間，依順向流過20 毫安（mA)之動作電流時的LED1 10發光中心波長約爲 410nm。利用一般積分球測量之晶片（chip)狀態的LED的 亮度約爲6毫燭光（mcd)，提供高發光強度之磷化硼系半 導體構成之LED。以I-V特性求取之順向電壓（亦即、Vf) 約3.8V(順向電流=20mA)。又，逆向電壓約爲8V(逆向電 流=10" A)，提供高耐壓之LED 〇 (實施例2) -22- 559900 五、發明說明（21) 本實施例2中，採用製作具有以高電阻含氧磷化硼系 (BP)半導體層做爲緩衝層之蕭特基接合型場效型電晶體 (MESFET)做爲實例，具體說明本發明。第3圖爲本實施 例2之MESFET20的剖面模式圖。 MESFET20用途之積層構造體21，係以藍寶石（α-Α1203 單晶）構成基板201。基板201上，利用（C2H5)3B/三甲鋁 (CH3)3A1/PH3/H2系常壓MOCVD法，在400°C下積層無摻 雜磷化硼鋁（BuAU.^P)所構成的低溫緩衝層202。低溫緩 衝層202之層厚約12nm。因爲在400°C之低溫積層此低溫 緩衝層202，故爲非晶或多晶之構成。 低溫緩衝層202之表面，利用前述（C2H5)3B/PH3/H2系常 壓MOCVD法，以含有20vol. ppm氧之H2爲主體的混合 氣體當做氧源，在800 °C下積層摻雜氧之高電阻之BP層， 當做緩衝層203。緩衝層203爲無龜裂之連續膜。緩衝層 203內部之氧原子濃度約爲8x 1018cnT3。緩衝層203之室 溫的電阻率約爲lx 104Q*cm。層厚約爲500nm。從複數 介電常數之虛數部（ = 2·η·1ί、但、n =折射率、k=消耗係數） 之波長依賴性，針對構成含氧高電阻BP緩衝層203之BP ，求取之室溫頻帶隙爲3. leV。 在含氧高電阻BP緩衝層203上，積層積層摻雜砂（si)之 η型活性層204。活性層204係由和構成基底層含氧高電 阻ΒΡ緩衝層203之ΒΡ(晶格常數=4·5 3 8Α)爲晶格相配之等 軸晶體GaNQwP。^層所構成。矽摻雜源採用乙矽烷（si2H6) -23- 559900 五、發明說明（22) ，將載體濃度設定爲約lx 1017cnT3。因爲低溫緩衝層202 之作用，連續膜之含氧高電阻BP緩衝層203可當做基底 層使用，而且，因爲以晶格相配之半導體材料（等軸晶體 GaNQ.wPQ.w)構成活性層204，故以霍爾效應法測得約 1000cm2/V”之高室溫電子移動度。又，活性層204之層 厚約爲250nm。 活性層204之表面上，利用（c2H5)3B/PH3/H2系常壓 MOCVD法，以含有20ν〇1· ppm氧之氫爲主體的混合氣體 當做氧源，在800°C下積層摻雜氧之含氧高電阻BP層，當 做以形成蕭特基閘極207爲目的之閘極形成層205。閘極 形成層205內部之氧原子濃度約爲5x 1018cm·3。閘極形成 層205之室溫的電阻率約爲9χ 103Ω·οιη。層厚約爲50nm 〇 閘極形成層205之表面上，利用（C2H5)3B/PH3/H2系常壓 MOCVD法，在800°C下積層摻雜矽之η型BP層，當做以 形成源極208及汲極209爲目的之接點層206。接點層 206之載體濃度約爲2x 1018cm·3。層厚約爲50nm。 利用眾所知之光石版印刷技術之選擇圖案化機構、及使 用甲烷（CH4)/氫/氬混合氣體之電漿蝕刻機構，將閘極207 之預定形成區域當做凹面構造部2 1 0。凹面構造部2 1 0係 利用蝕刻將閘極207之預定形成區域上的接點層206去除 ，使閘極形成層205從底部露出。凹面構造部210之中約 中央的閘極形成層205之表面上，則配置由鈦（Ti)/鋁（A1) -24- 559900 五、發明說明（23) 積層構造所構成之蕭特基閘極207。閘極長度約爲2// m。 位於凹面構造部210之兩側、對向設置之殘留接點層206 上，分別配置源極208及汲極209，構成MESFET20。 對源極208及汲極209間施加15伏特（V)之汲極電壓時 ，飽和汲極電流（Idss)約爲2.5毫安（mA)。在本實施例2 中，因採用高電阻含氧磷化硼（BP)層當做緩衝層203，故 具有良好夾斷特性。以每次增加-2.5V之閘極電壓測量汲 極電流特性，閘極夾斷電壓爲約-2.5V。此外，本實施例2 中，將蕭特基閘極207設置於高電阻含氧BP層構成之閘 極形成層205上並接地，閘極漏電電流爲10M a時之閘極 耐壓約爲25V以上，此即爲高耐壓蕭特基閘極207的效果 。跨導（gm)會相對於對蕭特基閘極電壓之負電壓變化量， 而爲大致一定之約20毫西門子（mS)，提供具有優良靜特 性（直流（DC)特性）之磷化硼系MESFET。 [發明之效果] 依據本發明，將添加氧形成高電阻之磷化硼系半導體層 配置於活性層正下方當做緩衝層使用，構成場效型電晶體 (MESFET)，故可抑制汲極電流對緩衝層之漏電，而提供 具有良好夾斷特性及跨導特性之MESFET。 依據本發明，將添加氧形成高電阻之磷化硼系半導體層 當做以形成蕭特基電極爲目的之閘極形成層使用’構成場 效型電晶體（MESFET)，因可抑制閘極電流之漏電’故可 提供具有閘極漏電電流較小之高耐壓蕭特基電極的 •25- 559900 五、發明說明（24) MESFET。 依據本發明，經由非晶或多晶緩衝層積層含氧磷化硼系 半導體層，可得到無龜裂之連續含氧磷化硼系半導體層， 並將以其爲基底層實施積層之優良結晶性的半導體層當做 活性層，而提供具有高發光強度之磷化硼系半導體元件、 及反映高電子移動度之優良跨導（gm)特性的場效型電晶體 等。 [圖式之簡單說明] 第1圖爲本實施例1之LED的剖面模式圖。 第2圖爲本實施例1之LED的平面模式圖。 第3圖爲本實施例2之MESFET的剖面模式圖。 第4圖爲本發明之燈的剖面構造模式圖。 [元件符號之說明] 10 發光元件（LED) 11 基板 12 含氧磷化硼系半導體層 13 正面電極 1 4 背面電極 15 基座 16 碗體 1 7、1 8 端子 1 9 環氧樹脂 101 Si單晶基板 -26- 559900 五、發明說明（25) 102 低溫緩衝層 103 η型BP下部包覆層 104 η型GaN^P。.。發光層 105 η型BP上部包覆層 10 6 電流阻止層 107 銦•錫複合氧化物膜 108 基座電極 109 ρ型歐姆電極 1 10 LED 111 LED用途積層構造體 20 MESFET 21 MESFET用積層構造體 201 藍寶石基板 202 低溫緩衝層 203 含氧高電阻BP緩衝層 204 活性層 205 閘極形成層 206 接點層 207 蕭特基電極 208 源極 209 汲極 2 10 凹面構造部 -27-V. Description of the invention (13) Setting an oxygen-containing boron phosphide-based semiconductor layer on a single-crystal substrate with an amorphous or polycrystalline buffer layer as the main body will form a high-resistance oxygen-containing phosphorus that can more effectively prevent the leakage of the element's operating current. Boron-based semiconductor layer. For example, a high-resistance oxygen-containing boron phosphide-based semiconductor layer with less mismatch displacement that causes a short circuit in an operating current can be obtained by using the effect of an amorphous buffer layer. In addition, if the channel layer is formed by using a semiconductor material that matches the lattice of this good high-resistance oxygen-containing boron phosphide-based semiconductor layer, the electron mobility can be significantly improved. In addition to achieving good pinch-off characteristics, the noise index can be obtained. Smaller low noise MESFET. A preferred example of the laminated structure of the lattice-matching system of the seventh embodiment of the present invention is to connect a high-resistance oxygen-containing boron phosphide (BP: lattice constant = 4.5 3 8 persons) layer with a nitrogen composition ratio of 3 Channel layer composed of η-type gallium nitride phosphide (GaNQ. ^ P. ^: lattice constant = 4 · 5 3 8A) of an equiaxed crystal of% (= 0.03). Alternatively, a channel layer composed of equiaxed crystal gallium nitride (c-GaN) may be provided on the high-resistance oxygen-containing nitrogen-containing boron phosphide. The oxygen-containing boron phosphide-based semiconductor high-resistance layer is not only disposed directly under the channel layer, but also can be used as a gate formation layer for the purpose of forming a Schottky gate. In the eighth embodiment of the present invention, since the gate electrode is formed on the high-resistance oxygen-containing boron phosphide-based semiconductor layer, a gate electrode with less leakage current can be formed. Therefore, a field-effect transistor having a large transconductance and excellent pinch-off characteristics can be provided. Because of the structure of the MESFET, both the source / drain electrodes and the gate are sometimes disposed on the high-resistance oxygen-containing phosphine-based semiconductor layer, so the layer thickness of the high-resistance oxygen-containing boron phosphide-based semiconductor layer It should be that the alloy leading edge of the material constituting the two electrodes can penetrate and reach the active layer, or TEGFET -15-559900. 5. In the description of the invention (14), it can fully penetrate and reach the thickness of the electron supply layer. In general, the layer thickness of a high-resistance oxygen-containing boron phosphide-based semiconductor layer for forming a Schottky gate is within about 100 nanometers (nm). In addition, the structure of the Schottky electrode of the high-frequency MESFET may be a multilayer formed by laminating a high melting point metal such as titanium (Ti), platinum (Pt), or molybdenum (Mo), or a layer composed of the same. structure. In addition to the aforementioned electronic device applications, the ninth embodiment of the present invention can also apply a high-resistance oxygen-containing boron phosphide-based semiconductor layer to a light-emitting element. The application of this boron phosphide-based high-resistance semiconductor layer on a light-emitting element is particularly effective as a current-blocking layer for the purpose of intentionally blocking the flow of the element's operating current. For example, using an oxygen-containing boron phosphide-based semiconductor layer as a current blocking layer can constitute a light-emitting diode (LED) having a function of preferentially flowing an element operating current to a light-emitting region of an external opening. If a high-resistance boron phosphide-based semiconductor layer is configured to exert a current blocking effect, element operating current can be concentrated to flow through the opening light-emitting area, efficient photoelectric conversion can be realized, and LEDs with high luminous intensity can be provided. When the maximum cross-sectional area of the horizontal cross section of the base electrode is extremely different from the flat area of the projection area of the base electrode to the laminated layer) and the flat area of the current blocking layer (= S), a light-emitting element with high luminous intensity cannot be obtained. . For example, when the flat area of the current blocking layer relative to the flat area of the base electrode is extremely small (that is, S / S. "1), it cannot fully prevent the short circuit current of the component operating current from flowing to the area directly below the base electrode. Therefore, since the element operating current cannot effectively flow to the opening light emitting area, a light emitting element having sufficient light emission intensity cannot be obtained. On the other hand, if S / SJ is 1, the current is blocked -16- 559900 V. Description of the invention (15) The layer occupies most of the open light emitting area, which will reduce the area where the component operating current can flow. S / S of light-emitting elements, especially LEDs. The range should be 0.7 or more and 1.2 or less. In the tenth embodiment of the present invention, the current-blocking type LED is provided with a high-resistance oxygen-containing boron phosphide-based semiconductor layer directly under a pad electrode for the purpose of flowing an operating current. That is, an oxygen-containing boron phosphide-based semiconductor layer is disposed on the surface of the clad layer that constitutes a single-heterogeneous (SH) or double-heterogeneous (DH) connection structure light-emitting portion on a projection area equivalent to a base electrode. . Between the base electrode and the high-resistance oxygen-containing boron phosphide-based semiconductor layer, a conductive layer is inserted so as to cover the surface of the opening light-emitting area other than the projection area of the base electrode. With this configuration, the component operating current provided by the base electrode prevents the high resistance oxygen-containing boron phosphide-based semiconductor layer from flowing to the area directly below the base electrode (that is, it is difficult to emit light to the outside). Area), on the contrary, it will preferentially flow to the open light-emitting area. In addition, the high-resistance oxygen-containing boron phosphide-based semiconductor layer should be used as a current compression layer for a laser diode (LD). The eleventh embodiment of the present invention will be described in detail. First, a high-resistance oxygen-containing boron phosphide-based semiconductor layer serving as a current compression layer is provided by connecting the surface of the cladding layer serving as a DH connection type light-emitting part. Next, a selective patterning technique using a well-known light lithography technique is used to wet-etch or plasma-etch the center portion of the current compression layer in a strip-like manner to form an opening. In this way, the remaining current-compressing layers are opposed to each other across the band-shaped opening. Next, an ohmic electrode is connected to the surface of a cladding layer or the like that exposes the opening of the current compression layer. Generally speaking, 'n -17- 559900 5. Description of the invention The planar shape of the (16) or P-type ohmic electrode is similar to the planar shape of the opening. This process is performed on the current compression layer. By using the current compression layer to prevent the current from flowing, the component operating current provided by the ohmic electrode can only flow into the specific area connected to the electrode. Because the specific area, that is, the surface area of the aforementioned opening is smaller than the flat area of the light emitting portion, the high-density operating current flows into the light emitting portion directly below the opening. Therefore, a good laser light oscillation of stimulated emission can be obtained. Conventionally, the current compression layer for LD is composed of a conductive boron phosphide-based semiconductor facing the substrate such as a cladding layer (refer to the aforementioned Japanese Patent Application Laid-Open No. 10-242 5 69). For example, an n-type boron phosphide-based semiconductor layer is disposed for the p-type cladding layer. However, in the conventional technology, it is not easy to obtain an n-type boron phosphide-based semiconductor layer that can be compared with a p-type boron phosphide-based semiconductor layer that serves as a current compression layer because of the effective mass of electrons. However, in the present invention, since a high-resistance oxygen-containing boron phosphide-based semiconductor layer is formed by using oxygen, a current compression layer can also be easily formed on a P-type underlayer. That is, it has the advantage that a general-purpose current blocking layer can be formed on an oxygen-containing boron phosphide-based semiconductor layer having high resistance by adding oxygen, regardless of the conductivity type of the laminated layer. The LED of the present invention can constitute a high-brightness light-emitting diode lamp. For example, as shown in FIG. 4, the substrate 11 has the oxygen-containing boron phosphide-based semiconductor layer 12 of the present invention on a conductive bonding material, and is fixed on the base 15 with silver (Ag) or aluminum (A1), etc. The center portion of the metal bowl 16 made of metal plating. In this way, the polar back of one side provided at the bottom of the substrate 11 can be made. -18- 559900 V. Description of the invention (17) The surface electrode 14 is electrically connected to one of the square terminals 17 attached to the base 15. The front electrode 13 provided on the LED 10 is connected to the other terminal 18. Thereafter, a general semiconductor sealing epoxy resin 19 is sealed so as to surround the bowl 16 to constitute a lamp. In addition, the present invention can also form a small LED with a size of about 200 // m to 300 / z m. Therefore, it is possible to construct a small light-emitting diode lamp that is particularly suitable for installing a display with a small volume. A light source can be configured by combining the LED lamps. For example, a plurality of LED lamps can be electrically connected in parallel to form a constant voltage driving light source. In addition, if the LED lamps are electrically connected in series, a constant-current light source can be configured. The light source using this LED lamp is different from the traditional incandescent lamp light source, because it does not generate too much heat due to lighting, so it is a very useful cold light source. For example, a light source for display of frozen food can be used. In addition, it can also constitute a light source suitable for outdoor displays, traffic signals for traffic signals, and direction indicators or lighting equipment. [Effect of the invention] In the oxygen-containing oxygen-containing boron phosphide-based semiconductor layer, oxygen compensates the carrier in the semiconductor layer and has an electrical inactivation effect, so that it has the function of a high-resistance boron phosphide-based semiconductor layer. The use of the electrical compensation of oxygen to form a high-resistance oxygen-containing boron phosphide-based semiconductor layer has the effect of preventing unnecessary leakage of the device operating current. In particular, an oxygen-containing boron phosphide-based semiconductor layer having an oxygen atom concentration of 1 × 1018cnr3 or more and a resistivity of ΐ〇2Ω · οιη or more can be used as a buffer layer for transistor applications, and as a current blocking layer or a current compression layer of a light emitting element . -19- 559900 V. Description of the invention (18) The amorphous or polycrystalline boron phosphide-based semiconductor layer has the function of continuous high-resistance oxygen-containing boron phosphide-based semiconductor layer with excellent crystallinity. A high-quality, high-resistance oxygen-containing boron phosphide-based semiconductor layer and an active layer with excellent crystallinity. [Embodiment] (Embodiment 1) In Embodiment 1, a light-emitting diode (LED) made of an oxygen-containing boron phosphide-based (BP) semiconductor layer having a high resistance is taken as an example to specifically describe the present invention. FIG. 1 is a schematic cross-sectional view of the LED 1 10 according to the first embodiment. Figure 2 is a plan view of the LED 110. The laminated structure 111 for light emitting element applications according to the present invention comprises a substrate 101 made of various crystalline materials. In this embodiment, the substrate 101 is composed of boron (B) doped with a Si single crystal having a P-type (Π1) plane. On the substrate 101, a low-temperature buffer layer 102 made of boron phosphide was laminated at 35 ° C by using triethylboron ((C2H5) 3B) / phosphine (PH3) / hydrogen (H2) based atmospheric pressure MOCVD method . The low-temperature buffer layer 102 has a layer thickness of about 5 nm. On the surface of the low-temperature buffer layer 102, a p-type BP layer doped with magnesium (Mg) was laminated at 800 ° C as the lower cladding layer 103 by using the aforementioned MOCVD vapor phase growth mechanism. The doping source of magnesium is bis- (C5H4) 2Mg. The carrier concentration of the P-type BP layer 103 constituting the lower cladding layer is about 8 × 1018cnr 3. The layer thickness was 70 nm. Because the low-temperature buffer layer 102 is used as the base layer, the p-type BP layer 103 is a continuous film without cracks. On the P-type BP lower cladding layer 103, the build-up layer and boron phosphide (BP ·· lattice constant = 4 · 5 3 8A) are η-type GaNQ.97PQ.Q3 layers (lattice constant) = 4 · 5 3 8Α) -20 · 559900 5. Description of the invention (19), as the light emitting layer 104. Using silicon (Si) as a dopant, the carrier concentration is approximately 1 x 1017 cm_3. The thickness of the light emitting layer 104 is about 180 nm. On the surface of the n-type GaNQ.97P.03 layer light-emitting layer 104, an upper cladding layer 105 composed of an n-type BP layer is laminated using the aforementioned MOCVD vapor phase growth mechanism. Using silicon (Si) as the n-type dopant, the carrier concentration is about 8x 1016 cm_3, and the layer thickness is about 80 nm. A P-type BP lower cladding layer 103 and n-type GaN layered at the same growth temperature of 800 ° C were formed. ^ ?. . ”The light-emitting portion of the ρη-connected type double hetero (DH) structure composed of the light-emitting layer 104 and the n-type BP upper cladding layer 105. On the n-type BP upper cladding layer 105, trimethoxyboron (B ( OCH3) 3 is used as an oxygen-doped MOCVD vapor phase growth mechanism, and the remaining oxygen-containing boron phosphide (BP) layer is partially used as a current blocking layer 106. The trioxide boron (B (OCH3) 3 is a MOCVD reaction system The amount is set so that the oxygen atom concentration in the current k-stop layer 106 becomes 2x 1018crir3. The resistivity of the current-blocking layer 106 at room temperature is about 3x 103 Ω according to the general Hall effect measurement method. cm. The current blocking layer 106 has a layer thickness of about 7 nm. Selective patterning is formed on the current blocking layer 106 using a light lithography technique only on a specific area (the predetermined formation area of the base electrode 108). Second, using The plasma etching mechanism of a methane (CH4) / hydrogen / argon mixed gas is limited to the current blocking layer 106 on the projection area of the base electrode which is limited to the area corresponding to the predetermined formation area of the base electrode 108. The remaining current blocking layer 106 The plane shape is the same as that of the base electrode 10 The shape of the bottom surface is similar to a circle with a diameter of -21 to 559900. 5. Description of the invention (20) is 130 / zm. The area other than the remaining current blocking layer 106 exposes the surface of the upper cladding layer 105. Then, it is conductive The η-type indium-tin composite oxide film (ITO) 107 covers the surface of the upper cladding layer 105 and the remaining current blocking layer 106. The resistivity of the indium-tin composite oxide film 107 is approximately 6 × 10_4Ω · οπι, and the layer thickness Approximately 500 nm. The pedestal electrode 108 is arranged so as to be connected to the surface of the indium-tin composite oxide film 107 on the current blocking layer 106. The pedestal electrode 108 is a vacuum vapor-deposited film made of gold (Alm). The diameter is 120 // m. In the configuration of the base electrode 108, its center should be similar to the residual circular current blocking layer 106. The flat area of the current blocking layer (= S) and the flat area of the base electrode (= S. ) Ratio (S / SQ) is about 1.17. In addition, the p-type ohmic electrode 109 is almost arranged on the back of the p-type Si single crystal substrate 101 to form an LED 110. The p-type ohmic electrode 109 is a vacuum of aluminum (A1) Evaporation film. Cut the Si sheet parallel to and perpendicular to the [211] direction The planar shape of the LED wafer 110 obtained from the crystal substrate 101 is a square with a length of about 300 // m on one side. An operating current of 20 milliamperes (mA) flows in the forward direction between the base electrode 108 and the p-type ohmic electrode 109. At the time, the central wavelength of the LED1 10 is about 410nm. The brightness of the LED in the chip state measured by a general integrating sphere is about 6 millicandles (mcd), which provides a high-intensity boron phosphide-based semiconductor LED. The forward voltage (ie, Vf) obtained from the I-V characteristics is about 3.8V (forward current = 20mA). In addition, the reverse voltage is about 8V (reverse current = 10 " A), providing LEDs with high withstand voltage 〇 (Example 2) -22- 559900 V. Description of the invention (21) In this Example 2, the production method has a high A Schottky junction field-effect transistor (MESFET) of a resistive oxygen-containing boron phosphide-based (BP) semiconductor layer as a buffer layer is taken as an example to illustrate the present invention in detail. Fig. 3 is a schematic sectional view of the MESFET 20 of the second embodiment. The multilayer structure 21 for MESFET 20 uses a sapphire (α-A1203 single crystal) substrate 201. On the substrate 201, a low-temperature buffer composed of (C2H5) 3B / trimethylaluminum (CH3) 3A1 / PH3 / H2 normal pressure MOCVD is laminated at 400 ° C to form a non-doped boron aluminum phosphide (BuAU. ^ P). Layer 202. The low-temperature buffer layer 202 has a layer thickness of about 12 nm. Since this low-temperature buffer layer 202 is laminated at a low temperature of 400 ° C, it has an amorphous or polycrystalline structure. On the surface of the low-temperature buffer layer 202, the aforementioned (C2H5) 3B / PH3 / H2 series atmospheric pressure MOCVD method is used, and a mixed gas mainly composed of H2 containing 20 vol. Ppm oxygen is used as an oxygen source, and the doped oxygen layer is laminated at 800 ° C. The high-resistance BP layer is used as the buffer layer 203. The buffer layer 203 is a continuous film without cracks. The oxygen atom concentration inside the buffer layer 203 is about 8 × 1018cnT3. The room temperature resistivity of the buffer layer 203 is about 1 × 104 Q * cm. The layer thickness is approximately 500 nm. From the wavelength dependence of the imaginary part of the complex dielectric constant (= 2 · η · 1ί, but, n = refractive index, k = consumption coefficient), the room for the BP constituting the oxygen-containing high-resistance BP buffer layer 203 is obtained. The temperature band gap is 3. leV. On the oxygen-containing high-resistance BP buffer layer 203, an n-type active layer 204 doped with sand (si) is laminated. The active layer 204 is composed of an equiaxed crystal GaNQwP composed of a BP (lattice constant = 4.55 8A) constituting a base layer oxygen-containing high-resistance BP buffer layer 203. ^ Layers. The silicon doping source uses ethane (si2H6) -23- 559900 V. Description of the invention (22) The carrier concentration is set to about lx 1017cnT3. Because of the role of the low-temperature buffer layer 202, the oxygen-containing high-resistance BP buffer layer 203 of the continuous film can be used as a base layer, and because the lattice-matched semiconductor material (equiaxial crystal GaNQ.wPQ.w) constitutes the active layer 204, Therefore, the high-room-temperature electron mobility of about 1000 cm2 / V ”was measured by the Hall effect method. The thickness of the active layer 204 was about 250 nm. On the surface of the active layer 204, (c2H5) 3B / PH3 / H2 system was used. Atmospheric pressure MOCVD method, using a mixed gas containing 20ν〇 ·· ppm oxygen as the main body as an oxygen source, laminating an oxygen-containing high-resistance BP layer doped with oxygen at 800 ° C to form a Schottky gate 207 The gate formation layer 205 for the purpose. The oxygen atom concentration inside the gate formation layer 205 is about 5 × 1018 cm · 3. The room temperature resistivity of the gate formation layer 205 is about 9 × 103 Ω · οη. The layer thickness is about 50 nm. On the surface of the gate electrode formation layer 205, a (C2H5) 3B / PH3 / H2 series atmospheric pressure MOCVD method is used to build up an n-type BP layer doped with silicon at 800 ° C as a source 208 and a drain 209 as The purpose of the contact layer 206. The carrier concentration of the contact layer 206 is about 2x 1018 cm · 3. The layer thickness is about 50 nm. The choice of patterning mechanism of the light lithography technology, and the plasma etching mechanism using a methane (CH4) / hydrogen / argon mixed gas, regards the predetermined formation area of the gate electrode 207 as the concave structure portion 2 1 0. The concave structure portion 2 1 0 means that the contact layer 206 on the predetermined formation area of the gate 207 is removed by etching, and the gate formation layer 205 is exposed from the bottom. On the surface of the gate formation layer 205 in the center of the concave structure portion 210, it is arranged Schottky gate 207 composed of a laminated structure of titanium (Ti) / aluminum (A1) -24- 559900 5. Description of the invention (23) The gate length is about 2 // m. It is located in the two of the concave structure 210 A source 208 and a drain 209 are respectively arranged on the residual contact layer 206 provided on the side and opposite to form a MESFET 20. When a 15 volt (V) drain voltage is applied between the source 208 and the drain 209, the drain is saturated. The current (Idss) is about 2.5 milliamperes (mA). In this embodiment 2, since a high-resistance oxygen-containing boron phosphide (BP) layer is used as the buffer layer 203, it has good pinch-off characteristics. The 2.5V gate voltage measures the drain current characteristics, and the gate pinch-off voltage is about -2.5V. In addition, this In the second embodiment, the Schottky gate 207 is disposed on the gate formation layer 205 composed of a high-resistance oxygen-containing BP layer and grounded. The gate withstand voltage is about 25V or more when the gate leakage current is 10M a. This is the effect of the high withstand voltage Schottky gate 207. The transconductance (gm) will be about 20 milliSiemens (mS), which is approximately constant relative to the negative voltage change of the Schottky gate voltage. Boron phosphide MESFET with excellent static characteristics (DC characteristics). [Effects of the Invention] According to the present invention, a boron phosphide-based semiconductor layer formed by adding oxygen to form a high resistance is disposed directly below the active layer and used as a buffer layer to form a field-effect transistor (MESFET), so that the drain current can be suppressed. The leakage of the buffer layer provides a MESFET with good pinch-off characteristics and transconductance characteristics. According to the present invention, a boron phosphide-based semiconductor layer added with oxygen to form a high resistance is used as a gate formation layer for the purpose of forming a Schottky electrode, and a field-effect transistor (MESFET) is used to suppress the gate current. “Leakage” can therefore provide • 25- 559900 with a high withstand voltage Schottky electrode with a small gate leakage current V. Description of the invention (24) MESFET. According to the present invention, a continuous oxygen-containing boron phosphide-based semiconductor layer without cracks can be obtained by laminating an oxygen-containing boron phosphide-based semiconductor layer through an amorphous or polycrystalline buffer layer. The active semiconductor layer serves as an active layer, and provides a boron phosphide-based semiconductor device having a high luminous intensity, and a field-effect transistor having excellent transconductance (gm) characteristics reflecting high electron mobility. [Brief Description of the Drawings] FIG. 1 is a schematic sectional view of the LED of the first embodiment. FIG. 2 is a plan view of the LED of the first embodiment. Fig. 3 is a schematic sectional view of a MESFET of the second embodiment. Fig. 4 is a schematic cross-sectional structure view of a lamp of the present invention. [Explanation of Element Symbols] 10 Light-emitting element (LED) 11 Substrate 12 Oxide-containing boron-based semiconductor layer 13 Front electrode 1 4 Back electrode 15 Base 16 Bowl 1 7, 1 8 Terminal 1 9 Epoxy 101 Si single Crystal substrate-26- 559900 V. Description of the invention (25) 102 Low-temperature buffer layer 103 n-type BP lower cladding layer 104 n-type GaN ^ P. .. Light-emitting layer 105 η-type BP upper cladding layer 10 6 Current blocking layer 107 Indium-tin composite oxide film 108 Base electrode 109 ρ-type ohmic electrode 1 10 LED 111 LED laminated structure 20 MESFET 21 laminated structure for MESFET 201 Sapphire substrate 202 Low-temperature buffer layer 203 Oxygen-containing high-resistance BP buffer layer 204 Active layer 205 Gate formation layer 206 Contact layer 207 Schottky electrode 208 Source electrode 209 Drain electrode 2 10 Concave structure section-27-