TWI331306B - Method and system for separating an image signal into a set of image planes, machine accessible medium and method and system for dynamically thresholding an image signal - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and system for separating multiple raster content presentations of a document, and more particularly to a method for separating image signals into a single image plane and Its system. (ii) The MRC presentation of prior technical documents is diversity. It provides the ability to render color images and color or monochrome text. The MRC presentation enables the use of "multiple planes" (multiple "planes") for the purpose of representing the contents of a file. MRC presentations are becoming increasingly important in the marketplace. It has been established as the primary color fax standard. In an MRC presentation, images are represented in more than one image plane. The main advantage of the MRC of the document is the efficient way to store, transfer and produce large digital files. This method uses the nature of the human visual system, which significantly reduces the ability to distinguish small color variations at the edge of high contrast. The edge data is roughly separated from the color information that changes smoothly and smoothly, and is encoded in one of the planes called the selector plane (which can be higher than the resolution of 1 bit per pixel). After careful separation, the various planes can be individually compressed using standard compression methods (such as JPEG and G4) with good compression and simultaneous high quality. What is needed is a method and system for efficiently separating images into a set of planes so that the advantages presented by the MRC can be fully utilized. (C) SUMMARY OF THE INVENTION The present invention discloses a method and system for separating image signals into a set of image planes. The system consists of a minimum and maximum module, a dynamic threshold module and a -5-1331306 split module. Small: The largest module receives the image signal and searches for the minimum and maximum 内 in at least one window at the center of the existing pixel in the image signal. The dynamic threshold module calculates the individual indications for the window according to the individual minimum and maximum 値 and the existing pixels received from the min-max module to indicate the distance and direction of the existing pixels to the individual threshold planes, and according to Indication 値 to output a control signal. The separation module includes an existing pixel representation included in at least the image plane, and separates the image signal into a set of image planes according to the control signal. (4) Embodiments The present invention provides a method and system for separating image signals into a set of image planes. The image signal represents a digital scan file. The image plane is suitable for mixed raster content (MRC) rendering of digital scanned files. Figure 1 shows a general MRC presentation. The rendering contains up to four independent planes: foreground, background, selector, and rendering hints. In the most general case, there may be multiple prospects and pairs of choices at higher levels. However, in most applications, the presentation is limited to 3 or 4 planes. The background plane is typically used to store continuous tone information, such as images and/or smooth varying background colors. The selection plane usually maintains the image (binary) and other edge information (ie, line art drawing). The foreground plane usually maintains the color of this and/or line items. However, MRC presents only the canonical plane and its associated compression method. There is no restriction or enhancement of the content of each plane. The content of each plane can be appropriately defined by the implementation of the M RC presentation. -6- 1331306 The MRC structure also allows for a fourth plane, the indicator plane, which is used to convey information about the contents of the file. For example, the cue plane can carry an ICC (International Color Association) cue that identifies the best color matching method for the various items on the page. The foreground and background planes are defined as two full-color (L, a, b) planes. The selection plane is defined as a binary (1 bit deep) plane. The cue plane is typically limited to an 8-bit plane. An example of the MRC presentation specification foreground and background will be compressed by JPEG, and the selection plane will be compressed by ITU-G4 (standard group 4 facsimile compression). The hint plane is considered selective, but if used, a compression method like the Lemp el-Zev-Welch method can be used for its compression. Usually, the foreground, background, selection, and cue planes all have different resolutions, and there is no need to maintain the original input resolution. The method used to combine back to the "segmentation" MCR image by its composition (ie, plane) is to dump the foreground color above the background plane via the selection plane "mask" so that it is heavy at these locations Overwrite the previous content of the background plane. In other words, the combination is obtained by multiplexing the foreground and background information according to the binary control signal of the selection plane by 〇n pixel by pixel basis. If the choice 値 is 1, the foreground content is used: otherwise (ie, for the selection 値=〇), the content of the background is used. The multi-worker is implemented in a pixel-by-pixel manner until all output pixels are defined. MR C presentation of the file The main advantage is to provide an efficient way to store, transfer and produce large digital color files. This method significantly reduces the ability of the block human to view the nature of the 1331306 system/the ability to distinguish small color variations at the edge of high contrast. Edge information is usually separated from smooth varying color information and encoded in the selection plane (can be higher than 1 per source pixel) Selecting the resolution of the samples. After careful separation, the individual planes can be independently compressed using standard compression methods (such as JPEG and G4) with good compression and high quality. The segmentation system of the present invention is used. The image is separated into three or more planes suitable for the MRC presentation of the image. Figure 2 shows a block diagram of the segmentation system of the present invention. The segmentation system 200 includes a minimum-maximum module 2 0, dynamic Limiting module 2 0 4 and separating module 2 0 6. The minimum-maximum module 202 receives the image signal DSC and searches for the minimum and maximum chirps in a set of windows at the center of the pixel in the image signal. The group 204 calculates individual indications of each window according to the minimum and maximum 値 and the existing pixels received from the minimum and maximum modules, and indicates the distance and direction of the existing pixels to the individual threshold planes, and outputs according to the indications. Control signal. The separation module 206 separates the image signal into a group of images according to the control signal by including the existing pixels in at least one of the image planes. Figure 3 shows a block diagram of an embodiment 300 of the segmentation system 200. For optimal performance of the segmentation system 300, the input signal DSC' must have no majority of the original intermediate frequency halftone pattern of the original scanned image ( Mid frequency halftone pattern) These halftone frequencies are typically such that the input image is first removed by De-screen systen. However, in some cases, 1331306, such as for removing PDL (page description language) Print, the input signal is known to have no problem halftone frequencies. In this case, there is no need to remove the filtering operation, and the clean input signal can be fed directly into the segmentation system. For ease of illustration, in the description of the segmentation system 300 herein, the source input image DSC and the foreground FG and background BG output hypotheses are all full color (L, a, b) planes' and the selection plane SEL output is binary ( 1-bit). Of course, these assumptions are not to be construed as limiting the application of the invention. In general, the foreground 'background and selection planes may all be at different resolutions relative to the input signal DSC. For example, the foreground and background planes are typically down-sampled (for better compression) from the original input resolution, while the selection plane is typically upsampled (for better edge quality). The amount of sampling up or down can be completely programmed under software control. The segmentation system 300 can also receive and use the two signals when the predictive frequency halftone weight HTW and the full color Super Blur BLR_A signal are available. These selectable signals can be generated, for example, by a filter removal or filtering system as described in the co-pending patent application. The full-color ultra-blurred brr_a signal can be selected to have a very large filtering span (ie, a very low cutoff frequency) filter to produce a low pass filtered image source signal. The estimated frequency halftone weight HTW can be selected in detail hereinafter with reference to Figs. 18, 19, and 20. The segmentation system 300 includes a minimum and maximum module 3 1 0, a dynamic threshold module 3 2 0 and a separation module 3 3 0. -9- 1331306 The minimum-most square module 3 1 0 contains: minimum correlation - maximum block E 1 , minimum correlation - maximum sub-sample block E2 and two correlation minimum - maximum blocks E3, E4. The minimum and maximum module 310 receives the input image signal DSC (three-dimensional), calculates and outputs two sets of maximum and minimum 値 vectors (Μ X, η η)' (Μ X, Μ Ν ), and each group corresponds to a different window. The dynamic threshold module 3 2 receives the input image signal DSC and the vector (Μχ, Μη, (Mx, MN)' from the minimum_maximum module 310 and receives the individual minimum and maximum according to the minimum-maximum module.値 and the existing pixels to calculate the individual indications of each window, indicating the distance and direction of the existing pixels relative to the individual threshold planes, and outputting the control signal GRS to the separation module 333 according to the indication 。. The control signals SEG and ENH can also be selected for output. When the predictive frequency halftone weight HTW and the full color hyperblur BLR_A signal are selected for use, the dynamic threshold module 320 also receives both signals. The separation module 330 includes a selection logic block E6, an edge processing block E7, an FG/BG separation block E8, and an FG/BG division block E9. The separation module 330 receives the image signal DSC, the vector Mx, the Μη, the control signal GRS from the minimum-maximum module 310, and the selectable control signals SEG, ENH from the dynamic threshold module 3 2 0, and outputs 3 signals BG. , FG' SEL, which respectively corresponds to the background, foreground and selection plane of the MRC of the image DSC. The minimum correlation-maximum block El receives the input image signal DSC and searches for the minimum 向量(vector) Μη and the maximum 値(vector) Mx within the 5 X 5 window at the center of the existing pixel. The vectors Μη and Mx represent the minimum and maximum 値 in the window context of 5x5 pixels. The meaning of these -10- 1331306 vectors will be explained in detail below. The correlation minimum-maximum sub-sampling block E2 receives the input image signal DSC and searches for the minimum and maximum luminance values in each non-overlapping 8x8 window, and also provides the location at these locations. Corresponds to the chroma value. To use a non-overlapping 8 X 8 window, the correlation minimum and maximum sub-sampling block E2 subsamples the minimum-maximum 以 by a factor of 8 in each direction, thus reducing the overall frequency bandwidth by a factor of 64. Then, the output of the subsample is fed to two correlation minimum-maximum blocks E3 and E4, which are searched for on the 9x9 window at the center of the 8x8 window on the original (before the sub-sampling) of the existing pixel.値 and the maximum 値 vector MN and Mx. Thus, the MN and MX vectors correspond to the smallest 値 of all the smallest 値 from the non-overlapping 8 X 8 window and the largest 全部 of all the largest 値. Due to the sub-sampling (with 8) effect, the 9x9 window actually corresponds to the window context of 7 2 X 7 2 pixels. Of course, uppercase letters are used in vectors MN and MX to distinguish them from vector Μη and Mx (output of block E1), and display all of the minimum and maximum 表示 in the larger window context of 7 2x72 pixels. The two sets of minimum and maximum 値 vectors (Mn ' Mx) and (MN, MX) are fed to the dynamic threshold module 320. The dynamic threshold module 320 outputs a monochrome 8-bit signal GRS whose deviation zero crossing indicates the position of the edge in the selection plane. In addition, the dynamic threshold module can also generate a selectable binary control signal SEG and an optional 8_bit segmentation enhancement control ENH. The binary control signal S EG can be selected to provide an external device (like an override switch) to control the segmentation of the FG/BG separation block E8 of the separation module 330 (see Equations 1331306 (14) to (20). ) / Optional 8-bit segmentation enhancement control ENH provides the applied enhancement to the FG/BG separation block E8 » Select logic block E6 receives the 8-bit grayscale selection signal from the dynamic threshold module 3 2 0 ( Gray Selector Signal) The GRS' is upsampled by doubling the resolution and then caused it to be at the zero crossing to produce a binary selection plane output SEL. For high quality text and line item replication, the selection plane typically remains at twice the input resolution (1 200 dpi for 600 dpi input), although programmable under software control even higher ratios (in one embodiment) 8 times input resolution). However, in applications where high quality is not required, the selection plane can be at the same resolution as the input signal DSC. The edge processing block E7 receives the high resolution selection output SEL and calculates the number of ON and OFF (on and off) pixels in the 5x5 (high resolution) window at the center of the existing (low resolution) pixel. The edge processing block E7 outputs a 2-bit signal SEE. If all input pixels on the inside of the 5x5 window are not (OFF) (corresponding to 5x5 fixed background area), the S EE signal is set to zero. Similarly, if all of the input pixels on the inside of the window are ON (corresponding to the 3x3 fixed foreground area), the SEE signal is set at 3. If the 3x3 window is mostly background (white) or mostly foreground (black), the SEE output is set to 〖 or 2. The FG/BG separation block E8 receives the full color source signal DSC to be segmented, the full color minimum and maximum 値 vector Μη from the correlation minimum and maximum block E1, Μχ, the SEE signal from the edge processing block Ε7, and optionally The segmentation signal SEG and the enhancement control signal ENH from the dynamic threshold module 320. The FG/BG separation block E8 implements the MRC segmentation to generate the foreground and background 1331306, and separately generates two full-color outputs TFgr and Bgr as the foreground and *background planes. FG/BG eliminates the block E9 to implement the multi-processing process in the foreground and background estimates 値Fgr and Bgr to generate the final foreground and background output FG and BG. The multi-processing process extends the foreground and background slightly beyond the edges, and the appropriate pixels are used to fill undefined pixels in the foreground and background planes. The purpose of this process is to prevent artifacts caused by subsequent sampling and PRG compression, and to achieve good JPEG compression ratio in undefined pixels. In addition to the logic inside the FG/BG division block E9 (see Tile Block E7 in Figure 14), the foreground and background output are also monitored to detect and the flag is almost black or all white. Block. Rather than coding this block into an output file, it is better to use and refer to a specific tile mark when this tile is detected. This is done to eliminate the need to repeatedly encode the universal white or all black tiles, and increase the overall compression ratio. The blocks included in the min-max module 310 will be described in detail below. Correlation Minimum - The maximum square EI looks for the maximum and minimum 亮度 of the luminance component L in the 5x5 window at the center of the existing pixel, and outputs full color (brightness and chrominance) at these positions. The so-called correlation is the smallest and the largest.値 means that it searches for the minimum and maximum 仅 on only a single component of the luminance rather than on all three components of the image signal DSC. Once the locations of the minimum and maximum brightness are found, the chrominance components (a, b) are also output at these locations. Correlation Minimum - Maximum Block El outputs two full color (L, a, b) signals Mn = (LMn' aMn, bMn) and Mx = (LMx, aMx, bwx) vectors, respectively -13-1331306 The smallest and largest 5 in the 5 x 5 window. The outputs μ η and Μ x have the same pixel ratio as the input signal DSC. Figure 4 illustrates the operation of the minimum correlation-maximum block E1. The content of the DSC brightness data is first found in the 5x5 brightness window at the center of the existing pixel to find the minimum and maximum L値 positions. If the minimum or maximum L 値 is not unique (ie, if more than one location has the same minimum or maximum 値) then use one of the locations found first. The output of this search process is the only pair with the smallest and largest L値 relative position in the 5x5 window (LMn, L Μ X ) ° Then, the correlation is the smallest - the largest block Ε 1 uses relative position information to indicator in two Corresponds to the corresponding chrominance (a, b) components in the 5x5 chrominance window, and restores the chromaticity 値 at these locations. Thus, the relative position of the largest L 値 L μ x is used to address the 5x5 chromaticity window and to restore the chroma pair (aMx, bMx) at this position. The three turns (LMx, aMx, bMx) together form the output Mx from the least correlation-maximum block E1. Similarly, the relative position of the 'minimum L値LMn' is used to address the 5x5 chrominance window and to restore the chrominance pair (aMx, bMx) at this position. The three 値 (LMx, aMx, bMx) form the minimum correlation - the output of the largest square El. The implementation of the minimum-maximum block Ε 1 can be substantially accelerated by the sequential nature of operation and the type of operation (minimum-maximum) being implemented. For example, since the job proceeds to subsequent pixels', the extremes of the previous pixels (i.e., the maximum and minimum 値) and the corresponding positions are known. Since the existing 5 x5 window greatly overlaps the previous window, the previous window content is tracked, and the correlation is minimal - the largest square Ε 1 must be classified only on the first - 14 - 1331306 front side of the front window on the front side of the L値 latest and oldest 5 χ 1 Row. The center 3 x 5 zone is common to both the previous window and the existing window, and the previous minimum and maximum new address locations in the previous window are offset 1 in the fast scan direction relative to their previous positions. The previous minimum and maximum 値 compares the 値 in the latest row of L値, resulting in new maximum and minimum L値. Figure 5 illustrates the correlation minimum-maximum sub-sampling block E2. Block E 2 receives the full color (L ' a, b) input signal DSC and produces two full color - sample minimum and maximum output 502 and 504 » block E2 to search for minimum and maximum brightness 在 on non-overlapping 8x8 windows. Then, the position of the minimum and maximum brightness 値 is used to index the chromaticity window, and the chromaticity at these positions is restored. To use a non-overlapping 8x8 window, the correlation minimum-maximum sub-sampling block E2 is beneficially sub-sampled minimum and maximum output in all directions in a direction of 8 (which has been generated with sliding window usage) Instead of non-overlapping windows), thus reducing the overall output data ratio by a factor of 64. The minimum output 504 corresponds to a minimum brightness 値LMN containing an input signal DSC in an 8x8 window with respect to an existing pixel and two 値(LmiN, aMIN) formed by the corresponding chromaticity (a, b) 値 (aMIN, bMIN) at the minimum brightness position. ' bMlN) . Similarly, the maximum output 5 0 2 corresponds to the maximum luminance 値LMAX of the input signal DSC in the 8 x 8 window containing the existing pixel and the chromaticity (a, b) 値 (aMAX, bMAX) corresponding to the maximum luminance 値. Three 値 (Lmax, aMAx' bMAX). If the minimum or maximum brightness is not unique—i.e., if more than one location has the same maximum and minimum 値, then the first one found is used. Sub-sampling operation to move the existing pixel position to -15 - 1331306 before the high-speed scanning direction (and, when reaching the end of the line, that is, 8 lines ahead in the slow scanning direction) while maintaining the non-overlapping window condition Come to get. Correlation minimum·maximum sub-sampling block E2 8 times (abbreviated as 8χ) Decrement multiple (in each dimension), is the expected sub-sample size according to the foreground and background plane (usually the factor of sub-sampling 2) To design. For its higher output image quality (e.g., if there is a PDL input image), it is expected that there is no sub-sampling foreground and background output at all. In this case, a smaller quantum-sampling factor (i.e., only 4 Χ) will be applied instead of the above 8χ factor. If the sub-sampling factor of 4 is used (for each direction), a 4x4 non-overlapping window is used. The correlation minimum-maximum sub-sampling block Ε 2 is used along with two correlation minimum-maximum units Ε3 and Ε4, resulting in a minimum-maximum analysis of the correlation-minimum-maximum block Ε1, but covering the larger-area context ( For example, 72χ72 pixels compare 5x5 pixels), and the overall frequency bandwidth is reduced by a more rough resolution. Figure 6 illustrates the function of the correlation maximum block Ε 3 and the correlation minimum block Ε 4 used in an embodiment of the system of the present invention. The correlation maximum block 接收3 receives the full color correlation maximum output 052 from the correlation minimum-maximum sub-sampling block Ε2, and searches for the luminance data content of the signal 052 in the 9x9 luminance window at the center of the existing pixel, and finds The position of the largest L値. If the maximum L値 is not unique (i.e., if there is more than one location with the same maximum 値), then the first location found in it is used. The output of this search process is the maximum 値Lmx and its relative position within the 9x9 window. Then, the correlation maximum block E3 uses the relative position information of LMAX, -16· 1331306 to index the corresponding chromaticity (a, b) components in the two corresponding 9x9 chromaticity windows, and restores the chromaticity at the position 値. Thus, the relative position of the largest 匕値LMX is used to address the 9x9 chrominance window and to restore the chrominance pair (&MX, bwx) at this location (as shown in Figure 6). The three 値 (Lmx, aMx, bvix) form the output of the largest correlation block E3. The correlation minimum block E4 receives the full color correlation minimum output 504 from the correlation minimum-maximum sub-sampling block E2, searching for the luminance signal content of the signal 504 within the 9x9 luminance window at the center of the existing pixel, and finding the minimum L値The location. If the minimum L値 is not unique (i.e., if more than one location has the same minimum 値), then one of the locations found first is used. The output of the search process is the smallest 値LMN in the 9x9 window and its relative position. Then, the correlation minimum block E4 uses the relative position information of the LMN to index the corresponding chrominance (a, b) components in the two corresponding 9x9 chromaticity windows, and returns the chromaticity 値 at the local position. Thus, the relative position of the smallest L 値 LMN is used to address the 9x9 chrominance window and to return the chrominance pair (aMN, bMN) at this location (as shown in Figure 6). The three 値 (Lmn, aMN, bMN) form the output MN of the least correlated block E4. With the application correlation minimum block E4 to the correlation minimum-maximum sub-sampling block E2, the correlation minimum output 5 〇4, the correlation minimum operation effectively extends to a larger area to provide a correlation minimum analysis (MN is from block E2) The smallest 値 of the smallest received 値). Similarly, the maximum correlation block effectively provides the relevant maximum 値 analysis to the extension (MX is the largest 値 of the largest 接收 received from block E2). Because the inputs 502 and 5〇4 have been sub-sampled by 8 factor 1331306 in each direction (such as comparing the original pixel resolution of the input image DSC), the equivalent window of each correlation minimum MN and maximum 値 MX At the original pixel resolution, it is 7 2 X 7 2 pixels. The dynamic threshold module 3 20 applies an adaptive threshold to the input original signal DSC to produce a monochrome 8-bit gray signal GRS output, where the zero crossing is indicated at the edge of the selection plane. The dynamic threshold module 320 uses two sets of minimum/maximum 値(Μη, Mx) and (MN, MX) from the 5 X 5 fine- and 9x9 coarse resolution windows, and when the halftone weight is estimated by HTW and Ultra-blurred BLR—When the A signal is active, it can also receive both signals. The dynamic threshold module 320 generates a grayscale selection signal GRS, a carry segmentation signal SEG, and an 8-bit signal ENH, which are used to transmit the segment enhancement amount applied to the FG/BG separation block E8. Figure 7 shows three effective choices for the context area: a single pixel area for the existing pixel area, a 5x5 high resolution window W1, and a 9x9 coarse resolution window W2. Remember that the 9 X 9 window context W 2 corresponds to a 72x72 pixel window with 8 samples in each direction. The positive squares (pixels) in the 9x9 coarse resolution window W2 represent the extremes of the 8 x 8 original pixel window (i.e., the pixel of the original pixel resolution). The dynamic threshold module 320 uses the three predetermined contexts during the determination of the grayscale selection signal GRS.

When there is no contrast activity in both the 5x5 window W1 and the 9x9 window W2 (described below), a single pixel (existing pixel) area is used, in this case 'only the brightness of the input signal DSC is limited and not used Chromatic components (a, b). Otherwise, a combination of 5x5 high resolution and 9x9 coarse resolution regions is used to track and segment the input signal DSC -18-1331306 based on the activity level of the window. Activity within a 5x5 window indicates that there is an image edge in the window. Activity in the 9χ9 window indicates that the edge is approaching the small window or is leaving the small window. Thus the 'large 9x9 window acts as a look ahead feature. It also provides a history in which there has been an edge. Thus, the appropriate setting of the SEE signal is allowed (described below). Large 9x9 windows can be substituted for other embodiments for the same purpose. The operation of chasing and segmenting the input signal DSC will be described below based on the degree of activity in the window. Figure 8 shows a block diagram of one embodiment of a dynamic threshold module 320. This embodiment includes three logic blocks 810, 820, 830 and a decision module 840. The three logic blocks 810, 820, and 830 respectively correspond to the three possible context windows shown in Fig. 7, that is, a single pixel area, a 5x5 high resolution window W 1 and a 9 X 9 coarse resolution window W 2 . The multiplexer MUX can select and transmit one of these outputs as the final GRS output signal. The selection can be exchanged pixel by pixel according to the 2-bit signal SEL. The actual selection code for each input is shown to the right of the input arrow in Figure 8. For the case of a single pixel context, the deviation of the luminance component of the input signal DSC is subtracted from the predetermined 8-bit constant THR using the adder 815. The THR is stored in a programmable plan register so that it can be adjusted to accommodate sensor calibration. For an ideal balanced input signal DSC covering the full 9-bit luminance range, THR is typically set at THR = 128 so that the DSC luminance deviation causes the input signal GRS to have a mean value and the input signal to cross the threshold. However, because of the logarithmic response of the human visual system, it is visible that the threshold is also skewed away from the center. -19- 1331306 In addition, the scanner response varies over the entire dynamic range, or even does not cover the full 8-bit range. For example, the peak brightness 値 is determined by the brightest media reflectance, and the black of the sensor is determined to be at a low brightness output. The threshold of the threshold register THR can be adjusted approximately to demonstrate the above considerations, and better match the desired GRS response. In summary, only the luminance component of the input signal DSC is used for this biasing. Logic block 82 0 is used to address the 9x9 coarse resolution view window context W2 shown in FIG. The input of the logic block 820 is the full color coarse minimum MN and the maximum 値 MX from the most relevant and smallest blocks E3 and E4, respectively. Remember that these 来 are in the two directions with a factor of 8 - the minimum sampling correlation - the output of the largest square E1, and then search for the minimum and maximum 値 on the 9x9 window (ie, the smallest and largest of the smallest 値) The largest 値 in the 値) «The operation of the logic block 8 20 is equivalent to the implementation of the following two vectors X and Y scaled dot product: output 8 2 8 = <X,Y>; ( 1 ) Where <X,Y> is the proportional dot product of two vectors χ and γ; <X,Y> = (XL,Xa,Xb)(YL,Ya,Yb)t = XLYL + XaYa + XbYb ; (2 ) among them

^MX ~^MN X = MX-MN= aMX~aMN ; (3)

Pmx ~bMN _ and (4)

Y = DSC-(MX + MN)/2= a~(aMX + aMN)/2 .b~(bMx )/2 . (L, a, b) in equation (4) is the corresponding input signal DSC Color -20- 1331306 color component. The X vector in equation (3) is the vector difference between the maximum 値 MX and the minimum 値 MN. The gamma vector in equation (4) is the average 値 of the input signal dSc minus the minimum 値MN and the maximum 値MX, and the average 値 is the 3D midpoint between mn and MX. The proportional dot product of these two vectors is output proportional to the relative distance from the plane, which is perpendicular to the X vector and intersects halfway. Since the information after the search is a zero-crossing position, the exact size of the product is not required. Therefore, the result is divided by the bit factor of 2 5 6 (shifted to the right by 8), and the ratio returns to the 8-bit range. However, because the logic block 820 output (to the multiplexer 848) can sometimes overflow the 8-bit range (a factor of about 3 or 1.5 bits), if it is greater than 255, then multiple logic can be used. The block is to limit the logic block 820 to 255. The scalar measure of the total contrast size X 9 in the coarse resolution 9 X 9 window is generated by adding the absolute components of the vector X of the vector X in the summation block 829: X9 = Lx+ | ax | + | bx | =Lmx-L MN+ I ^ΜΧ-δΜΝ I + I bMX-bMN | : (5) With reference to equation (5), it is not necessary to take the absolute 値 of the luminance component L because L is limited to the positive range [ 〇·.255]»The equation for the logic block 820 (the implementation of Π to (5) is straight forward. Referring to the logic block 820 of Figure 8, the first two adders 821, 823 are one The component is implemented in a component mode to implement the vector sum and difference of the 3x1 input signal MX' MN. The processing adder 82 1 also divides the result by 2 (shifts it to the right by 1 bit 来) to obtain the symbol □ /2 The average 値. The adder 82 3 outputs a vector difference X (defined in equation (3)) to a block 8 2 9. The block 8 2 9 calculates the absolute 値 sum of the three components of the vector X and produces a contrast size X9. Adder-21-1331306 825 calculates the vector difference between the input signal DSC and the output from the adder 821. The vector Y in equation (4). Then, the X and γ vector components are multiplied one by one by pixel - add together to form the dot product in dot product block 827. The output 828 of block 827 is given by equation (1) And (2) to illustrate. Figure 16 is a graphical illustration of equations (1) to (4). In Figure 16, the origin of the three-dimensional space is assumed to be on the left-hand side, as shown. Vector MX ' MN denotes three-dimensional points MX and MN, respectively. The existing image pixels are represented by a vector DSC. As illustrated, the vector X = (MX-MN) and the vector Y are generated according to the vector operations of equations (3) and (4).値ch represents the result of taking the dot product of X and Y. 値 is the Y projection on X. 値 also shows the distance of the vector Y to the point represented by the plane Pi and the "direction". plane?! at the point in X Orthogonal vector X = MX-MN. The direction of the point represented by the vector Y, meaning whether the point is above or below the plane P!. The plane P! represents the threshold plane. The indication 値 (^ indicates after the threshold, Whether the existing image pixel DSC is above or below the threshold plane, ie 'whether it is closer to MX or MN, and how close. Indicates 値d ! Allow The decision is made on the existing pixel segment. For example, if the threshold pixel is very close to MX (MN, respectively), then it can be determined that the existing pixel is included in the foreground plane (respectively the background plane). If the threshold pixel is too close to the threshold plane Then, it can be determined that the existing pixels are included in both the foreground and the background plane. Referring to FIG. 8, the logic block 830 is used to address the 5x5 high resolution window context W1 shown in FIG. The input to logic block 830 is the minimum and maximum 値μ η, Μ X from the correlation minimum-maximum module E1. The operation of the logic block 830 to form a proportional dot product is the same as the above logic block 820 phase -22- 1331306. The operation of logic block 830 is equivalent to implementing a proportional dot product of the following two vectors: (6) (7) Output 8 3 8 = <Χ·, Y) where <Χ,Υ·> is in two vectors X· And the ratio of dot to 'X', Y^-CXL'.Xa'.Xb'KYL.Ya'.Yb'^XL'YL'+Xa'Ya'+Xb'Yb'; where X ' = Μ X - Μ η;

Lmx — LMn °Mx ~ aMn Pmx - (8)

And ~ + ^Mn ) / 2] / 2 (9) Y' = DSC-[BLR_A + (Mx + Mn)/2]/2= a — \aA +(aMx +awn)/2]/2 b- [bA + (bMl + bMn) / 2] / 2 In the equation (9), (L, a, b) 値 is the corresponding color component of the input signal DSC. The vector X' in equation (8) is the vector difference between the maximum vector Mx and the minimum vector Μη. The vector Y' in equation (9) is the average 値 of the input signal DSC minus the minimum Μη and the maximum Mx値, and the average 値 is at the 3 D midpoint between Μη and Mx. Taking the proportional product of the two vectors, the output is proportional to the relative distance perpendicular to the ^ vector and the plane crossing halfway. Since the post-search information is a zero-crossing position, the exact size of the dot product is not required. Therefore, the result is divided by the value factor of 2 5 6 to the applicable 8-bit range. However, because the logic block 830 output occasionally overflows the 8-bit range (a factor of about 3 or 1.5 bits), if it is greater than 255, the multi-plus logic block can be used to limit the logic block 830 output to 255. •23· 1331306 The scalar measurement for the entire contrast size X 5 in the fine resolution 5 x5 window W 1 (Fig. 7) is the absolute 値 of the three components of the vector X' in the total square 8 3 0 Add together: X5=Lx'+ | ax' | + | bx' I =Lmx-Lmn+ | aMX-aMN I + I bMx-bMN | ; (10) Refer to equation (10), no need to take the luminance component The absolute value of L is because L is limited to the positive range [0..25 5]. The implementation of equations (6) through (1〇) for logic block 830 is forward. Referring to logic block 830 of Fig. 8, the first two adders 83], 833 implement the vector sum and difference of the 3x1 input signals Μχ, Μη in one component by one component. The processing adder _ 83 1 also divides the result by 2 (so that it is shifted to the right by 1 position) to obtain an average 値 as indicated by the symbol □ /2. The adder 8 3 3 outputs a vector difference Χ ' (defined in equation (8)) to block 839. Block 839 calculates the absolute sum of the three components of vector X' to produce a contrast size of Χ5. The adder 803 calculates the vector Y' of equation (9) by performing a vector difference between the input signal DSC and the output of the adder 834. Then, X' and Y·vector components 1 are multiplied and added together by one element to form a dot product of the dot product block 837. The output of block 837 is illustrated by equations (6) and (7). It is important to note that the logic block 830 architecture differs from the logic block 820 in that it has an added threshold bias feature that pushes the threshold to BLR_A when the hyper-fuzzy reference signal BLR_A is active. La, aA, bA) to strengthen black or bright thin lines. This is obtained by averaging the super-fuzzy signal BLR_A and the mean Μ and Μη値 to form an alternative Y1 vector, as shown in equation (9). Figure 17 is a graphical representation of equations (6) through (9). In Fig. 17, the origin of the three-24-!3313〇6-dimensional space is assumed to be on the left-hand side as shown. The vectors Mx and Μη represent the three-dimensional point Μ and Μη, respectively. Existing image pixels are represented by a vector DSC. The super-fuzzy reference signal BLR_A is represented by a vector BLR_A. As shown in the figure, the quantity Χ' = (Μχ-Μη) and the vector Y' are obtained from the vector operation according to equations (8) and (9).値6 indicates the result of taking the dot product of X and γ·.値 also represents the vector Y, the distance to the point represented by the plane P2 and the "direction,. The plane P2 is orthogonal to the vector χ_Μχ_ΜΝ at a small point from the midpoint. This quantity represents the addition of the threshold deviation feature discussed in the previous paragraph. With the vector γ, the point shown, the direction ' means that the point is above or below the plane P2. Plane p2 represents a finite plane. The indication 値 indicates whether the existing image pixel D S C is above or below the threshold plane after the threshold, i.e., whether it is closer to MX or MN, and how much. Indicates that 値h allows decisions about the segmentation of existing pixels. For example, if the threshold pixel is very close to MX (spectively Μη), then it can be determined that the existing pixel is included in the foreground plane (respectively, the background plane). If the threshold pixel is too close to the threshold plane, then the existing pixel can be determined to be included in both the foreground and background planes. Referring to Figure 8, the decision module 84 receives the output 818 from the logic block 810 from the logic block 820. Output 828 and contrast size output Χ9, and output 838 from output block 830 and contrast size output Χ5. Decision block 840 includes comparator logic block 846, multiplexer 84 8 , enhanced code block 850, and comparator 852. Decision block 840 also includes two parametric segment linear function blocks 842 and 844 that process the halftone weight signal HTW when the halftone weight signal HTW is removed from the filter system. -25- 1331306 Comparator logic 8 4 6 receives the contrast size outputs X5 and X9, outputs the selection signal SEL to control the output GRS of the multiplexer 84 8 , and outputs the enable signal ΕΝΑ to control the enhancement signal EN 5 of the enhancement logic EN 5 . When the HTW from the removal filter system is active, after the estimated HTW has passed the parameterized segment linear function block 842, the comparator logic 8.4 can also use the 8-bit halftone weight frequency to estimate the HTW. Of course, with the definition of the aforementioned minimum and maximum operations, the contrast size of the larger 9x9 (sub-sampling) view window W2 must be equal to or greater than the contrast size of the smaller 5x5 high resolution window W1. In other words: X5 (11) This is due to the fact that larger windows are included in smaller windows, so the smaller ones can be larger, smaller and smaller. Furthermore, since the segmentation process is processed from one pixel to another (in the fast scan direction), the X 5 contrast is kept the same for 8 consecutive pixels until the next pixel intersects the 8x8 window boundary into the next non-overlapping Windows. On the other hand, the Xs contrast can be changed by one pixel by one pixel. This behavior is due to the implementation of 8x sub-sampling with the correlation minimum-maximum sub-sampling block E2. Figure 9 shows a block diagram of an embodiment of comparator logic 846. The two comparison magnitude measurements 値X5 and X9 compare the signals STH via comparators 904, 902, respectively, to generate select bits SEL0, SEL], respectively. Bits SEL0 and SEL1 form a 2-bit select signal SELECT. If the halftone weight HTW is effectively 'STH, the piecewise linear function block 842 is used to generate the STH. Otherwise, the STH is set at the predetermined time. Then, two bits SEL0 and -26-l33!3〇6 SEl1 are combined by a NAND gate 906 to produce a 1-bit enhancement enable signal ΕΝΑ. Figure 10 shows the equivalent truth table of the comparator logic. If the contrast measurement 値X 9 of the larger 9x9 (sub-sampling) window W 2 is less than S Τ Η, the SEL1 bit is removed and the SELEC signal is 〇 or 1 regardless of the contrast measurement of the smaller 5x5 window W1. This causes the multiplexer 8 4 8 to select a single pixel context output 818 (Fig. 8). However, if there is some activity in the larger 9x9 window W2, but not within the smaller 5x5 window W1, the SELEC signal setting is equal to 2 (binary "10"). The multiplexer 848 is thus caused to select the output 82 8 of the logic block 820. If the two windows display a fairly large contrast size, the SELEC signal is set at 3, resulting in the output 838 of the logic block 830 (corresponding to the 5 X 5 high resolution window) being selected by the multiplexer 804. In addition, when the SELEC signal is 3, the binary enable signal is turned on. The signal ΕΝ A is used to enable the strong block 805 to be enabled, and the output segment is to strengthen the signal ENH. Referring to Fig. 8, the enhancement coding block 850 also uses the half-tone weighted frequency prediction HTW of the linear function to generate an ENH signal which controls the amount of segmentation enhancement to be applied to the FG/BG separation block E8 (Fig. 3). The HTW signal is fed to the parameterized segment linear function block '8 4 4, which applies the segment linear function EEN to the signal HTW, and outputs the obtained signal to the enhanced coding block 850. The binary carry enhancement signal 来自 from comparator logic block 846 is used to gating (i.e., enable) the boost signal ENH as follows. If ΕΝΑ=1 ‘Bei! J block 8 44 outputs the signal to the output ΕΝΗ; otherwise, all the bits are forced to zero (de-energize). 8-bit ΕΝΗ output signal transmission -27- 1331306 The amount of segmentation enhancement to be applied to the FG/BG separation block E8. Referring to Fig. 8, comparator 8W compares the selectable halftone weight HTW and the predetermined threshold THRSEG to produce a selectable binary signal SEG. The binary signal can be selected to provide a means to control the segmentation function of the FG/BG separation block E8. When the HTW is greater than THRSEG, the binary signal SEG is turned on. When the SEG is turned on, the segmentation of the FG/BG separation block E8 is performed according to equations (1 4), (1 5), (1 6), (17). When the HTW is less than or equal to THRseg, the binary signal SEG is not turned on. When the SEG is not conducting, the segmentation of the FG/BG separation block E8 is performed according to equations (18), (19), (20). The 8-bit THRSEG can be programmed via the scratchpad. Referring to Fig. 3, selection logic block E6 converts the 8-bit grayscale selection input GRS into a binary selection plane output SEL which may have different resolutions for the input image signal DSC. For high quality text and line art, the binary selection output typically maintains a higher resolution than the background and foreground plane. For example, embodiment 300 uses a double resolution such that for a standard 60 dpi scanner, the output resolution of the binary SEL signal is typically set at 120 0 dpi. The logic block E6 is selected to interpolate the grayscale selection input signal GRS to a higher resolution, and the interpolated signal is obtained to produce a binary output SEL forming a selection plane. The figure shows the block diagram of the selection logic block E6. The selection logic block E6 includes an interleaver 1102 and a comparator 1104. The interpolator 1102 uses a two-dimensional bilinear interpolation method to interpolate the 8-bit gray scale selection input signal GRS within the gray scale domain. The interpolation factor can be programmed under software control. In the embodiment 1101 shown in Fig. 11 (and Fig. 3), the interpolation factor -28 - 1331306 is set at a system default setting of 2x. The signal from the interposer 1 102 is fed to the comparator Π04' such that it is opposite to the 値TSL·, and the resulting binary output is output as the selection signal s E L . The Threshold TSL is stored in a programmable scratchpad so that it can be changed from one page of the file to another. The ideal gradation selection signal GRS' 跨越 across the full 8-bit luminance range is typically set at the midpoint TSL = 0 to pass the input signal midway through. However, as noted above, for the signal THR (Fig. 8) at block 810, the actual TSL can be set differently to compensate for the actual dynamic range of the scanner sensor and/or the nature of the human visual system. _ Note that the existing 2x interpolation factor, the binary SEL output data rate is as fast as 2x image signal DSC in all directions. That is, for each 8-bit input GRS sample, the selection logic block E6 produces four binary output SEL samples. It is important to note that the vector symbol is used in the output SEL to indicate a higher output resolution. When the output SEL is still considered a binary (ie, assuming only 〇 or 1), each of the incoming GRS inputs is output, producing four select bits (assuming a normal 2X insertion factor). The output data rate is half the input rate because an 8-bit 値 is converted to four 1-bit 値. • Referring to Figure 3, edge processing block E7 receives the high resolution selection output and calculates the number of enabled and deactivated pixels in the 5 x 5 high resolution window at the center of the existing pixel. The edge processing block E7 outputs a 2-bit signal S E E . If all input pixels on the inside of the window are 〇 (corresponding to the 3 x 3 original input resolution background area), the S EE signal is set to 〇. Similarly, if all input pixels on the inside of the window are 1 (corresponding to the 3 χ 3 original input signal foreground area), the SEE signal is set at 3. In addition, if the -29- 1331306 within the 3x3 window has a majority of background (white) or most foreground (black), the SEE signal is set at 1 or 2. Figure 12 illustrates the function of edge processing block E7. The operation of block E7 is as follows. The edge processing block receives the binary selection signal SEL as an input having a higher resolution (typically 2x) relative to the source input signal (DSC). Edge processing block E7 maintains a 3x3 pixel context window W3 centered at the relevant pixel at the source input resolution. Since the selection signal is 2 times the original resolution, the elements of the 3 x 3 pixel window W 3 maintain the four high resolution binary S EL samples as shown in Fig. 12. The thicker line indicates the original DSC resolution, which corresponds to the 6x6-pixel context window β in the high resolution domain. However, only the point content of the 5 X 5 high resolution pixel area W 4 is used (in dotted lines) Show); the area between W 3 and W 4 is not included in the edge processing. The 5x5 resolution context W4 design detects near potential edges of existing pixels. The window pattern W4 uses the full context of the 2 high resolution pixels, which extend below and to the right of the existing pixels, but only one high resolution pixel extends onto it or to its left and right sides. The window pattern prevents any edges from overlapping adjacent pixels, i.e., the potential edge positions that are not associated with most of the lower resolutions can be detected more than once. Figure 2 shows a possible 4x4 edge position within the existing window. The edge processing block Ε7 counts the number of high resolution pixels that are currently turned on in the 5<5 high resolution area W4. This number can range from 〇 to 25. The output of the image-to-edge processing block 2-bit signal See is as follows: l.SEE = 0, if the 5x5 count is 〇 (no foreground pixels are found); -30- 1331306 2. SEE=1, if the count is Contains (most background pixels) the range [1..12]; 3. SEE = 2, if the count is in the range of inclusion (most foreground pixels) [13.24]; 4.SEE = 3, if the count is 25 (only found The foreground pixel); the 2-bit output signal SEE is transmitted to the FG/BG separation block E8. Note that the signal is at the original input resolution (typically 600dpi), although the selection signal is at a higher resolution of 2 times the original input resolution (for example, 1 200dpi). The FG/BG separation block E8 separates the input image signal DSC into a foreground and background plane. The block selects the edge count signal SEE using the full-color minimum and maximum 値 (Μη, Mx) outputs from the correlation minimum-maximum block E1 and the 2-bit from edge processing block E7. In addition, the FG/BG split block can also enhance edge lifting via the segmentation enhancement control signal ENH received from the dynamic threshold module 3 20 » as described above, in the FG/BG split block E8 The segment process can be controlled by selecting the binary signal SEG. The FG/ΒΘ separation block E8 outputs two full-color rough initial estimates Fgr and Bgr of the foreground and background outputs, respectively. The subsequent module, FG/BG block E9, further processes the estimated Fgr and Bgr to produce the final foreground and background output. The FG/BG split block E8 receives the full color original signal DSC to be segmented, and produces one or both of the Fgr and Bgr outputs. The FG/BG separation block E8 retains a special code of zero luminance and chrominance (L = a = b = 0) to represent an empty (undefined) pixel within the foreground estimate Fgr or the foreground estimate Bgr. Because the processing continues on the entire page, some foreground and background pixels will remain undefined. The FG/BG erasure block is then carefully charged for these undefined pixels to maintain low compression while avoiding artifacts that may be subsequent subsampling and JPEG compression. -31- 1331306 Figure 13 illustrates the decision range 'to separate the image signal into the background and foreground plane' used by the FG/BG separation block E8. The FG/BG separation block uses the binary selection edge count signal SEE from the edge processing block E7. To decide whether to use the background or foreground or both. If SEE 2 1 ' is used, the foreground is used; if S EE is 2, the background is used. Because these two situations are not mutually exclusive, when 1SSEES2, both foreground and background are used. The following two full-color quantities (the purpose of which will be explained below) are defined as follows: FGD = LIM[DSC + (Mn-DSC)(ENH/2 5 5 )] ; (12) Call BGD = LIM[DSC + (Mx- DSC)(ENH/25 5)]; (13) where DSC is a full color input signal, Μη and Mx are the least correlation and minimum output from the correlation minimum-maximum block E1, and ENH is from the dynamic threshold mode Group 3 2 0-bit segmentation enhancement signal. The limit function LIM is used to limit the result for the 8-bit range [1 ..25 5 ] for each component' thus excludes the special code reserved for identifying the zero of the undetermined pixel. Note that because DSC and Μη or Mx are full-color (L, a, b) vectors, the operation is in 3D space. _ For the case where the foreground is used during the segmentation, that is, when SEE = { 1 , 2, 3} and SEG = 1, the output Fgr is determined as:

Fgr = FGD if SEG = 1 and SEE = {1, 2, 3}; (14)

Fgr = 0 · If SEG=1 and SEE = 0; (15) When the control signal SEG is on (SEG=1) 'without foreground (ie 'When SEE = 0), the foreground pixel is according to equation (15) It is identified as undefined by setting its special code Fgr = 0 (for all three components). Note that -32- 1331306 In one embodiment, the ENH extends to the 9_bit representation, and the 値 is incremented by 1 to allow the 251 to be normalized by 256, thus, with a simple Shift 8 positions to replace the unnecessary division (divisi〇n)0. As shown in equations (14) and (12), depending on the amount of segmentation enhancement indicated by the 8-bit signal ENH, the foreground is expected. The estimated Fgr is interposed between the existing input signal 値DSC and the minimum -η of the correlation minimum-maximum block e1. When ΕΝΗ = 0, no enhancement is performed and the output is set to the input signal Fgr = DSC. As described above, this is a common case unless there is enough _ contrast activity in both the 5χ5 fine resolution windows W 1 and the 9x9 coarse resolution window W2. Equivalently, when ΕΝΗ = 25 5 (corresponding to maximum enhancement), the output will be set to the minimum chirp signal Fgr = Mn. This typically represents the case where the pixel is in close proximity to the edge' where it is preferably made as far as possible as the smallest pupil of the adjacent pixel (0 = black) to make the foreground blacker to strengthen the edge. In general, the amount of segmentation enhancement 变动 can vary between the two poles, and the output foreground 値 will be correspondingly weighted between D S C and Μ η 。. Similarly, for the case where the background is used during segmentation, that is, when SEG = 1 and SEE {0, 1, 2}, the output Bgr is determined by the following equation:

Bgr = BGD if SEG = 1 and SEE={0,1,2} ; (16)

Bgr = 0 - if SEE = 3; (17) The output Bgr 値 will vary between the input DSC and Mx 成 proportional to the segmentation enhancement ENH, as generated by equation (13). Equation (16) is similar to equation (14) except that the maximum 値Mx is used instead of the minimum 値Μη (see equations (12) and (13)) and the different ranges of SEE. Using Μχ for Bgr output will make it visually brighter rather than darker, as was the case with Mn 1331306 used for foreground estimation of Fgr. Moreover, as shown in equation (17) and corresponding (15), 'when no background is used, the background is set to 値 at a specific code Bgr = 0 (for all two components (L, a, b) ) to identify as undefined. In the case where the segmentation control is not conductive (i.e., 'SEG = 0), the background is arbitrarily set to a specific code regardless of the input pixel:

Bgr = 0 if SEG = 0; (18) and the foreground is set to one of the following:

Fgr = BGD > If SEG = 0 and SEE={0,1} (19)

Fgr = FGD > If SEG = 0 and SEE={2,3} (20) Depending on the SEE, equations (18), (19), (20) indicate that the background is always set to the special undefined identifier Bgr = 〇, and the foreground is the weight of the foreground or background pixels of equation (12) or (1 3). If SEE={0,〗}, the background is used, otherwise the foreground is used. It is important to note the scope of the SEE in this case where the segmentation control is not conductive, which is different from the equations (14) to (17). Here, if the majority of the pixels are the foreground {SEE={0,1 }}, the foreground 値 is set only in FGD, or if most of the background {SEE={2, 3}} is at BGD. The output from the FG/BG separation block E8 is two partial full-color planes Fgr and Bgr. At the edge of the selection plane SEL, depending on whether it is bright or dark, 'typically only one of the foreground and background outputs contains the existing pixel color (which can be enhanced). However, information near the edge can be carried simultaneously in the foreground and back view channels. FG/BG block E9 in the rough foreground and background estimates Fgr and Bgr implementation multi-34-1331306 plus processing 'and produce final prospects and background output FG and BG 〇 FG / BG 方块 block E9 implementation process slightly extended The edge front and background 値 'and also fill the undefined pixels in the foreground and back planes. The purpose of this process is to prevent manual errors due to subsequent sub-sampling and data compression (such as JPEG), and to fill undefined pixels to achieve a good compression ratio. The logic inside the FG/BG erasure block E9 also monitors the foreground and background output 値 to detect and flag all black or all white tiles. Instead of encoding and exporting the output from this block to the output stream, it is better to use and reference the number of times the specific tile is identified. This will eliminate the need to repeatedly encode generic all white or white and black tiles, increasing the overall compression ratio. Figure 14 is a block diagram showing an embodiment of the FG/BG erasure block E9. The embodiment comprises two expansion blocks F1, F2, two average squares F3'F4, two charge/sub-sample blocks F5'F6 and a tile flag block F7. Dilate blocks F1 and F2 expand the foreground and background content by 2 pixels. Implementing an expansion of 2 pixels is expected in subsequent 2 dice-sampling; other extended sizes can be used for different sub-sampling factors. The purpose is to increase the foreground and the background overlap on the edge, making the result insensitive to further sub-sampling. Figure 15 illustrates the utility of the expansion operation of the expansion blocks F1 and F2. Area] 5〇4 represents a predetermined pixel. A region 1502 represents an unscheduled pixel. After the expansion operation, the area of the predetermined pixel is expanded to also cover area 1506, and the area of the undefined pixel is reduced to area 1508. The operation of the expansion block is obtained using the low pass filter Fz_n. The η suffix -35- 1331306 indicates the number of filter coefficients. In one embodiment, a 2-dimensional 5x5 triangular filter Fz_5 is used. The z suffix indicates that this filter removes any zeros from the total normalization weight. The total Fz_n filter equation is as follows: Output 値: (21) where au is the 2D input 値, Wij is the 2D filter coefficient, and δ(&ϋ) is defined as follows: 5(ajj)=l, if ajj#0 Otherwise 5(ajj) = 0; (22) _ As can be seen from equation (21), the Fz_n filter is different from the regular filter, where the total weight is no longer exactly the conventional normalization constant. Since the number of input pixels with zero 没有 is not known in advance, it is necessary to keep the accumulator that is continuously used for weights. At the same time, the filter loop is operating, and if its input 値 is non-zero, the contents of the accumulator are increased by the 滤波器 of the existing filter coefficients. Since the total weight is not fixed and predictable, the final normalization of the filter output depends on the total weight. However, it is still possible to use a predetermined multiplication table with multiplier selection for the possible total weight 値, while avoiding the division operation in equation (2). ® For the purpose of using a specific Fz_n filter, the filtered output is contaminated by eliminating any pixels marked as undefined and having a specific zero identification. Since the specific zero flag 値 is chosen to be zero, the undefined pixel does not respond to the numerator of equation (17). However, the number of these undefined pixels must be tracked in order to keep the denominator correct. When the filtered output of the Fz_5 filter of the expansion block F1 (or F2) is non-zero at any time (ie, at least one pixel is within the -36-1331306 5x5 window at the center of the existing pixel, or completely defined), Instead of a specific zero identifier for undefined pixels. Note that the filtered output of the Fz_5 filter in the expansion blocks FI, F2 is only used for the previously defined pixels and only affects the pixels within the two pixel regions immediately adjacent to the edge. Referring to Figure 14 'average blocks F3 and F4, the non-zero content of the expanded foreground and background 平 is averaged via the J P E G M C U (minimum 値 coding unit) block. These blocks have a size of 16x16 for non-sub-sampled output, and 32x32 if the output is sub-sampled by a factor of two in all directions. Again, the averaging is carefully performed to exclude any undefined pixels that would otherwise bias the results. The averaging job can be viewed in the same way as the Fz_n filter but with a single weight instead of a triangular shape. The block average is implemented on a fixed non-overlapping JPEG MCU block grid. The 塡/sub-sampling blocks F5 and F6 replace the average background and foreground 自 from the F3 and F4 units to replace any other undefined pixels in the expanded background and foreground channels, respectively. With these alternatives, the compression ratio is improved and the JPEG-ringing manual error is further greatly prevented. Since the background and foreground channels are typically sub-sampled, the charge/sub-sample blocks F5 and F6 also perform sub-sampling operations as desired, and output background and foreground signals BG, FG. The block standard fiber block F7 monitors the front view and the background channel on the block, and the flag effectively has any block of all white and white black. The block size is programmable, but typically varies from 64x64 to 512x512 pixels. If the absolute chromaticity 値 (ie, |a| and 丨b|) of each and every pixel in the tile is less than the known threshold, and the brightness is greater than the known threshold, then the block is -37- 1331306 Will be considered all white. Similarly, if the absolute chroma 値 (ie, both |a 丨 and |b I ) and the luminance 値 are all less than the known threshold 拼, the tile will be considered completely black. The above three thresholds can be programmed using a scratchpad. The following describes how the selectable signal HTW can be generated from the halftone estimation module. The halftone estimation module is used to measure the frequency and halftone weights in cells surrounding the existing pixels. The input to the halftone estimation module is the original signal DSC and the output BLR_3 from the low pass filter (ie, having 3 coefficients). This input is a full color (L, a, b) signal. The halftone estimation module produces two monochromatic (signal-channel) output signals FRQ and HTW, representing the estimated frequency and halftone weight, respectively. Each of the signals is represented by an 8-bit representation, and HTW represents the confidence in the halftone region. If the HTW is small (low confidence), the active segmentation is not turned on to prevent the rise of each and every halftone point. Figure 18 is a block diagram of an embodiment of a halftone estimation module. As shown in Fig. 18, the embodiment of the halftone prediction mode group includes two separate frequency detecting channels operating simultaneously, the outputs of which are combined in the final step to produce halftone weights. Each frequency channel contains a minimum-most texture detector (C2 and D2) followed by a tandem averaging filter. Most averaging filters also subsample the data by a factor of two, resulting in a significant reduction in peak-to-peak bandwidth. At the end, the data is sampled back to the original resolution. The symbol in Figure 18 is to depict the various blocks connected by dotted lines as a pair (no actual connection) to emphasize the similarity between the two frequency channels. The matching pair block is represented by the same block number, with the initial letter C being 1331306 in the original frequency channel, and D being used in the fuzzy frequency channel. Therefore, the matching pair is represented by (Cn, Dn), and η = [2, ._·, 9]. The symbols used for the names of the blocks are as follows: the first number (bottom line) indicates the size of the window used; the second number follows the slash to indicate the amount of sub-sampling performed in each direction inside the block. Thus, for example, the filter labeled Β3/2 represents a fuzzy (low-pass) filter Β having a 3x3 window size, the output of which is sub-sampled by two factors in both directions (ie, for each 2x2 = 4 The input pixel only transmits one output)) The blocks included in the halftone estimation module are explained in more detail below. The sub-sampling unit D 1 reduces the data rate by a factor of 4 by omitting each pixel and row of the input. Sub-sampling is only required in the fuzzy frequency channel D. The full resolution frequency channel C does not require sub-sampling. The input to the SS/2 unit is the full-color (L, a, b) output signal from the small low-pass filter. The output of the BLR_3"SS/2 unit is a full-color (L, a, b) signal. The preferred sub-sampling method is to apply a simple pre-filtering before sub-sampling to eliminate potential frequency aliasing problems. Two identical minimum-maximum detection modules C2'D2 are used to find the peaks and enthalpies in the input signal to calculate the number of peaks and valleys per unit area to obtain a local frequency measurement. Each of the two minimum and maximum units takes a full color (L, a, b) signal as an input. When the central pixel of one of the color components is at a limit (peak or valley) relative to its eight neighbors according to the logic described below, each unit is displayed using a 3 X 3 view window. Each color component is independently detected in its own 3x3 window. The output from each of the minimum · -39 - 1331306 maximum detection units is a 2-bit signal that shows the total number of color components in the extreme state. The number can vary from 0 (no color component at extremes) to 3 (all color components are at extremes). When one or two color components are at the extremes, there is no difference that is at the pole; only the total number of components at the pole is output. Figure 19 shows the minimum-maximum detection structure. For each color component, the outer ring of 8 pixels surrounding the center pixel (about the existing pixel) is analyzed first. The eight outer loop pixels are further divided into two groups of four pixels as shown in Fig. 19. The separation of the outer rings into two groups has the potential to reduce false alarms in detecting straight line segments as halftones (since the halftones most commonly encountered are typically classified as clustered dots or row selections ( Line-screen)) 〇 For each group 'in the composition of the group to compare the pixels 値 and independently determine the minimum and maximum 在 in each group: A ma3 ( = max (Aij); the whole (i, j) belongs to the group A; (23) A min = min(Aij); the whole (i, j) belongs to group A; (24) B max = max(Bij); the whole (isj) belongs to group B; (25) B min = min( Bij); the whole (i, j) belongs to group B; (26) Then, the whole outer ring is compared by the above 値 to calculate Δ ring = max(Amax, Bmax)-miii(Amin, B min) * (27)

Next, test Δη ng値 to see if there is any comparison of the outer ring. Regardless of the central pixel 値 'if Δηng値 is less than or equal to the predetermined small threshold T2, the output is set at 〇 (not the extreme point): If (ΔΗηε$ T2) ' then turn (〇); (28) -40- 1331306 On the one hand, if there is sufficient activity in the outer ring (as shown by outer ring contrast > T2), then two tests are performed to see if the central pixel is at the extreme outer ring. If the center pixel 値Χ (substantially) is larger than the largest pixel 任一 of any group, it is defined as at the peak: If [(Amax + S<X) and (Bmax$ X)], then turn (1); (29) where S is the outer loop contrast, in proportion to the contrast scaling parameter C: S-Δring/C, (30) In one embodiment, the comparison calibration parameter C is set equal to 8 . Scaling The actual 値 of parameter C is a function of the signal-to-noise ratio at the input. It is desirable to maintain C値 as a generic parameter of the minimum-maximum detection unit. C値 can be limited to a power of two, so that it can be implemented as an arithmetic shift' while saving the division operation required to implement each pixel. Similarly, 'if the central pixel 値X (equivalently) is smaller than the smallest pixel 来自 from group A or B, it will be defined at each :: If [(Ami^X + S) and (Bming X)], turn (1 (3 1) Equations (29) and (31) determine two conditions, where the output from the 3x3 detection window is set to 1; in all other cases, the output will be set to 〇. In the second embodiment, if the center pixel 値χ (equivalently) is larger than the maximum pixel 任一 of any group, it will be defined at the peak: if [(Amax + NTH<X) and (Bmax$ X)] , Swing (1); (2 9 A) where Nth is the noise threshold, defined as: NTH = noise deviation + (noise factor χχ) / 256 where the noise deviation and noise factor are tuning parameters (tuning parameter ). -41- 1331306 Similarly - if the central pixel 値x (equivalently) is smaller than the smallest pixel 来自 from group A or B, it will be defined at each :: if [(Amin>X + NTH) and (B„ Hn2 X)], Swing (1); (31A) Equations (29A) and (31A) determine two conditions, where the output from the 3x3 detection window is set to I; in all other cases, the output will be set at 〇° Note In the second embodiment, it is not necessary to calculate the entire outer loop comparison. Finally, each color component is processed independently by its own separated 3x3 window. Then, the three binary outputs of the color components are added together to form a minimum - The last 2-bit output of the largest detection module. The two minimum-maximum detection outputs C2 and D2 are fed to the cascaded fi Iter chain C3-C6 and D3-D6, respectively. The cells C3 and D3 are different between the two chains, but otherwise, the subsequent cells C4-C6 and D4-D6 are all identical. The first filter unit C3 receives the minimum and maximum detection unit from the high resolution. 2-bit output of C2. The input is filtered by the F_7/4 filter, which The waver is in one embodiment a 7x7 symmetrical, triangular and separable filter. The /4 symbol indicates that the filter F_7/4 also sub-samples the filtered output in four directions in both directions. F_7/4 produces only one output pixel for each of the four output pixels and each of the four rows, thus effectively reducing the data bandwidth by a factor of 16. Since the input of the first filter unit C3 is limited to the 2-bit Yuan (instead of 8-bit), so the output of the filter is normalized by scaling the result with a different power of two (ie 2). The scaling power retains the design parameters. After the first normalization, however, the result is The calibration is applied to the 8-bit range, so that after the -42·1331306 of this point, the subsequent filtering uses the 8-bit rendering system. The second chain prefiltering filter unit D3 is different from C3 in the two architectures. First, the F-5/2 filter is sub-sampled input in only 2 factors (instead of 4) in each direction. That is, the waver produces only one output pixel for each input pixel and every interlaced line. Therefore, effectively making the data bandwidth bandwidth reduce the factor of 4. Because of the sub- The sample factor is small, and the span of the resulting filter can be reduced from 7 (for C3) to 5 (for D3). In one embodiment, the normalization factor of F_5/2 is determined to be 29. Note that from two The outputs of the pre-filter units C3 and D3 (now 8-bit wide) are both sub-sampled in two dimensions, or the same resolution of 1/16 of the original input bandwidth. This is because The F_7 Μ filter of the C3 unit in the upper chain obtains the output rate of the entire output rate matching C3 by combining the sub-sampling data with the SS/2 and the F_5/2 unit D3 in the lower chain. The two outputs from filter units C3 and D3 are further filtered separately via three more identical and identical units C4-C6 and D4-D6. Each of the six filter units also processes its individual input signals with an F_3/2 filter (having a coefficient of 1-2-1) sub-sampled in two directions in two directions. Note that each of the filters has a total weight of 1 + 2 + 1 = 4, so that it can be easily shifted to the right by 2 to replace the normalized division and simplify the implementation. Since each filter unit also samples its individual input signals by a factor of 2, the signals at the individual outputs of the C6 and D6 filter units are actually sub-sampled in each direction by a factor of 32 (or Reduced by 1 0 2 4 times in the frequency bandwidth). The next two filter units C7 and D7 are specific filter units, indicating -43- 1331306 as the Fz_5 filter. The Z suffix represents a filter that eliminates any zero term from the total normalized weight. The general Fz_n filter equation is as follows: Output 値Σ<Σμ>.. * δ (a,. (32) where aij is the 2D input 値, wu is the 2D filter coefficient' and S(aij) defines the following function: 5(aij)= 1, if aij#0; otherwise 3(aij) = 0; (33)

As can be seen from equation (32), the difference from the regular filter is that the total weight is no longer just a known normalization constant. Since the input pixels with zero turns are not known in advance, the accumulator that continues to be used for weights must be maintained. At the same time, the filter loop operates. If the corresponding input 値 is non-zero, the contents of the accumulator are increased by the 滤波器 of the existing filter coefficients. Since the total weight is not fixed and is not known in advance, the final normalization of the filter output depends on the total weight. However, the division operation in equation (32) can be avoided by using a predetermined multiplication table with a choice of possible total weights.

The purpose of using a particular Fz_5 filter is to obtain reliable frequency and halftone weight estimates even when the filter is very close to the edge. The two MX_5 modules C8 and D8 search for the maximum 値 in the 5x5 window, and the maximum output is 値. Each of the two interposer modules C9 and D10 interpolates (i.e., upsamples) the signal by a factor of 32 such that it returns to the original resolution. Each of the interpolating units performs bilinear interpolation, and substantially 3 2 x 3 2 pixels are generated for each of the 4 original pixels. The step size of the bilinear interpolation is 1/32 of the original pixel grating. -44- 1331306 The halftone module HTW receives the outputs of two interleaved units labeled FRQ and FRQ_B as inputs. The halftone weighting module adds the contributions from each input together as follows: HTW = HTWh + HTWl; (34) where HTWh = (FRQ_Th) * SFh if FRQ > TH; 0 Otherwise; (35) HTWL =(FRQ_B_TL)*SFL if FRQ_B>TL; 0 otherwise; (36) where TH and TL are two predetermined thresholds, and SFH and SFL are the original (high) and filtered (low) frequencies FRQ and FRQ_B, respectively The two predetermined scale factors. Multiple logic ensures that the HTW is limited to an 8-bit range that does not exceed the allowed [0, 25 5]. Figure 20 is a graphical illustration of the clipping effects of equations (34), (35), (3 6), and multiple plus logic limits HTW 所 in the allowed range. The area marked "LA" indicates the line art region. As shown in Figure 20, a special color filter pattern changes its position from HFHT to MFHT to LFHT as its frequency changes from high to medium to low. Since the curve shown on the 2D plot is convex, it is not possible to distinguish the filter frequency by simply following FRQ or FRQ_B. In the above description, the elements of the embodiments of the present invention can be obtained by hardware, firmware, soft body, and any combination thereof. The term hardware generally refers to components having a physical structure, such as electronic, electromagnetic, optical, electro-optic, mechanical, electronic machine parts, and the like. The term software refers to logical structures, methods, programs, programs, paths, procedures, operations, formulas, functions, expressions, and so on. The terminology firmware -45- 1331306 refers to the logical structure 'methods, procedures, programs, paths, procedures, operations 'formulas, functions, expressions, etc.' that are obtained and implemented in a hardware structure (ie, flash memory, Read only memory (R Ο Μ ), erase R 〇Μ). Examples of scorpions may include micro-encoded, writable control storage 'micro-stylized structures. When implemented in software or firmware, the elements of embodiments of the present invention are basically coded segments that perform the necessary tasks. The software/body may include the actual code ' or the code of the emulation or simulation work performed to perform the work described in one embodiment of the present invention. The program or code segment can be transmitted via the transmission medium by means of a processor or a machine-accessible medium or a signal modulated by a computer data signal or carrier carried out by a carrier. "Processor readable or accessible media" or "machine readable or accessible media" may include any medium that can store, transfer or convert information. Examples of processor readable or machine readable media include electronic circuitry, semiconductor memory devices, read only memory (ROM), erasable ROM (EROM), floppy disk, hard disk (CD) ROM' Disc, hard disk, fiber media, radio frequency (RF) links, etc. The computer data signal can include any signal that can be propagated via a transmission medium such as an electronic network channel 'fiber, air, electromagnetic RF link. Code segments can be downloaded via a computer network such as the Internet or an intranet. Machine accessible media can be implemented by making an article of manufacture. The machine-accessible medium can include material that, when accessed by a machine, causes the machine to perform the operations described below. The machine access medium can also include its built-in program code. The program code may include machine readable code that implements the operations described above in the present invention. The term "code" is used herein to mean any form of information that is encoded for machine-readable purposes. Therefore, it can include programs, coded 'data' files, and so on. -46- 1331306 All or a portion of the embodiments of the invention may be obtained in the form of a hardware, a soft body or a tough body or any combination thereof. The hardware, software or firmware components can have a plurality of modules coupled to each other. The hardware modules are coupled to another module by mechanical, electrical, optical, electromagnetic or any physical connection. The software module is called by function, program 'method, subroutine or subroutine call (subroutine call), jump (jump), key path, parameter 'variable number and argument transfer (parameter, variable, argument passing, function return) (function return) and so on to another module. The software module is coupled to another module to receive variables, parameters, arguments, indicators, etc. and/or to generate or pass results, update can be Variable 'indicator, etc. The body module is coupled to another module by any combination of the above hardware and software coupling methods. The hardware, software or firmware module can be coupled to any other hardware 'soft body Or one of the firmware modules. The module can also be a software driver or an interface that interacts with the operating system on the platform. The module can also be a hardware driver to structure, set up, initialize, transmit and receive data back and forth to the hardware. Apparatus or system may comprise any combination of hardware, software or firmware modules. An embodiment of the invention may be described as a method or process, which is generally described as a flowchart, a flowchart, and a structure. Or block diagrams. While any of these statements may indicate that the job is a sequential process, many jobs may be implemented in parallel or limp. In addition, the job order may be rearranged. When the job is completed, the process terminates. The process may correspond to a method , a program, a program, a method of production or manufacturing, etc. (5) Brief description of the drawing Figure 1 is a diagram illustrating the MRC structure for the file; -47-1331306 + Figure 2 shows a block diagram of the system of the present invention Figure 3 is a block diagram showing an embodiment of the system of the present invention; Figure 4 is a diagram showing the function of the correlation minimum-maximum block E 1 used in an embodiment of the system of the present invention; Figure 5 is a diagram showing the system of the present invention. The function of the correlation minimum-maximum sub-sample block E2 used in an embodiment; FIG. 6 illustrates the function of the correlation maximum block E3 and the correlation minimum block E4 used in one embodiment of the system of the present invention; The figure illustrates two window contexts used by one embodiment of the dynamic threshold module; FIG. 8 shows a block of an embodiment of the dynamic threshold module. Figure 9 shows the implementation of the comparator logic block included in one embodiment of the dynamic threshold module; Figure 10 shows the true table of the comparator logic block of Figure 9; Figure 1 shows the dynamic threshold An embodiment of the module includes an implementation of a selection logic mode; FIG. 2 illustrates a functional diagram of an edge processing block included in the separation module; and FIG. 3 illustrates a separation module used to cause an image The signal separation becomes a decision range of the background and the foreground plane; FIG. 14 shows an implementation block diagram of the FG/BG cleanup block included in one embodiment of the separation module; The figure illustrates a dilate operation diagram used in one implementation of the FG/BG elimination block included in an embodiment of the separation module; FIG. 16 is a diagram illustrating the equations of equations (1) to (4) ; -48- 1331306 Figure 17 is a graphical illustration of equations (6) through (9); Figure 18 is an example structural diagram of a halftone evaluation module; Figure I9 shows a halftone of Figure 18. The smallest _max detection module included in the evaluation module The small maximum detection method diagram; and Fig. 20 shows the equation diagram of the implementation of the halftone weight module included in the halftone evaluation module. Representative symbols for the main part 200,300 segmentation system 202,310 min-max module 2 04,3 2 0 threshold module 2 0 6,3 3 0 separation module 502 maximum output 504 minimum output 818,828,838 output 820,830 logic block 821,823,825 adder 827,837 dot product block 831,833,834,835 adder 840 decision module 846 comparator logic 848 multiplexer 850 enhanced coding block 8 5 2,902,904,1 1 04 comparator 1102 interposer 1 502,1 504,1 506,1 508 area

-49-

Claims (1)

1331306 98.19 —1—~ Year and month repair (more) for the total page No. 93 1 00002 “Method and system for separating image signals into a set of image planes, machine accessible media and methods for dynamically limiting image signals And System" Patent Case (Revised on December 16, 2009) Pickup, Patent Application Range: 1. A method for separating image signals into a set of image planes, which includes the following steps: (a) via min-max The module is configured to find a minimum chirp and a maximum chirp in at least one window at a center of the current pixel in the image signal; (b) a minimum threshold received from the minimum-maximum module via a dynamic threshold module And maximizing the current pixel, calculating an individual indication of the distance and direction of the current pixel relative to the individual threshold plane for the at least one window, and outputting a control signal according to the indication; and (c) including Presenting the current pixel in at least one of the image planes, and separating the image signal into the group of images according to the control signal via the separation module flat. 2. The method of claim 1, wherein the image signal comprises a luminance signal, a first chrominance signal, and a second chrominance signal, and wherein the operation of step (a) comprises the following steps: Find the minimum brightness and the maximum brightness in the brightness signal; adjust the minimum brightness and the maximum brightness in the window; and output the minimum brightness, the maximum brightness, and the maximum brightness corresponding to the brightness of 1331306 (3⁄4 is replacing the page 値 and the first and second chrominance signals in the position of the largest 値, 値 3. a system for separating the image signal into a group image plane, wherein the system comprises: U) a minimum-maximum module that receives the image signal and finds a minimum chirp and a maximum chirp in at least one window at a center of the current pixel in the image signal; (b) a dynamic threshold module 'and the minimum-maximum module Communicating, based on the minimum and maximum modules received by the minimum-maximum module and the current pixel, and calculating, for the at least one window, the current pixel relative to the individual threshold plane An individual indication of the distance and direction, and outputting a control signal according to the indication; and (a separation module, communicating with the dynamic threshold module to include the current pixel in at least one of the image planes) The system of claim 3, wherein the image signal comprises a luminance signal, a first chrominance signal, and a second chrominance signal, and The minimum-maximum module: searching for the minimum brightness and the maximum brightness in the brightness signal in the window; determining the maximum brightness and the minimum brightness in the window: and outputting the minimum brightness, The first brightness and the second chromaticity letter -2-: 1331306 corresponding to the minimum brightness 値 and the brightness 値 値 _ 13 13 更 更 更 更 更 更 更 更 更 更 更 更 更 更 更 更5. A machine-accessible medium comprising: a machine-usable medium having a program code built therein for encoding an image signal into a group of images The program code includes: (a) a machine readable code for finding a minimum chirp and a maximum chirp in at least one window at a center of the current pixel in the image signal; (b) a machine readable code, And calculating, according to the individual minimum and maximum 値 and the current pixel, an individual indication indicating a distance and a direction of the current pixel relative to the individual threshold planes, and outputting a control signal according to the indication ;; And (c) the machine readable code, wherein the image signal is separated into the set of image planes by the presentation of the current pixels included in at least one of the image planes according to the control signal. The method for limiting an image signal, wherein the method comprises the following steps: (a) receiving the image signal at a calculation block and a minimum chirp and a maximum chirp within each group of windows at a center of the current pixel in the image signal; (b) calculating, based on the current pixel and the individual minimum and maximum chirp, a representation of the current pixel relative to the individual threshold for each of the windows Zhi indicating individual distance and direction of the surface; and (c) outputting a control signal based on the indication Zhi. 7. A system for dynamically limiting an image signal, wherein the system comprises: a calculation block 'receiving the image signal and presenting in the image signal -3- 1331306 98. 12 l 6 1 month ( repair (more </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; An individual indication of the distance and direction of the individual threshold planes, and a control signal is output based on the indication. 8. A method of separating an image signal into a set of image planes according to a control signal, wherein the method comprises the steps of: (a) receiving the control signal and generating a selection signal via a selector module; (b) receiving the selection signal and generating a determination signal via an edge processing module; (c) receiving the image signal and And determining, by the foreground/background separation module, a foreground signal and a background signal, wherein the present pixel representation of the image signal is included in at least one of the foreground signal and the background signal according to the determination signal. 9. A system for separating an image signal into a set of image planes according to a control signal, wherein the system comprises: a Φ selector module, receiving the control signal and generating a selector signal: an edge processing module, receiving the selection signal and Generating a decision signal; the foreground/background separation module receives the image signal and the decision signal, and outputs a foreground signal and a background signal, wherein the present pixel representation of the image signal is included in the foreground signal and the background according to the determination signal At least one of the signals. -4-