TWI465892B - 實施減小電力狀態之晶片及運算平台 - Google Patents

實施減小電力狀態之晶片及運算平台 Download PDF

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Publication number
TWI465892B
TWI465892B TW100122246A TW100122246A TWI465892B TW I465892 B TWI465892 B TW I465892B TW 100122246 A TW100122246 A TW 100122246A TW 100122246 A TW100122246 A TW 100122246A TW I465892 B TWI465892 B TW I465892B
Authority
TW
Taiwan
Prior art keywords
reduced power
platform
state
power mode
node
Prior art date
Application number
TW100122246A
Other languages
English (en)
Chinese (zh)
Other versions
TW201222229A (en
Inventor
Jim Walsh
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW201222229A publication Critical patent/TW201222229A/zh
Application granted granted Critical
Publication of TWI465892B publication Critical patent/TWI465892B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3253—Power saving in bus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)
  • Measuring Volume Flow (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
TW100122246A 2010-06-30 2011-06-24 實施減小電力狀態之晶片及運算平台 TWI465892B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/828,221 US8407504B2 (en) 2010-06-30 2010-06-30 Systems and methods for implementing reduced power states

Publications (2)

Publication Number Publication Date
TW201222229A TW201222229A (en) 2012-06-01
TWI465892B true TWI465892B (zh) 2014-12-21

Family

ID=45400658

Family Applications (2)

Application Number Title Priority Date Filing Date
TW100122246A TWI465892B (zh) 2010-06-30 2011-06-24 實施減小電力狀態之晶片及運算平台
TW103135191A TWI518495B (zh) 2010-06-30 2011-06-24 實施減小電力狀態之晶片及運算平台

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW103135191A TWI518495B (zh) 2010-06-30 2011-06-24 實施減小電力狀態之晶片及運算平台

Country Status (7)

Country Link
US (2) US8407504B2 (fr)
EP (2) EP3534237B1 (fr)
JP (1) JP5746337B2 (fr)
KR (1) KR101488697B1 (fr)
CN (2) CN103097985B (fr)
TW (2) TWI465892B (fr)
WO (1) WO2012012144A2 (fr)

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US8407504B2 (en) 2010-06-30 2013-03-26 Intel Corporation Systems and methods for implementing reduced power states
US8959374B2 (en) * 2012-07-31 2015-02-17 Hewlett-Packard Development Company, L.P. Power management for devices in a data storage fabric
US9575552B2 (en) 2013-04-17 2017-02-21 Intel Corporation Device, method and system for operation of a low power PHY with a PCIe protocol stack
US10496152B2 (en) * 2013-09-27 2019-12-03 Intel Corporation Power control techniques for integrated PCIe controllers
US9467120B1 (en) * 2013-12-19 2016-10-11 Altera Corporation Power management for PCI express
KR102108831B1 (ko) 2014-01-22 2020-05-28 삼성전자주식회사 저전력을 위해 피지컬 레이어의 웨이크업 신호를 라우트할 수 있는 장치, 이의 동작 방법, 및 상기 장치를 포함하는 데이터 처리 시스템
US9916876B2 (en) * 2014-07-21 2018-03-13 Intel Corporation Ultra low power architecture to support always on path to memory
CN105589542A (zh) * 2014-11-13 2016-05-18 鸿富锦精密工业(武汉)有限公司 接口供电电路
US9880601B2 (en) * 2014-12-24 2018-01-30 Intel Corporation Method and apparatus to control a link power state
US10481661B2 (en) * 2016-03-30 2019-11-19 Intel Corporation Power supply interface light load signal
JP2017177573A (ja) 2016-03-30 2017-10-05 キヤノン株式会社 ＰＣＩ（Ｐｅｒｉｐｈｅｒａｌ Ｃｏｍｐｏｎｅｎｔ Ｉｎｔｅｒｃｏｎｎｅｃｔ）バスに接続されたＰＣＩデバイスを備える情報処理装置及び情報処理装置の制御方法
US10365706B2 (en) 2017-03-03 2019-07-30 Qualcomm Incorporated Asymmetric power states on a communication link
JP6409240B1 (ja) * 2017-09-06 2018-10-24 レノボ・シンガポール・プライベート・リミテッド 情報処理装置、制御方法、及びプログラム
CN112783817B (zh) * 2021-01-29 2024-01-05 上海联影医疗科技股份有限公司 设备接入检测装置、PCIe路由卡、系统、控制方法及介质

Citations (6)

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TW200603001A (en) * 2004-01-20 2006-01-16 Standard Microsyst Smc Peripheral device feature allowing processors to enter a low power state
TW200608182A (en) * 2004-08-26 2006-03-01 Via Tech Inc Power management state control method
US20060149977A1 (en) * 2004-12-31 2006-07-06 Barnes Cooper Power managing point-to-point AC coupled peripheral device
TW200641623A (en) * 2005-05-23 2006-12-01 Via Tech Inc PCI express transitioning link power state system and method thereof
US20080288798A1 (en) * 2007-05-14 2008-11-20 Barnes Cooper Power management of low power link states
TW201015289A (en) * 2008-06-26 2010-04-16 Intel Corp Coordinated link power management

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JP2004199115A (ja) * 2002-12-16 2004-07-15 Renesas Technology Corp 半導体集積回路
US20040250147A1 (en) * 2003-06-03 2004-12-09 Christopher Chang Uninterrupted system operation
JP4529441B2 (ja) * 2004-01-05 2010-08-25 富士ゼロックス株式会社 画像処理装置およびホスト装置
US7809969B2 (en) * 2005-12-28 2010-10-05 Intel Corporation Using asymmetric lanes dynamically in a multi-lane serial link
US7743269B2 (en) * 2007-02-26 2010-06-22 Dell Products, Lp System and method of managing power consumption of communication interfaces and attached devices
JP2008305195A (ja) * 2007-06-07 2008-12-18 Toshiba Corp 電子機器および電源供給方法
JP5217946B2 (ja) * 2008-11-19 2013-06-19 株式会社リコー 半導体回路及び信号伝送システム
US8607075B2 (en) * 2008-12-31 2013-12-10 Intel Corporation Idle duration reporting for power management
US8362645B2 (en) * 2010-03-29 2013-01-29 Intel Corporation Method to reduce system idle power through system VR output adjustments during S0ix states
US20110249022A1 (en) * 2010-04-08 2011-10-13 Rajesh Poornachandran Techniques for managing power use
US8782456B2 (en) * 2010-06-01 2014-07-15 Intel Corporation Dynamic and idle power reduction sequence using recombinant clock and power gating
US20110320835A1 (en) * 2010-06-29 2011-12-29 Browning David W System and method for dynamically managing power in an electronic device
US8407504B2 (en) 2010-06-30 2013-03-26 Intel Corporation Systems and methods for implementing reduced power states
EP2726956A1 (fr) * 2011-07-01 2014-05-07 Qualcomm Incorporated Système et procédé pour une réduction de consommation au repos dans un système de communication série
US9563256B2 (en) * 2013-01-04 2017-02-07 Intel Corporation Processor hiding its power-up latency with activation of a root port and quickly sending a downstream cycle

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TW200603001A (en) * 2004-01-20 2006-01-16 Standard Microsyst Smc Peripheral device feature allowing processors to enter a low power state
TW200608182A (en) * 2004-08-26 2006-03-01 Via Tech Inc Power management state control method
US20060149977A1 (en) * 2004-12-31 2006-07-06 Barnes Cooper Power managing point-to-point AC coupled peripheral device
TW200641623A (en) * 2005-05-23 2006-12-01 Via Tech Inc PCI express transitioning link power state system and method thereof
TW200641620A (en) * 2005-05-23 2006-12-01 Via Tech Inc PCI express transitioning link power state system and method thereof
US20080288798A1 (en) * 2007-05-14 2008-11-20 Barnes Cooper Power management of low power link states
TW201015289A (en) * 2008-06-26 2010-04-16 Intel Corp Coordinated link power management

Also Published As

Publication number Publication date
TW201518922A (zh) 2015-05-16
US9501125B2 (en) 2016-11-22
EP2588936A4 (fr) 2015-10-07
WO2012012144A2 (fr) 2012-01-26
WO2012012144A3 (fr) 2012-10-11
TW201222229A (en) 2012-06-01
US20120005506A1 (en) 2012-01-05
US20130283075A1 (en) 2013-10-24
EP2588936B1 (fr) 2019-04-24
CN103097985A (zh) 2013-05-08
JP2013538385A (ja) 2013-10-10
EP3534237B1 (fr) 2022-12-14
EP3534237A1 (fr) 2019-09-04
CN103097985B (zh) 2016-10-19
EP2588936A2 (fr) 2013-05-08
CN106095045B (zh) 2020-01-10
JP5746337B2 (ja) 2015-07-08
CN106095045A (zh) 2016-11-09
TWI518495B (zh) 2016-01-21
KR20130081666A (ko) 2013-07-17
KR101488697B1 (ko) 2015-02-02
US8407504B2 (en) 2013-03-26

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