TWI497682B - Integrated circuit having circuit damage protection mechanism and method thereof - Google Patents
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Description
本發明係關於一種具有電路損壞保護機制之積體電路及其方法。The present invention relates to an integrated circuit having a circuit damage protection mechanism and a method thereof.
直流對直流電壓轉換器,例如低壓降線性穩壓器(Low Dropout Linear Regulator,LDO)或是切換式穩壓器(Switching Regulator),係用以轉換一輸入電壓至一穩定的輸出電壓,以提供負載電流。一般而言,習知的直流對直流電壓轉換器包含一保護電路,例如一過大電流保護電路,以於不正常運作情況下保護包含該習知的直流對直流電壓轉換器之一電路系統。習知的過大電流保護電路通常包含一過大電流感測電路及一過大電流控制電路。當該過大電流感測電路感測到大於一臨界電流之一負載電流時,該過大電流控制電路會關閉連接於該電壓轉換器的輸入端和輸出端之間的一功率電晶體,以保護該電路系統。A DC-to-DC voltage converter, such as a Low Dropout Linear Regulator (LDO) or a Switching Regulator, is used to convert an input voltage to a stable output voltage to provide Load current. In general, conventional DC-to-DC voltage converters include a protection circuit, such as an overcurrent protection circuit, to protect one of the conventional DC-to-DC voltage converter circuits under abnormal operation. Conventional overcurrent protection circuits typically include an overcurrent sensing circuit and an overcurrent control circuit. When the excessive current sensing circuit senses one of the load currents greater than a threshold current, the excessive current control circuit turns off a power transistor connected between the input end and the output end of the voltage converter to protect the electrical system.
然而,由於該功率電晶體寄生的本體二極體(body diode)之逆向恢復(reverse recovery)特性,在逆向恢復期間該功率電晶體上會出現電壓突波(voltage spike)現象。此外,一些其他因素,例如電流跳動(current bouncing)、電荷注入效應(charge injection)或雜訊干擾,也可能產生電壓突波現象。此等電壓突波現象可能使過大電流保護電路誤動作,而不正確的關閉該功率電晶體。However, due to the reverse recovery characteristics of the bulk diode of the power transistor parasitic, a voltage spike occurs on the power transistor during reverse recovery. In addition, some other factors, such as current bouncing, charge injection, or noise interference, may also cause voltage surges. These voltage surges may cause the excessive current protection circuit to malfunction and improperly turn off the power transistor.
本發明的目的係提供一種有電路損壞保護機制之積體電路。根據本發明一實施例,該積體電路包含一比較器、一第一電阻及一高通濾波電路。該第一電阻之一端耦接於一參考電位,另一端與該比較器之一第一輸入端耦接於一第一節點。該高通濾波電路之一端耦接於該第一節點,另一端與該比較器之一第二輸入端及一電壓信號端耦接於一第二節點。其中,當過大電流事件發生於該電壓信號端時,該比較器經配置以輸出一過大電流保護信號。另,當突波電流事件發生於該電壓信號端時,該比較器不會輸出該過大電流保護信號。It is an object of the present invention to provide an integrated circuit having a circuit damage protection mechanism. According to an embodiment of the invention, the integrated circuit includes a comparator, a first resistor and a high pass filter circuit. One end of the first resistor is coupled to a reference potential, and the other end is coupled to a first input of the comparator to a first node. One end of the high-pass filter circuit is coupled to the first node, and the other end is coupled to a second input end and a voltage signal end of the comparator. Wherein, when an excessive current event occurs at the voltage signal terminal, the comparator is configured to output an excessive current protection signal. In addition, when a surge current event occurs at the voltage signal terminal, the comparator does not output the excessive current protection signal.
本發明的另一目的係提供一種電路損壞保護機制之方法,其步驟包含(a)輸入一第一電壓及一第二電壓;(b)判斷該第二電壓是否代表一突波電壓;(c)判斷該第二電壓之電壓值是否高於該第一電壓之電壓值。其中該第一電壓具有一固定電壓值,而該第二電壓具有一變動電壓值。Another object of the present invention is to provide a method for protecting a circuit damage, comprising the steps of: (a) inputting a first voltage and a second voltage; and (b) determining whether the second voltage represents a surge voltage; And determining whether the voltage value of the second voltage is higher than a voltage value of the first voltage. The first voltage has a fixed voltage value and the second voltage has a varying voltage value.
上文已經概略地敍述本揭露之技術特徵,俾使下文之本揭露詳細描述得以獲得較佳瞭解。構成本揭露之申請專利範圍標的之其它技術特徵將描述於下文。本揭露所屬技術領域中具有通常知識者應可瞭解,下文揭示之概念與特定實施例可作為基礎而相當輕易地予以修改或設計其它結構或製程而實現與本揭露相同之目的。本揭露所屬技術領域中具有通常知識者亦應可瞭解,這類等效的建構並無法脫離後附之申 請專利範圍所提出之本揭露的精神和範圍。The technical features of the present disclosure have been briefly described above, so that a detailed description of the present disclosure will be better understood. Other technical features that form the subject matter of the claims of the present disclosure will be described below. It is to be understood by those of ordinary skill in the art that the present invention disclosed herein may be It should be understood by those having ordinary knowledge in the technical field of the disclosure that such equivalent construction cannot be separated from the attached application. Please understand the spirit and scope of this disclosure as set forth in the patent.
圖1係本發明一實施例之具有電路損壞保護機制之積體電路10的示意圖。在此一實施例中,該具有電路損壞保護機制之積體電路10包含一比較器11、一第一電阻12及一高通濾波電路15。該第一電阻12之一端耦接於一參考電位VREF,另一端與該比較器11之一第一輸入端耦接於一第一節點A。該高通濾波電路15之一端耦接於該第一節點A,另一端與該比較器11之一第二輸入端及一電壓信號端13耦接於一第二節點B。1 is a schematic diagram of an integrated circuit 10 having a circuit damage protection mechanism according to an embodiment of the present invention. In this embodiment, the integrated circuit 10 having the circuit damage protection mechanism includes a comparator 11, a first resistor 12 and a high-pass filter circuit 15. One end of the first resistor 12 is coupled to a reference potential VREF, and the other end is coupled to a first input end of the comparator 11 to a first node A. One end of the high-pass filter circuit 15 is coupled to the first node A, and the other end is coupled to a second input end of the comparator 11 and a voltage signal end 13 to a second node B.
參照圖1,在本實施例中,該高通濾波電路15係由一電容153所組成。該電容153之一端耦接於該第一節點A,另一端耦接於該第二節點B。當一過大電流事件所產生的電壓信號發生於該電壓信號端13時,該比較器11經配置以輸出一過大電流保護信號OCP。當一突波電流事件所產生的電壓信號發生於該電壓信號端13時,該比較器11則不會輸出該過大電流保護信號OCP。Referring to FIG. 1, in the embodiment, the high-pass filter circuit 15 is composed of a capacitor 153. One end of the capacitor 153 is coupled to the first node A, and the other end is coupled to the second node B. When a voltage signal generated by a large current event occurs at the voltage signal terminal 13, the comparator 11 is configured to output an excessive current protection signal OCP. When a voltage signal generated by a surge current event occurs at the voltage signal terminal 13, the comparator 11 does not output the excessive current protection signal OCP.
圖2係本發明另一實施例之具有電路損壞保護機制之積體電路20的示意圖。相較於圖1,該高通濾波電路15'係由一第二電阻151和一電容155所組成。該第二電阻151之一端經配置以與該電容155串聯,而另一端耦接於該放大器11之該第一節點A。該電容155之一端耦接於該第二電阻151,而另一端耦接於該第二節點B。圖1和圖2之元件僅例示 該高通濾波電路的兩種可能組成方式,然而,本發明不應以此為限。2 is a schematic diagram of an integrated circuit 20 having a circuit damage protection mechanism according to another embodiment of the present invention. Compared with FIG. 1, the high-pass filter circuit 15' is composed of a second resistor 151 and a capacitor 155. One end of the second resistor 151 is configured to be in series with the capacitor 155, and the other end is coupled to the first node A of the amplifier 11. One end of the capacitor 155 is coupled to the second resistor 151, and the other end is coupled to the second node B. The components of Figures 1 and 2 are only exemplified There are two possible ways of configuring the high-pass filter circuit. However, the present invention should not be limited thereto.
圖3係本發明一實施例之具有電路損壞保護機制之積體電路在遭遇過大電流事件發生時之波形示意圖。圖4係本發明一實施例之具有電路損壞保護機制之積體電路觸發過大電流保護信號之波形示意圖。FIG. 3 is a schematic diagram showing the waveform of an integrated circuit with a circuit damage protection mechanism in the event of an excessive current event occurring according to an embodiment of the present invention. FIG. 4 is a schematic diagram showing the waveform of an over-current protection signal triggered by an integrated circuit having a circuit damage protection mechanism according to an embodiment of the present invention.
參照圖1至圖4,來自一電壓轉換器(圖中未示)之一負載電流會經由一電流/電壓轉換器(圖中未示)以轉換成一電壓信號VB 。該電壓信號VB 再經由該電壓信號端13傳輸至該比較器11的第二輸入端。當負載電流增加時,該電壓信號VB 亦隨之增加。在時點t時,該電壓信號VB 超過在第一節點A之一臨界電壓信號VA (其值=VREF),使得該比較器11發出一過大電流保護信號OCP,如圖4所示。該信號OCP後續會觸發過大電流保護機制以保護該電壓轉換器不致損壞。Referring to Figures 1 through 4, a load current from a voltage converter (not shown) is converted to a voltage signal V B via a current/voltage converter (not shown). The voltage signal V B is then transmitted via the voltage signal terminal 13 to the second input of the comparator 11. As the load current increases, the voltage signal V B also increases. At time t, the voltage signal V B exceeds a threshold voltage signal V A (its value = VREF) at the first node A, such that the comparator 11 emits an excessive current protection signal OCP, as shown in FIG. The signal OCP subsequently triggers an excessive current protection mechanism to protect the voltage converter from damage.
圖5係為本發明一實施例之具有電路損壞保護機制之積體電路在遭遇突波電流事件發生時之波型示意圖。在突波電流事件發生前,臨界電壓信號VA' 之電壓值等於VREF。在突波電流事件發生時,例如前述由於本體二極體之逆向恢復特性所產生的電壓突波,該突波電流信號會經由該電流/電壓轉換器轉換成一突波電壓信號VS 。該突波電壓信號VS 再經由該電壓信號端13傳輸至該比較器11的第二輸入端。此時,由於該高通濾波電路15/15'的高頻特性,該突波電壓信號VS 之交流成分會與該參考電位VREF疊加而增加臨界電壓信號VA' 的電壓值。在該比較器11的第一輸入端處的該臨界電壓信號VA' 此時會高於該比較器11的第二輸入端處的該突波電壓信號VS ,所以該比較器11不會發出該過大電流保護信號OCP。因此,該具有電路損壞保護機制之積體電路於逆向恢復期間,不會使該比較器11誤動作,而不正確的關閉該電壓轉換器之功率電晶體。FIG. 5 is a schematic diagram of a waveform of an integrated circuit with a circuit damage protection mechanism in the event of a surge current event occurring according to an embodiment of the present invention. The voltage value of the threshold voltage signal V A ' is equal to VREF before the surge current event occurs. When a surge current event occurs, such as the aforementioned voltage surge due to the reverse recovery characteristic of the body diode, the surge current signal is converted into a surge voltage signal V S via the current/voltage converter. The surge voltage signal V S is then transmitted via the voltage signal terminal 13 to the second input of the comparator 11. At this time, due to the high frequency characteristic of the high-pass filter circuit 15/15', the alternating component of the surge voltage signal V S is superimposed with the reference potential VREF to increase the voltage value of the threshold voltage signal V A ' . The threshold voltage signal V A ' at the first input of the comparator 11 is now higher than the surge voltage signal V S at the second input of the comparator 11, so the comparator 11 does not The excessive current protection signal OCP is issued. Therefore, the integrated circuit with the circuit damage protection mechanism does not cause the comparator 11 to malfunction during the reverse recovery, and does not properly turn off the power transistor of the voltage converter.
為了說明本發明一實施例之具有電路損壞保護機制之積體電路中第一電阻12、第二電阻151及該電容153/155的選擇,特以下例說明,但本發明不應以此為限。In order to illustrate the selection of the first resistor 12, the second resistor 151, and the capacitor 153/155 in the integrated circuit having the circuit damage protection mechanism according to an embodiment of the present invention, the following description is given, but the present invention should not be limited thereto. .
如欲避免圖5所示的具有100 nS(奈秒)脈波寬度的突波電流事件之影響,該電容153/155之容值C及該比較器11之輸入端電容之容值Cin 可符合下列條件:C>>10 Cin To avoid the influence of the surge current event with a pulse width of 100 nS (nanoseconds) as shown in FIG. 5, the capacitance C of the capacitor 153/155 and the capacitance C in the input capacitance of the comparator 11 can be Meet the following conditions: C>>10 C in
此外,該第一電阻12之阻值R1及第二電阻151之阻值R2之選擇可符合下列條件:
其中,K1較佳可選擇為100以上,K2為介於1至20之間之常數。在圖5之實施例中K2選擇為5。Among them, K1 is preferably selected to be 100 or more, and K2 is a constant between 1 and 20. In the embodiment of Figure 5, K2 is chosen to be 5.
綜上所述,該具有電路損壞保護機制之積體電路之電路損壞保護方法如圖6所示。In summary, the circuit damage protection method of the integrated circuit with the circuit damage protection mechanism is as shown in FIG. 6.
圖6係為本發明一實施例之電路損壞保護方法的流程圖。參照圖6,於步驟S501,該具有電路損壞保護機制之積體電路之一比較器接收一第一電壓及一第二電壓,其中該第一電壓具有一預設的電壓值VREF,而該第二電壓具有一變動的電壓值。6 is a flow chart of a circuit damage protection method according to an embodiment of the present invention. Referring to FIG. 6, in step S501, the comparator of the integrated circuit having the circuit damage protection mechanism receives a first voltage and a second voltage, wherein the first voltage has a predetermined voltage value VREF, and the first The two voltages have a varying voltage value.
於步驟S503,判斷該第二電壓是否代表一突波電壓。如果該第二電壓代表一突波電壓,則進行步驟S505。於步驟S505,提昇該第一電壓之電壓值使其高於該第二電壓,以及進行步驟S507以不輸出過大電流保護信號。其中,該第一電壓之電壓值之提昇可藉由一電容以疊加該突波電壓之交流值和該第一電壓之預設電壓值。In step S503, it is determined whether the second voltage represents a surge voltage. If the second voltage represents a surge voltage, then step S505 is performed. In step S505, the voltage value of the first voltage is raised to be higher than the second voltage, and step S507 is performed to not output an excessive current protection signal. The voltage value of the first voltage is increased by a capacitor to superimpose the alternating current value of the surge voltage and the preset voltage value of the first voltage.
反之,如該第一電壓不代表一突波電壓,則進行步驟S502。於步驟S502,判斷該第二電壓之電壓值是否高於該第一電壓之電壓值。如該第二電壓之電壓值高於該第一電壓之電壓值時,則進行步驟S504,輸出一過大電流保護信號。反之,則進行步驟S507以不輸出過大電流保護信號。On the other hand, if the first voltage does not represent a surge voltage, step S502 is performed. In step S502, it is determined whether the voltage value of the second voltage is higher than the voltage value of the first voltage. If the voltage value of the second voltage is higher than the voltage value of the first voltage, step S504 is performed to output an excessive current protection signal. Otherwise, step S507 is performed to not output an excessive current protection signal.
本發明之技術內容及技術特點已揭示如上,然而熟悉本項技術之人士仍可能基於本發明之教示及揭示而作種種不背離本發明精神之替換及修飾。因此,本發明之保護範圍應不限於實施例所揭示者,而應包括各種不背離本發明之替換及修飾,並為以下之申請專利範圍所涵蓋。The technical and technical features of the present invention have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should be construed as being limited by the scope of the appended claims
10‧‧‧具有電路損壞保護機制之積體電路10‧‧‧Integral circuit with circuit damage protection mechanism
20‧‧‧具有電路損壞保護機制之積體電路20‧‧‧Integral circuit with circuit damage protection mechanism
11‧‧‧比較器11‧‧‧ Comparator
12‧‧‧第一電阻12‧‧‧First resistance
13‧‧‧電壓信號端13‧‧‧voltage signal terminal
15,15’‧‧‧高通濾波電路15,15'‧‧‧High-pass filter circuit
151‧‧‧第二電阻151‧‧‧second resistance
153‧‧‧電容153‧‧‧ Capacitance
155‧‧‧電容155‧‧‧ Capacitance
A‧‧‧第一節點A‧‧‧first node
B‧‧‧第二節點B‧‧‧second node
S501~S507‧‧‧步驟S501~S507‧‧‧Steps
圖1係本發明一實施例之具有電路損壞保護機制之積體電路的示意圖;圖2係本發明另一實施例之具有電路損壞保護機制之積體電路的示意圖;圖3係本發明一實施例之具有電路損壞保護機制之積體電路在遭遇過大電流事件發生時之波形示意圖;圖4係本發明一實施例之具有電路損壞保護機制之積體電路觸發過大電流保護信號之波形示意圖;圖5係為本發明一實施例之具有電路損壞保護機制之積體電路在遭遇突波電流事件發生時之波型示意圖;及圖6係為本發明一實施例之電路損壞保護方法的流程圖。1 is a schematic diagram of an integrated circuit having a circuit damage protection mechanism according to an embodiment of the present invention; FIG. 2 is a schematic diagram of an integrated circuit having a circuit damage protection mechanism according to another embodiment of the present invention; FIG. 3 is an embodiment of the present invention; FIG. 4 is a schematic diagram of a waveform of an integrated circuit with a circuit damage protection mechanism triggering an excessive current protection signal according to an embodiment of the present invention; FIG. 5 is a schematic diagram of a waveform of an integrated circuit having a circuit damage protection mechanism according to an embodiment of the present invention when a surge current event occurs; and FIG. 6 is a flowchart of a circuit damage protection method according to an embodiment of the present invention.
10‧‧‧具有電路損壞保護機制之積體電路10‧‧‧Integral circuit with circuit damage protection mechanism
11‧‧‧比較器11‧‧‧ Comparator
12‧‧‧第一電阻12‧‧‧First resistance
13‧‧‧電流信號端13‧‧‧current signal terminal
15‧‧‧高通濾波電路15‧‧‧High-pass filter circuit
153‧‧‧電容153‧‧‧ Capacitance
A‧‧‧第一節點A‧‧‧first node
B‧‧‧第二節點B‧‧‧second node
Claims (10)
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| TW101121050A TWI497682B (en) | 2012-06-13 | 2012-06-13 | Integrated circuit having circuit damage protection mechanism and method thereof |
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| TW101121050A TWI497682B (en) | 2012-06-13 | 2012-06-13 | Integrated circuit having circuit damage protection mechanism and method thereof |
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| TW201351603A TW201351603A (en) | 2013-12-16 |
| TWI497682B true TWI497682B (en) | 2015-08-21 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101121050A TWI497682B (en) | 2012-06-13 | 2012-06-13 | Integrated circuit having circuit damage protection mechanism and method thereof |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI497682B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002084173A (en) * | 2000-09-11 | 2002-03-22 | Mitsubishi Electric Corp | Power semiconductor device and overcurrent protection circuit |
| US20060114633A1 (en) * | 2004-05-25 | 2006-06-01 | Yazaki Corporation | Overcurrent detecting apparatus |
| TW201223057A (en) * | 2010-09-10 | 2012-06-01 | Intersil Inc | Detecting and selectively ignoring power supply transients |
-
2012
- 2012-06-13 TW TW101121050A patent/TWI497682B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002084173A (en) * | 2000-09-11 | 2002-03-22 | Mitsubishi Electric Corp | Power semiconductor device and overcurrent protection circuit |
| US20060114633A1 (en) * | 2004-05-25 | 2006-06-01 | Yazaki Corporation | Overcurrent detecting apparatus |
| TW201223057A (en) * | 2010-09-10 | 2012-06-01 | Intersil Inc | Detecting and selectively ignoring power supply transients |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201351603A (en) | 2013-12-16 |
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