TWI527112B - Method of manufacturing package substrate - Google Patents

Description

Method of manufacturing package substrate

The invention relates to a method for manufacturing a package substrate, in particular to a method for manufacturing a package substrate capable of improving line quality.

As electronic products tend to be thin, light, and functionally increasing, the wiring density of semiconductor wafers is becoming higher and higher, and the nanometer size is used as a unit, so that the pitch between the pads of the package substrate is smaller. Therefore, the wafer stereoscopic stacking technology of the through-silicon via (TSV) is developed, whereby the package substrate can be combined with the semiconductor wafer having the high wiring density electrode pad to achieve the purpose of integrating the semiconductor wafer with high wiring density. It does not change the original supply chain and infrastructure of the IC industry.

1A and 1C are schematic cross-sectional views showing a method of manufacturing a conventional package substrate 1.

As shown in FIG. 1A, a patterned resist layer 11 is formed on a board body 10, and the material of the board body 10 is formed as a dielectric material, and the resist layer 11 is formed by covering the photoresist film or Sputtered copper layer.

As shown in FIG. 1B, a truncation 13 is formed on the exposed portion of the plate body 10 by excimer laser, and the resist layer is removed.

As shown in FIG. 1C, a metal layer 15 is formed in the recess 13 as an embedded wiring.

With the trend of light, thin, short and small electronic products, the embedded circuit of the package substrate 1 must meet the requirements of fine lines and fine pitch, that is, the line width and line spacing are less than 10um, and the aspect ratio (Aspect ratio) It needs to be greater than 1, and under this requirement, the groove 13 is formed by excimer laser, and the taper angle is too large, so that the side walls 13a, 13b of the groove 13 directly meet at the bottom. In a line, as shown in Fig. 1B, the cross section of the groove 13 is V-shaped.

However, when the cross section of the groove 13 is V-shaped, the aspect ratio of the line width and the line pitch of less than 10 um is at most 1.2 (often less than 1.2 or even less than 1), for example, the line width and the line spacing are The depth of the 5um line is at most 6um, and the line width and the line spacing of 3um are as deep as 3.6um, which causes the thickness of the metal layer 15 to be insufficient, resulting in the loss of the line yield and the process capability index. , Cpk) is extremely low.

Furthermore, the processing of thin lines by a semiconductor diode array (LDA) method is costly.

Therefore, how to overcome the various problems in the above-mentioned prior art has become a problem that is currently being solved.

In view of the above-mentioned conventional techniques, the present invention provides a method of manufacturing a package substrate, comprising: providing a plate body; and etching the plate body to form a first groove, and the first groove has a buffer portion.

In the above method, a resist layer is formed on the board, and an open area is formed on the resist layer to expose a part of the surface of the board to the open area, and the first area is formed in the open area. The groove, after which the resist layer is removed.

In the above manufacturing method, the process for forming the first groove includes: forming an opening in a laser manner on the plate body, and the opening has no buffer portion, and then removing a part of the plate body in the opening hole. Material to form the first groove.

In the above method, the etching method is plasma etching, dry etching or wet etching.

In the above method, the board body has a circuit layer, and a blind hole is formed in the board body to expose a part of the surface of the circuit layer to the blind hole. The method further includes forming a second recess on the board, and the second recess communicates with the blind hole, wherein the second recess is formed by laser or etching, for example, plasma etching and drying Etching or wet etching. And forming a metal layer in the second recess and the blind hole to connect the metal layer to the circuit layer.

In the above method, the buffer portion is a bent surface at which the side wall of the first groove is joined at the bottom.

In the above method, the metal layer formed in the first recess is included.

As can be seen from the above, in the method for manufacturing a package substrate of the present invention, the first recess is formed by etching, so that the first recess has a buffer portion and does not have a V-shaped cross section, so that various techniques of the prior art can be overcome. Missing.

1,2. . . Package substrate

10,20. . . Plate body

11,21. . . Resistance layer

13. . . Groove

13a, 13b, 23a, 23a’. . . Side wall

15,25. . . Metal layer

200. . . Blind hole

21a. . . Masking layer

twenty two. . . Circuit layer

210,211. . . Open area

twenty three. . . First groove

twenty three'. . . Opening

230. . . Buffer section

twenty four. . . Second groove

25a. . . Conductive layer

26. . . line

1A to 1C are schematic cross-sectional views showing a method of manufacturing a conventional package substrate;

2A to 2G are schematic cross-sectional views showing a method of manufacturing the package substrate of the present invention; wherein the 2C' is another embodiment of the 2Cth diagram.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "first", "second", "bottom" and "one" are used in the description for convenience of description and are not intended to limit the invention. Changes in the scope of implementation, changes or adjustments in their relative relationship, are considered to be within the scope of the present invention.

2A to 2G are schematic cross-sectional views showing a method of manufacturing the package substrate 2 of the present invention.

As shown in FIG. 2A, a resist layer 21 is formed on a plate body 20. In this embodiment, the board body 20 has at least one circuit layer 22 therein, and the material forming the board body 20 is a dielectric material.

Furthermore, the resist layer 21 is formed by covering the photoresist film or the sputtered copper layer.

In addition, the types of the plates and the internal structures thereof are various and are not limited to the drawings.

As shown in FIG. 2B, at least one blind hole 200 is formed in the board body 20 to expose a part of the surface of the circuit layer 22 to the blind hole 200.

In the embodiment, the blind hole 200 is formed to penetrate the resist layer 21 and the plate body 20 by laser.

As shown in FIG. 2B-1, a shielding layer 21a is formed on the resist layer 21 to shield part of the resist layer 21. In the embodiment, the shielding layer 21a is a photomask.

As shown in FIG. 2B-2, a patterning process is performed, and a portion of the resist layer 21 exposed to the shielding layer 21a is removed by a semiconductor diode array (LDA) to form on the resist layer 21. The plurality of open areas 210, 211 are formed such that a portion of the surface of the board 20 and the blind hole 200 are exposed to the open areas 210, 211.

The masking layer 21a is removed as shown in FIG. 2C. In other embodiments, the patterning process can also be performed by exposure development.

As shown in FIG. 2D, the plate body 20 in the open areas 210, 211 is etched to form a first groove 23 and a second groove 24, and the first groove 23 has a buffer portion 230, and the second groove 24 The blind hole 200 is connected.

In this embodiment, the etching method is plasma etching, anisotropic dry etching or isotropic wet etching.

Furthermore, the width of the first recess 23 is tapered toward the bottom, so that the buffer portion 230 refers to the curved surface of the side wall 23a of the first recess 23 that is engaged at the bottom, that is, the first The side walls 23a of the recesses 23 do not directly meet in a line at the bottom.

In another embodiment, as shown in FIG. 2C', the opening 23' and the second recess 24 may be formed by excimer laser on the plate body 20 in the open area 210, 211, and the opening 23' is an unbuffered portion (ie, the side wall 23a' of the opening 23' is directly connected to a line at the bottom, and its cross section is V-shaped), and as shown in FIG. 2D, the opening 23' is etched and removed. A part of the plate body 20 is made of material to form the first groove 23.

Furthermore, if the second recess 24 is formed by laser, the resist layer 21 does not need to form the open region 211 at the point corresponding to the blind hole 200.

Moreover, if the structure of the resist layer 21 is a 2 um wet film (such as acryl), it can stop the LDA and the plasma for 1 minute to make the first groove 23 in 1 minute, thereby enabling Reduce process time.

As shown in FIG. 2E, a metal layer 25 is formed on the resist layer 21, the first recess 23, the second recess 24, and the blind via 200, and the second recess 24 and the metal in the blind via 200 Layer 25 is connected to the circuit layer 22.

In the present embodiment, the metal layer 25 is formed by plating a copper material through the conductive layer 25a.

As shown in FIG. 2F, the metal layer 25 above the resist layer 21 and the underlying conductive layer 25a are removed to make the remaining metal layer 25 as the buried line 26.

In the present embodiment, the metal layer 25 above the resist layer 21 is removed by etching, brushing or buffing.

The resist layer 21 is removed as shown in FIG. 2G.

In this embodiment, the resist layer 21 and a portion of the metal layer 25 are removed by a leveling process or a stripping process, so that the surface of the metal layer 25 (ie, the line 26) is flush with the board 20 level.

Moreover, by using the resist layer 21 as a protective film, the surface of the plate body 20 can be prevented from being scratched, and the block-shaped residual copper on the plate body 20 can be effectively removed.

In the method of manufacturing the package substrate 2 of the present invention, the first recess 23 is formed by etching, so that the first recess 23 has the buffer portion 230, thereby avoiding forming a V-shaped groove as in the prior art, and thus the present invention A groove 23 has no problem that the taper angle is too large, that is, the depth of the first groove 23 can be increased. Therefore, when the line width and the line pitch of the line 26 are less than 10 um, the aspect ratio of the line 26 is greater than 2. Therefore, the problem of insufficient thickness of the metal layer can be avoided. Therefore, the method of the present invention can effectively improve the line yield and greatly increase the process capability index (Cpk).

Furthermore, the line 26 of the present invention is superior in quality to the package substrate of the conventional excimer laser fabrication circuit, so that the yield of the package substrate 2 is high, thereby reducing the cost.

In summary, the method for manufacturing the package substrate of the present invention is to form a groove by etching to replace the conventional excimer laser to form a groove, thereby increasing the aspect ratio of the groove (at least greater than 2). Therefore, the problem of insufficient thickness of the metal layer is avoided to achieve the purpose of improving the line yield and the high process capability index.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

20. . . Plate body

200. . . Blind hole

twenty one. . . Resistance layer

210,211. . . Open area

twenty two. . . Circuit layer

twenty three. . . First groove

23a. . . Side wall

230. . . Buffer section

twenty four. . . Second groove

Claims (10)

A method for manufacturing a package substrate, comprising: providing a plate body, forming an opening on the plate body by laser, and the cross section of the opening is V-shaped; and etching and removing a part of the plate in the opening The body material is formed to form a first groove, and the first groove has a buffer portion. The method of manufacturing a package substrate according to claim 1, wherein the board body has a circuit layer, and a blind hole is formed on the board body to expose a part of the surface of the circuit layer to the blind hole. The method for manufacturing a package substrate according to claim 2, further comprising forming a second groove on the plate body, and the second groove is connected to the blind hole. The method for manufacturing a package substrate according to claim 3, wherein the method of forming the second groove is a laser method or an etching method. The method of manufacturing a package substrate according to claim 4, wherein the etching method is plasma etching, dry etching or wet etching. The method for manufacturing a package substrate according to claim 3, further comprising forming a metal layer in the second recess and the blind hole to connect the metal layer to the circuit layer. The method for manufacturing a package substrate according to claim 1, further comprising forming a resist layer on the plate body, and forming an open area on the resist layer to expose a part of the surface of the plate body to the open area, The first recess is formed in the open area, and then the resist layer is removed. The method of fabricating a package substrate according to claim 1, wherein the etching method is plasma etching, dry etching or wet etching. The method for manufacturing a package substrate according to claim 1, wherein the buffer portion is a bent surface at which the sidewall of the first groove is joined at the bottom. The method for manufacturing a package substrate according to claim 1, further comprising forming a metal layer in the first recess.