TWI561373B - - Google Patents

Info

Publication number
TWI561373B
TWI561373B TW102139009A TW102139009A TWI561373B TW I561373 B TWI561373 B TW I561373B TW 102139009 A TW102139009 A TW 102139009A TW 102139009 A TW102139009 A TW 102139009A TW I561373 B TWI561373 B TW I561373B
Authority
TW
Taiwan
Prior art keywords
carrier
copper foil
extremely thin
copper
stress
Prior art date
Application number
TW102139009A
Other languages
English (en)
Chinese (zh)
Other versions
TW201434623A (zh
Inventor
Terumasa Moriyama
Kazuhiko Sakaguchi
Tomota Nagaura
Michiya Kohiki
Original Assignee
Jx Nippon Mining & Metals Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jx Nippon Mining & Metals Corp filed Critical Jx Nippon Mining & Metals Corp
Publication of TW201434623A publication Critical patent/TW201434623A/zh
Application granted granted Critical
Publication of TWI561373B publication Critical patent/TWI561373B/zh

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/06—Wires; Strips; Foils
    • C25D7/0614—Strips or foils
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/20—Layered products comprising a layer of metal comprising aluminium or copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00—Electroforming
    • C25D1/04—Wires; Strips; Foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60—Electroplating characterised by the structure or texture of the layers
    • C25D5/615—Microstructure of the layers, e.g. mixed structure
    • C25D5/617—Crystalline layers
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/627—Electroplating characterised by the visual appearance of the layers, e.g. colour, brightness or mat appearance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H05K3/025—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Laminated Bodies (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
TW102139009A 2012-10-26 2013-10-28 附載體銅箔、使用其之覆銅積層板、印刷配線板、印刷電路板及印刷配線板之製造方法 TW201434623A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012236843 2012-10-26
JP2013016114A JP5352748B1 (ja) 2012-10-26 2013-01-30 キャリア付銅箔、それを用いた銅張積層板、プリント配線板、プリント回路板、及び、プリント配線板の製造方法

Publications (2)

Publication Number Publication Date
TW201434623A TW201434623A (zh) 2014-09-16
TWI561373B true TWI561373B (th) 2016-12-11

Family

ID=49764992

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102139009A TW201434623A (zh) 2012-10-26 2013-10-28 附載體銅箔、使用其之覆銅積層板、印刷配線板、印刷電路板及印刷配線板之製造方法

Country Status (3)

Country Link
JP (1) JP5352748B1 (th)
TW (1) TW201434623A (th)
WO (1) WO2014065430A1 (th)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6591766B2 (ja) * 2014-04-24 2019-10-16 Ｊｘ金属株式会社 キャリア付銅箔、プリント配線板、積層体、電子機器及びプリント配線板の製造方法
JP5859078B1 (ja) * 2014-08-29 2016-02-10 Jx日鉱日石金属株式会社 キャリア付銅箔の製造方法、銅張積層板の製造方法、プリント配線板の製造方法、及び、電子機器の製造方法
JP6782561B2 (ja) 2015-07-16 2020-11-11 Ｊｘ金属株式会社 キャリア付銅箔、積層体、積層体の製造方法、プリント配線板の製造方法及び電子機器の製造方法
JP6006445B1 (ja) 2015-07-27 2016-10-12 Ｊｘ金属株式会社 キャリア付銅箔、積層体、プリント配線板の製造方法及び電子機器の製造方法
JP6058182B1 (ja) 2015-07-27 2017-01-11 Ｊｘ金属株式会社 キャリア付銅箔、積層体、プリント配線板の製造方法及び電子機器の製造方法
JP6339636B2 (ja) 2015-08-06 2018-06-06 Ｊｘ金属株式会社 キャリア付銅箔、積層体、プリント配線板の製造方法及び電子機器の製造方法
JP6200042B2 (ja) 2015-08-06 2017-09-20 Ｊｘ金属株式会社 キャリア付銅箔、積層体、プリント配線板の製造方法及び電子機器の製造方法
JP6190500B2 (ja) 2015-08-06 2017-08-30 Ｊｘ金属株式会社 キャリア付銅箔、積層体、プリント配線板の製造方法及び電子機器の製造方法
KR102326505B1 (ko) * 2015-08-19 2021-11-16 엘지이노텍 주식회사 인쇄회로기판 및 그의 제조 방법
JP6190980B2 (ja) * 2015-09-25 2017-08-30 古河電気工業株式会社 電解銅箔、その電解銅箔を用いた各種製品
TWI884768B (zh) * 2024-04-16 2025-05-21 南亞塑膠工業股份有限公司 銅箔複合結構及其製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030171477A1 (en) * 2000-03-31 2003-09-11 Hideo Baba Process for producing novel silicone polymer, silicone polymer produced by the same process, thermosetting resin composition, resin film, metal foil with insulating material, insulating film with metal foil on each side, metal-clad laminate, multilayered metal-clad laminate, and multilayered printed circuit board
US20040134682A1 (en) * 1998-09-14 2004-07-15 Ibiden Co., Ltd. Printed wiring board and its manufacturing method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04372145A (ja) * 1991-06-21 1992-12-25 Hitachi Ltd テープキャリアパッケージとその変形抑制方法
JP4329953B2 (ja) * 1999-05-19 2009-09-09 古河電気工業株式会社 高密度超微細配線板用銅箔
JP2006100533A (ja) * 2004-09-29 2006-04-13 Toshiba Corp 半導体パッケージ用基板およびそれを用いた半導体装置
JP5238182B2 (ja) * 2007-04-19 2013-07-17 株式会社フジクラ 積層配線基板の製造方法
WO2010047228A1 (ja) * 2008-10-21 2010-04-29 日本電気株式会社 配線基板およびその製造方法
JP2011253879A (ja) * 2010-06-01 2011-12-15 Nec Corp 半導体素子及び半導体内蔵基板
JP2012209432A (ja) * 2011-03-30 2012-10-25 Teramikros Inc 半導体装置内蔵基板モジュール及びその実装構造、並びに、半導体装置内蔵基板モジュールの製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040134682A1 (en) * 1998-09-14 2004-07-15 Ibiden Co., Ltd. Printed wiring board and its manufacturing method
US20030171477A1 (en) * 2000-03-31 2003-09-11 Hideo Baba Process for producing novel silicone polymer, silicone polymer produced by the same process, thermosetting resin composition, resin film, metal foil with insulating material, insulating film with metal foil on each side, metal-clad laminate, multilayered metal-clad laminate, and multilayered printed circuit board

Also Published As

Publication number Publication date
JP2014100903A (ja) 2014-06-05
JP5352748B1 (ja) 2013-11-27
TW201434623A (zh) 2014-09-16
WO2014065430A1 (ja) 2014-05-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees