TWI879044B - Signal transfer device and signal path adaptive switch method - Google Patents

Abstract

The present disclosure provides a signal transfer device. The signal transfer device is configured to be coupled between source device and display device, and includes memory circuit, switch circuit and control circuit. The memory circuit stores display characteristic data. The switch circuit turns on one of first signal path or second signal path, the first signal path is provided between the source device and the memory circuit, and the second signal path is provided between the source device and the display device. The control circuit is coupled to the switch circuit and the memory circuit, and the control circuit determines that the memory circuit transmits the display characteristic data to the source device, so as to control the switch circuit switching from turning on the first signal path to turning on the second signal path. The present disclosure also provides a signal path adaptive switch method.

Description

Signal switching device and signal path adaptive switching method

The present disclosure relates to a device and a method, and more particularly to a signal switching device and a signal path adaptive switching method.

In the related technology, the keyboard screen mouse switcher will wait for a preset time (e.g., 15 seconds) for the video source end (e.g., computer host) to read the extended display identification data stored in its internal memory, and allow the video source end to communicate with the display end (e.g., monitor) after the waiting is over. The above preset time can ensure that most video sources can read the extended display identification data to smoothly generate the display screen on the display end. However, the above preset time is too long, resulting in a poor user experience.

One aspect of the present disclosure is a signal transfer device. The signal transfer device is used to couple between a source device and a display device, and includes a memory circuit, a switch circuit, and a control circuit. The memory circuit stores display characteristic data. The switch circuit conducts one of a first signal path and a second signal path. The first signal path is included between the source device and the memory circuit, and the second signal path is included between the source device and the display device. The control circuit is coupled to the switch circuit and the memory circuit, and the control circuit determines that the memory circuit transmits the display characteristic data to the source device, thereby controlling the switch circuit to switch from conducting the first signal path to conducting the second signal path.

Another aspect of the present disclosure is a signal path adaptive switching method. The signal path adaptive switching method includes: monitoring a source device to receive display characteristic data from a memory circuit; and switching from a first signal path between the source device and the memory circuit to a second signal path between the source device and a display device.

In summary, by monitoring the source device to receive the display characteristic data from the memory circuit, the signal switching device and the signal path adaptive switching method of the present disclosure can quickly switch the signal path after confirming that the source device has completed reading the display characteristic data, so that the source device and the display device can communicate with each other and generate a display screen. Therefore, the signal switching device and the signal path adaptive switching method of the present disclosure can automatically adapt to a variety of source devices with different data reading times, which will effectively increase the user's willingness to purchase and/or use.

The following is a detailed description of the embodiments with the accompanying drawings, but the specific embodiments described are only used to explain the present case and are not used to limit the present case. The description of the structural operation is not used to limit the order of its execution. Any structure reassembled by the components to produce a device with equal functions is within the scope of the present disclosure.

The terms used throughout the specification and application generally have the ordinary meanings of each term used in the art, in the context of this disclosure and in the specific context, unless otherwise specified.

As used herein, “coupled” or “connected” may refer to two or more elements being in direct physical or electrical contact with each other, or being in indirect physical or electrical contact with each other, or may refer to two or more elements operating or moving with each other.

Please refer to FIG. 1, which is a block diagram of a signal transfer device 100 of some embodiments. In some embodiments, the signal transfer device 100 is electrically coupled between the source device 10 and the display device 20. Accordingly, the signal transfer device 100 can filter the display characteristic data (e.g., the terminal display characteristic data Dc20 in FIG. 1) provided by the display device 20 according to the display specifications supported by the source device 10 and provide them to the source device 10.

It is worth noting that in some embodiments, the signal switching device 100 can monitor the operation of the source device 10 to read the filtered display characteristic data (for example, the display characteristic data Dcf in FIG. 1 ) and quickly switch the internal signal path so that the source device 10 and the display device 20 can cooperate with each other and operate normally.

In some embodiments, the signal switching device 100 can be implemented by a switch (e.g., a keyboard video mouse (KVM) switch), the source device 10 can be implemented by a computing device such as a smart phone, a desktop computer, a laptop computer, a tablet computer, a mainframe computer, a workstation, a server, etc., and the display device 20 can be implemented by a variety of displays, but the present disclosure is not limited to this.

In some embodiments, the signal switching device 100 includes a control circuit 101, a memory circuit 103, and a switch circuit 105. Specifically, the control circuit 101 is coupled to the switch circuit 105, and the switch circuit 105 is coupled to the memory circuit 103. In addition, in some embodiments, the control circuit 101 is indirectly coupled to the memory circuit 103 through the switch circuit 105. That is, the control circuit 101 can be directly or indirectly coupled to the memory circuit 103 and the switch circuit 105, and the present invention is not limited thereto.

Based on the above description, when the signal conversion device 100 is coupled between the source device 10 and the display device 20 , the control circuit 101 and the switch circuit 105 are coupled between the source device 10 and the display device 20 .

Accordingly, as shown in FIG. 1 , the control circuit 101 receives the terminal display characteristic data Dc20 from the display device 20. Specifically, the terminal display characteristic data Dc20 includes data (e.g., extended display identification data (EDID) etc.) representing the display specifications (e.g., resolution etc.) that the display device 20 can support. In addition, the control circuit 101 can also access the device display characteristic data Dc100. Specifically, the device display characteristic data Dc100 includes data (e.g., extended display identification data etc.) representing the display specifications (e.g., resolution etc.) that the signal switching device 100 can support.

In some embodiments, the control circuit 101 compares the device display characteristic data Dc100 and the terminal display characteristic data Dc20 to find a portion of the terminal display characteristic data Dc20 that is identical to the device display characteristic data Dc100. Then, the control circuit 101 uses the portion of the terminal display characteristic data Dc20 that is identical to the device display characteristic data Dc100 as the display characteristic data Dcf. For example, the device display characteristic data Dc100 includes data corresponding to a first display specification (e.g., 1080P resolution), and the terminal display characteristic data Dc20 includes data corresponding to the first display specification (e.g., 1080P resolution) and data corresponding to a second display specification (e.g., 4K resolution). In this case, after comparing the device display characteristic data Dc100 and the terminal display characteristic data Dc20, the control circuit 101 uses the data corresponding to the first display specification (eg, 1080P resolution) as the display characteristic data Dcf.

Further describing the above embodiment, in another example, the device display characteristic data Dc100 includes data corresponding to a first display specification (e.g., 1080P resolution) and data corresponding to a second display specification (e.g., 4K resolution), and the terminal display characteristic data Dc20 includes data corresponding to the first display specification (e.g., 1080P resolution) and data corresponding to the second display specification (e.g., 4K resolution). In this case, the control circuit 101 uses the data corresponding to the first display specification (e.g., 1080P resolution) and the data corresponding to the second display specification (e.g., 4K resolution) as the display characteristic data Dcf.

As can be seen from the above, the display characteristic data DCF is generated based on the data of the intersection of the terminal display characteristic data Dc20 and the device display characteristic data Dc100. As can be seen from the above description, the display characteristic data DCF includes data representing display specifications that can be supported by both the source device 10 and the signal switching device 100. Therefore, in some embodiments, the display characteristic data DCF is associated with the source device 10 and the signal switching device 100.

In some embodiments, the control circuit 101 stores the display characteristic data Dcf in a default address of the memory circuit 103, wherein the default address may be a memory address or a register address that is preset to record the display characteristic data Dcf. Specifically, as shown in FIG. 1 , the default address in the memory circuit 103 is described or defined by an address code Ad, so that the display characteristic data Dcf corresponds to the address code Ad.

In some embodiments, as shown in FIG. 1 , the switch circuit 105 is used to conduct one of a first signal path SR1 and a second signal path SR2. Specifically, the first signal path SR1 is used to allow signals, data and/or information to be transmitted between the source device 10 and the memory circuit 103, and the second signal path SR2 is used to allow signals, data and/or information to be transmitted between the source device 10 and the display device 20. It can be seen that the first signal path SR1 is associated with the source device 10 and the memory circuit 103, and the second signal path SR2 is associated with the source device 10 and the display device 20.

In some embodiments, the source device 10 may request the control circuit 101 to perform a read operation on the memory circuit 103 to obtain the display characteristic data Dcf. After receiving the request from the source device 10, the control circuit 101 may control the switch circuit 105 to turn on the first signal path SR1, so that the source device 10 reads the memory circuit 103. During the period when the source device 10 reads the memory circuit 103, as shown in FIG. 1, the memory circuit 103 outputs an output signal Sres to the source device 10 via the first signal path SR1. Specifically, the output signal Sres may carry the corresponding address code Ad and the display characteristic data Dcf.

In some embodiments, the control circuit 101 is used to determine whether the memory circuit 103 transmits the display characteristic data Dcf to the source device 10, so as to continue to turn on the first signal path SR1 or to turn on the second signal path SR2. Specifically, as shown in FIG. 1 , the control circuit 101 also receives the output signal Sres of the memory circuit 103 through the first signal path SR1 turned on by the switch circuit 105 when the source device 10 reads the memory circuit 103. Accordingly, if the control circuit 101 determines that the memory circuit 103 has transmitted the display characteristic data Dcf to the source device 10 by identifying the address code Ad carried by the output signal Sres, the control circuit 101 controls the switch circuit 105 to switch from turning on the first signal path SR1 to turning on the second signal path SR2. In other words, after the control circuit 101 identifies the address code Ad in the output signal Sres, the control circuit 101 controls the switch circuit 105 to disconnect the first signal path SR1 and turn on the second signal path SR2.

In some embodiments, after the second signal path SR2 is turned on, the signal switching device 100 allows the source device 10 and the display device 20 to communicate with each other through high-bandwidth digital content protection (HDCP) technology, so that the display device 20 can generate a display image according to the image data (not shown) provided by the source device 10. In some further embodiments, the source device 10 compares the display characteristic data DCF with a source display characteristic data (not shown) representing the display specification that the source device 10 can support, finds the highest display specification that the source device 10, the signal switching device 100 and the display device 20 can all support from the intersection of the display characteristic data DCF and the source display characteristic data, and provides image data corresponding to the highest display specification to the display device 20 through the signal switching device 100. Therefore, the display characteristic data DCF is also associated with the source device 10. This can avoid the problem in the related art that the signal transfer device has to wait for a long time to receive an image from the source device during the handshake process between the signal transfer device and the source device. That is, in this case, the control circuit 101 controls the switch circuit 105 to allow the source device 10 to quickly output the image to the display device 20.

It should be understood that the internal structure of the signal switching device disclosed herein is not limited to the internal structure of the signal switching device 100 shown in FIG. 1 , which will be explained in conjunction with FIGS. 2 , 3 , 4 and 5 in the following paragraphs.

FIG. 2 is a block diagram of a signal transfer device 200 of some embodiments. Referring to FIG. 2, in some embodiments, the signal transfer device 200 includes a control circuit 201, a memory circuit 203, and a switch circuit 205. When the signal transfer device 200 is electrically coupled between the source device 10 and the display device 20, the control circuit 201 is electrically coupled to the source device 10 and the display device 20 through the switch circuit 205. The remaining connections of the control circuit 201, the memory circuit 203, and the switch circuit 205 are similar to the connections of the control circuit 101, the memory circuit 103, and the switch circuit 105 in the embodiment of FIG. 1, and thus will not be described in detail here.

In the embodiment of FIG. 2 , in addition to the first signal path SR1 and the second signal path SR2 in FIG. 1 , the signal switching device 200 is further provided with a third signal path SR3 and/or a fourth signal path SR4 through the switch circuit 205. Specifically, the third signal path SR3 is used to transmit signals, data and/or information between the control circuit 201 and the display device 20, and the fourth signal path SR4 is used to transmit signals, data and/or information between the control circuit 201 and the memory circuit 203. For example, the control circuit 201 receives the terminal display characteristic data Dc20 from the display device 20 through the third signal path SR3, and after generating the display characteristic data Dcf, transmits the display characteristic data Dcf to the memory circuit 203 through the fourth signal path SR4, so that the memory circuit 203 stores the display characteristic data Dcf. The generation of the display characteristic data Dcf is the same or similar to the description of the embodiment of FIG. 1, so it is not repeated here. It should be understood that the control circuit 201 can control the switch circuit 205 to turn on the third signal path SR3 (for example, when receiving the terminal display characteristic data Dc20) and/or turn on the fourth signal path SR4 (for example, when storing the display characteristic data Dcf) only under specific circumstances. The remaining operations of the signal switching device 200 are the same as or similar to the operations of the signal switching device 100 in the embodiment of FIG. 1 , and thus will not be described in detail here.

FIG. 3 is a block diagram of a signal transfer device 300 in some embodiments. Referring to FIG. 3, in some embodiments, the signal transfer device 300 includes a control circuit 301, a memory circuit 303, and a switch circuit 305. The connection between the control circuit 301, the memory circuit 303, and the switch circuit 305 is similar to the connection between the control circuit 201, the memory circuit 203, and the switch circuit 205 in the embodiment of FIG. 2, and thus will not be described in detail here.

In the embodiment of FIG. 3 , the control circuit 301 includes a microprocessor circuit 301A and a monitoring circuit 301B. The microprocessor circuit 301A is electrically coupled to the switch circuit 305, and is indirectly electrically coupled to the memory circuit 303 through the switch circuit 305. The monitoring circuit 301B is electrically coupled to the switch circuit 305. In addition, when the signal conversion device 300 is electrically coupled between the source device 10 and the display device 20, the microprocessor circuit 301A is electrically coupled to the source device 10 and the display device 20 through the switch circuit 305.

The microprocessor circuit 301A accesses the device display characteristic data Dc100, receives the terminal display characteristic data Dc20 from the display device 20 through the third signal path SR3 turned on by the switch circuit 305, and generates the display characteristic data Dcf according to the device display characteristic data Dc100 and the terminal display characteristic data Dc20. The generation of the display characteristic data Dcf is the same or similar to the description of the embodiment of FIG. 1, so it is not repeated here. Thereafter, the microprocessor circuit 301A transmits the display characteristic data Dcf to the memory circuit 303 for storage through the fourth signal path SR4 turned on by the switch circuit 305.

In some embodiments, during the period when the source device 10 reads the memory circuit 303 (i.e., during the period when the memory circuit 303 outputs the output signal Sres through the first signal path SR1 turned on by the switch circuit 305), the monitoring circuit 301B receives the output signal Sres of the memory circuit 303 through the first signal path SR1 to detect the address code Ad (shown in FIG. 1 ) corresponding to the display characteristic data DCF. When it is detected that the output signal Sres includes the address code Ad, the monitoring circuit 301B controls the switch circuit 305 to switch to the second signal path SR2. It can be seen that in some embodiments, the monitoring circuit 301B detects whether the memory circuit 303 outputs the address code Ad corresponding to the display characteristic data Dcf through the switch circuit 305 (that is, detects that the first signal path SR1 transmits the address code Ad corresponding to the display characteristic data Dcf), and controls the switch circuit 305 to switch from conducting the first signal path SR1 to conducting the second signal path SR2 when the address code Ad is detected. The remaining operations of the signal switching device 300 are the same or similar to the operations of the signal switching device 200 of the embodiment of FIG. 2, and therefore are not described here in detail.

In the embodiment of FIG. 2 or 3, the signal switching device 200/300 of the present disclosure controls the conduction of the first signal path SR1, the second signal path SR2, the third signal path SR3 and the fourth signal path SR4 by a single switch circuit 205/305, but the disclosure is not limited thereto. For example, FIG. 4 is a block diagram of a signal switching device 400 of some embodiments. Referring to FIG. 4, in some embodiments, the signal switching device 400 includes a control circuit 401, a memory circuit 403, a switch circuit 405A and a switch circuit 405B, wherein the control circuit 401 includes a microprocessor circuit 401A and a monitoring circuit 401B.

The signal transfer device 400 is electrically coupled between the source device 10 and the display device 20. The switch circuit 405A is electrically coupled to the monitoring circuit 401B, the memory circuit 403, the source device 10 and the display device 20, and is controlled by the monitoring circuit 401B to conduct the first signal path SR1 or the second signal path SR2. In addition, the switch circuit 405B is electrically coupled to the microprocessor circuit 401A, the memory circuit 403 and the display device 20, and is controlled by the microprocessor circuit 401A to conduct the third signal path SR3 and/or the fourth signal path SR4. The remaining configuration and operation of each component in the signal transfer device 400 are similar to those in the embodiment of FIG. 3, so they are not described here in detail.

FIG. 5 is a block diagram of a signal transfer device 500 of some embodiments. Referring to FIG. 5 , in some embodiments, the signal transfer device 500 includes a control circuit 501, a memory circuit 503, a switch circuit 505A, a switch circuit 505B, and a switch circuit 505C, wherein the control circuit 501 includes a microprocessor circuit 501A and a monitoring circuit 501B. In some embodiments, the signal transfer device 500 is electrically coupled between the source device 10 and the display device 20, and the switch circuit 505C is electrically coupled to the switch circuit 505A, the switch circuit 505B, and the display device 20. Specifically, the second signal path SR2 can be turned on by the monitoring circuit 501B controlling the switch circuit 505A and the switch circuit 505C, and the third signal path SR3 can be turned on by the microprocessor circuit 501A controlling the switch circuit 505B and the switch circuit 505C. The remaining configuration and operation of each component in the signal switching device 500 are similar to the embodiment of FIG. 4, so they are not described here in detail.

FIG. 6 is a flow chart of a signal path adaptive switching method 600 in some embodiments. Referring to FIG. 6 , in some embodiments, the signal path adaptive switching method 600 includes steps S601 to S606. It should be understood that the signal path adaptive switching method 600 can be executed by the control circuit of the signal switching device in the aforementioned embodiment, but the present disclosure is not limited thereto.

In step S601, the control circuit receives terminal display characteristic data Dc20 from the display device 20. In some embodiments, as shown in FIG. 1, the control circuit receives the terminal display characteristic data Dc20 from the display device 20. Also, in some embodiments, as shown in FIGS. 2 to 4, the control circuit receives the terminal display characteristic data Dc20 from the display device 20 via a third signal path SR3 conducted by at least one switch circuit. In addition, in some embodiments, as shown in FIGS. 1 to 5, the control circuit can access the device display characteristic data Dc100. In some embodiments, the device display characteristic data Dc100 is stored in a memory circuit, and the control circuit reads the device display characteristic data Dc100 from the memory circuit.

In step S602, the control circuit generates display characteristic data Dcf according to the intersection data of the terminal display characteristic data Dc20 and the device display characteristic data Dc100. The generation of the display characteristic data Dcf is the same or similar to the description of the embodiment of FIG. 1, so it is not repeated here.

In step S603, the control circuit writes the display characteristic data Dcf to the memory circuit of the signal transfer device so that the display characteristic data Dcf corresponds to the target information. In some embodiments, as shown in FIG. 1, the control circuit 101 stores the display characteristic data Dcf at a preset address of the memory circuit 103 so that the display characteristic data Dcf stored at the preset address corresponds to the address code Ad describing or defining the preset address. That is, in some embodiments, the target information includes the address code Ad.

In step S604, during the read operation of the memory circuit by the source device 10, the control circuit receives the output signal Sres output by the memory circuit. In some embodiments, as shown in FIGS. 1-2, the control circuit receives the output signal Sres through the first signal path SR1 conducted by the switch circuit. In some embodiments, as shown in FIGS. 3-5, the monitoring circuit in the control circuit receives the output signal Sres through the first signal path SR1 conducted by the switch circuit.

In step S605, the control circuit (through the internal monitoring circuit) identifies whether the output signal Sres contains target information (e.g., address code Ad). If not, the control circuit (through the internal monitoring circuit) controls the switch circuit to keep the first signal path SR1 turned on and executes step S605 again. If yes, execute step S606.

In step S606, the control circuit switches from the first signal path SR1 between the source device 10 and the memory circuit to the second signal path SR2 between the source device 10 and the display device 20. In some embodiments, as shown in FIGS. 1 to 5, the control circuit (through the internal monitoring circuit) controls the switch circuit to disconnect the first signal path SR1 and connect the second signal path SR2, so that the source device 10 and the display device 20 can handshake and generate a display image on the display device 20.

From the description of the above steps S604 and S605, it can be seen that in some embodiments, the control circuit monitoring source device 10 of the present disclosure receives the display characteristic data Dcf from the memory circuit (i.e., monitors the display characteristic data Dcf output by the memory circuit) to switch from turning on the first signal path SR1 to turning on the second signal path SR2 in step S606.

It should be understood that in the embodiments of the present disclosure, the control circuit, the microprocessor circuit, and the monitoring circuit can be implemented individually or in combination by a central processing unit (CPU), a microprocessor (MPU), a microcontroller (MCU), or other suitable integrated circuits. The memory circuit can be implemented by an electronically erasable rewritable read-only memory (EEPROM) or other suitable memory. In addition, the switch circuit can be implemented by a transistor circuit or other circuit that can be used as a switch.

It should be understood that the signal path adaptive switching method 600 of FIG. 6 is only an example and is not intended to limit the content of the present disclosure. For example, in some embodiments, the display characteristic data Dcf associated with the display device 20 has been pre-stored in a preset address of a memory circuit in the signal switching device. In this case, steps S601 to S603 can be omitted from FIG. 6.

From the above implementation of the present disclosure, it can be seen that by monitoring the source device 10 to receive the display characteristic data Dcf from the memory circuit, the signal switching device and the signal path adaptive switching method of the present disclosure can quickly switch the signal path after confirming that the source device 10 has completed reading the display characteristic data Dcf, so that the source device 10 and the display device 20 can communicate with each other and generate a display screen. Therefore, the signal switching device and the signal path adaptive switching method of the present disclosure can automatically adapt to a variety of source devices with different data reading times, which will effectively increase the user's willingness to purchase and/or use.

Although the contents of this disclosure have been disclosed as above in the form of implementation, it is not intended to limit the contents of this disclosure. A person with ordinary knowledge in the relevant technical field can make various changes and modifications without departing from the spirit and scope of the contents of this disclosure. Therefore, the protection scope of the contents of this disclosure shall be subject to the definition of the scope of the attached patent application.

10: Source device 20: Display device 100,200,300,400,500: Signal transfer device 101,201,301,401,501: Control circuit 103,203,303,403,503: Memory circuit 105,205,305,405A,405B,505A,505B,505C: Switch circuit 301A,401A,501A: Microprocessor circuit 301B,401B,501B: Monitoring circuit 600: Signal path adaptive switching method Ad: Address code Dc20: Terminal display characteristic data Dc100: Device display characteristic data Dcf: Display characteristic data Sres: Output signal SR1: First signal path SR2: Second signal path SR3: Third signal path SR4: Fourth signal path S601~S606: Steps

FIG. 1 is a block diagram of a signal switching device according to some embodiments of the present disclosure. FIG. 2 is a block diagram of a signal switching device according to some embodiments of the present disclosure. FIG. 3 is a block diagram of a signal switching device according to some embodiments of the present disclosure. FIG. 4 is a block diagram of a signal switching device according to some embodiments of the present disclosure. FIG. 5 is a block diagram of a signal switching device according to some embodiments of the present disclosure. FIG. 6 is a flow chart of a signal path adaptive switching method according to some embodiments of the present disclosure.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

10: Source device

20: Display device

100:Signal switching device

101: Control circuit

103:Memory circuit

105: Switching circuit

Ad: Address code

Dc20: Terminal display characteristic data

Dc100: Device display characteristic data

Dcf: Display characteristic data

Sres: output signal

SR1: First signal path

SR2: Second signal path

Claims (10)

A signal switching device is used to couple between a source device and a display device, and comprises: a memory circuit, storing display characteristic data; a switch circuit, conducting one of a first signal path and a second signal path, the first signal path is included between the source device and the memory circuit, and the second signal path is included between the source device and the display device; and a control circuit, coupling the switch circuit and the memory circuit, the control circuit determines that the memory circuit transmits the display characteristic data to the source device, thereby controlling the switch circuit to switch from conducting the first signal path to conducting the second signal path. A signal transfer device as described in claim 1, wherein the control circuit identifies an address code corresponding to the display characteristic data in an output signal output by the memory circuit to determine whether the memory circuit transmits the display characteristic data to the source device. A signal switching device as described in claim 1, wherein the control circuit receives a terminal display characteristic data of the display device and generates the display characteristic data based on an intersection data of the terminal display characteristic data and a device display characteristic data of the signal switching device. The signal switching device as described in claim 1, wherein the control circuit comprises: A monitoring circuit coupled to the switch circuit, detecting that the first signal path transmits an address code corresponding to the display characteristic data, and controlling the switch circuit to switch from conducting the first signal path to conducting the second signal path when the address code is detected. The signal switching device as described in claim 4, wherein the control circuit further comprises: A microprocessor circuit, which compares a terminal display characteristic data of the display device with a device display characteristic data of the signal switching device, and stores a portion of the terminal display characteristic data that is identical to the device display characteristic data in the memory circuit as the display characteristic data. The signal switching device as described in claim 1, wherein a third signal path is included between the control circuit and the display device, and the control circuit receives a terminal display characteristic data from the display device through the third signal path, wherein a fourth signal path is included between the control circuit and the memory circuit, and the control circuit transmits the display characteristic data to the memory circuit through the fourth signal path. A signal path adaptive switching method includes: monitoring a display characteristic data output by a memory circuit to a source device; and switching from a first signal path between the source device and the memory circuit to a second signal path between the source device and a display device. The signal path adaptive switching method as described in claim 7, wherein monitoring the display characteristic data output by the memory circuit comprises: Receiving an output signal output by the memory circuit with the source device; and Identifying whether the output signal includes a target information corresponding to the display characteristic data; Wherein the target information includes an address code of the memory circuit, and the address code corresponds to the display characteristic data associated with the source device and the display device. The signal path adaptive switching method as described in claim 7 further comprises: receiving a terminal display characteristic data from the display device; and generating the display characteristic data associated with the source device and the display device based on an intersection data of the terminal display characteristic data and a device display characteristic data of a signal switching device, wherein the signal switching device is coupled between the source device and the display device. The signal path adaptive switching method as described in claim 9 further comprises: Writing the display characteristic data associated with the display device into the memory circuit so that the display characteristic data corresponds to a target information, wherein the target information includes an address code of the memory circuit.

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