US20060125055A1 - Voltage-controlled bidirectional switch - Google Patents

Voltage-controlled bidirectional switch Download PDF

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Publication number
US20060125055A1
US20060125055A1 US11/304,247 US30424705A US2006125055A1 US 20060125055 A1 US20060125055 A1 US 20060125055A1 US 30424705 A US30424705 A US 30424705A US 2006125055 A1 US2006125055 A1 US 2006125055A1
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United States
Prior art keywords
switch
type
mos transistor
rear surface
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/304,247
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English (en)
Inventor
Samuel Menard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMICROELECTRNICS SA
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Assigned to STMICROELECTRNICS S.A. reassignment STMICROELECTRNICS S.A. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MENARD, SAMUEL
Publication of US20060125055A1 publication Critical patent/US20060125055A1/en
Priority to US12/026,121 priority Critical patent/US20080142834A1/en
Priority to US13/242,626 priority patent/US8338855B2/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00Thyristors
    • H10D18/80Bidirectional devices, e.g. triacs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/101Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
    • H10D84/131Thyristors having built-in components

Definitions

  • the present invention relates to the field of bi-directional switches, and more specifically of bidirectional switches made in the form of vertical components in which the signal applied to the control electrode is applied with reference to the voltage of the rear surface of the component, which usually is, in vertical components, uniformly metallized.
  • FIGS. 1A, 1B , 1 C reproduce FIGS. 1A, 1B , and 1 C of U.S. Pat. No. 6,034,381.
  • FIG. 1A is formed from a lightly-doped N-type semiconductor substrate 1 .
  • This bi-directional switch comprises two vertical thyristors Th 1 and Th 2 in antiparallel.
  • the anode of thyristor Th 1 corresponds to a P-type layer 2 formed on the rear surface side of the substrate. Its cathode corresponds to a region 3 of the second conductivity type formed on the front surface side in a P-type well 4 .
  • the anode of thyristor Th 2 corresponds to a P-type well 5 formed on the front surface side and its cathode corresponds to an N-type region 6 formed on the rear surface side in layer 2 .
  • This bi-directional switch is of the so-called well type, that is, its periphery is formed of a heavily-doped P-type wall 7 extending from the front surface side to P-type rear surface layer 2 .
  • the rear surface is coated with a metallization M 1 corresponding to a first main terminal A 1 of the bi-directional switch and the upper surfaces of regions 3 and 5 are coated with a second metallization M 2 corresponding to the second main terminal A 2 of the bidirectional switch.
  • the starting structure of this bi-directional switch comprises a P-type well 10 formed on the front or upper surface side in which is formed an N-type region 11 .
  • the surface of well 10 is solid with a metallization M 3 connected to a gate terminal G of the bi-directional switch and the surface region 11 is connected by a metallization M 4 to the upper surface of heavily-doped P-type peripheral wall 7 .
  • FIG. 1A The symbols of various components resulting from the shown structure have already been shown in FIG. 1A .
  • bi-directional switch is assembled so that its rear surface, generally connected to a radiator, is connected to ground and so that its front surface is connected to a voltage which is alternately positive and negative with respect to ground.
  • U.S. Pat. No. 6,034,381 patent shows that a bi-directional switch structure in which control electrode G is arranged on the front surface and in which the bi-directional switch is started by application on control electrode G of a signal of positive biasing with respect to the voltage of rear surface electrode A 1 is obtained.
  • FIG. 1 Structures of the type described in FIG. 1 have been manufactured by STMicroelectronics which has also filed several patents aiming at improvements of this structure.
  • this structure has the disadvantage that, as in the case of a conventional triac, the control is performed by current injection. Now, it is always easier to control a switch with a voltage source than with a current source.
  • an object of the present invention is to provide a bidirectional switch in which the control is referenced to the rear surface voltage and which is voltage-controlled.
  • the present invention provides a voltage-controlled vertical bidirectional monolithic switch, referenced with respect to the rear surface of the switch, formed from a lightly-doped N-type semiconductor substrate, in which the control structure comprises, on the front surface side, a first P-type well in which is formed an N-type region, and a second P-type well in which is formed a MOS transistor, the first P-type well and the gate of the MOS transistor being connected to a control terminal, said N-type region being connected to a main terminal of the MOS transistor, and the second main terminal of the MOS transistor being connected to the rear surface voltage of the switch.
  • the monolithic structure is surrounded with a heavily-doped P-type wall in contact with a rear surface metallization, the connection between the second main terminal of the MOS transistor and the voltage of the rear surface being ensured by a metallization connecting this second main terminal to the upper surface of said wall.
  • connection between the control terminal and, on the one hand, the first P-type well and, on the other hand, the gate is ensured via respective resistors, the first resistance between the control terminal and a contact on the first well being high and the second resistance between the control terminal and the gate being low.
  • the first resistance is on the order of some hundred kilo-ohms and the second resistance is smaller than 100 ohms.
  • the switch comprises, on the rear surface side, between the semiconductor structure and the rear surface metallization, an insulating layer extending at least under the control area and not under the power area.
  • FIGS. 1A, 1B , and 1 C respectively are a simplified cross-section view and equivalent diagrams of a structure of a bi-directional voltage-controlled switch according to U.S. Pat. No. 6,034,381;
  • FIGS. 2A and 2B respectively are a simplified cross-section view and an equivalent diagram of a structure of a bi-directional voltage-controlled switch according to the present invention
  • FIGS. 3A and 3B respectively are a top view and a bottom view of a first embodiment of a bi-directional switch according to the present invention.
  • FIGS. 4A and 4B respectively are a top view and a bottom view of a second embodiment of a bidirectional switch according to the present invention.
  • FIG. 2A is a simplified cross-section view of an embodiment of a voltage-controlled bi-directional switch according to the present invention.
  • a thyristor Th 1 having its anode on the side of lower metallization M 1 and comprising regions or layers 2 - 1 - 4 - 3 and a thyristor Th 2 having its anode on the upper surface side and which comprises region and layer portions 5 - 1 - 2 - 6 can be found in FIG. 2A , between terminals A 1 and A 2 .
  • wells 4 and 5 of thyristor Th 1 and of thyristor Th 2 have been shown as portions of a same well. However, the same arrangement as in FIG. 1A would be possible (forming of wells 4 and 5 in two parts). Further, an optional channel stop ring 21 which surrounds the entire well 4 - 5 has been shown.
  • an insulating layer 23 which is substantially located on the entire lower surface outside of the opposite portion of well 4 appears on the lower surface side between metallization M 1 and P-type layer 2 .
  • the arrangement of this layer will be better understood with reference to the bottom views of FIGS. 3B and 4B .
  • the function of this insulating layer is to favor the switch starting by bringing the charge carriers generated in the control area to propagate to the power area (thyristor Th 1 and Th 2 ) after a control signal is applied.
  • An N + -type layer would have a similar function.
  • the control area comprises a first P-type well 24 in which is formed an N-type region 25 .
  • This well and this region are designated with reference numerals different from those of well 10 and of region 11 of FIG. 1A since, as will be seen hereafter, the doping level and the depth of well 24 are preferably distinct from what has been previously described in prior art.
  • a metallization M 5 is in contact with well 24 .
  • N-type region 25 is connected by a metallization M 6 to an N + -type source region 28 of a MOS transistor T 3 formed in a P-type well 27 .
  • MOS transistor T 3 comprises an N + -type drain region 26 and its P-type channel forming area is topped with a conductive gate 29 .
  • a metallization M 7 connects region 28 to heavily-doped P-type peripheral wall 7 to establish a contact with rear-surface P-type region 2 and metallization M 1 .
  • a gate terminal G forms one piece with metallization M 5 and with gate 29 of the MOS transistor, preferably via resistors which are shown in the equivalent diagram of FIG. 2B and which can be formed in integrated form although they are not shown in FIG. 2A .
  • Well 27 may, as shown, be contiguous to peripheral wall 7 or else be a separate well, the connection between drain 28 and the upper surface of this wall being ensured by metallization M 7 .
  • MOS transistor T 3 has been shown very schematically. Any variation of such a transistor may be used. Especially, the MOS transistor may conventionally have a multiple-cell structure by using, for example, a structure with two metallizations to establish the contacts.
  • FIG. 2B An equivalent diagram of this bi-directional switch is illustrated in FIG. 2B .
  • An NPN transistor T 2 having region 25 as an emitter, region 24 as a base, and substrate 1 as a collector has been shown.
  • the connection between control terminal G and the base of this transistor is ensured via a resistor R 2 and the connection between control terminal G and the gate of MOS transistor T 3 is ensured via a resistor R 3 .
  • resistor R 2 may have a value on the order of some hundred kilo-ohms and resistor R 3 may have a value on the order of some hundred ohms.
  • terminal A 2 the circuit is controlled by the application of a positive voltage to terminal G.
  • MOS transistor T 3 turns on and a current flows from metallization M 5 to metallization M 6 in diode 24 - 25 and in the MOS transistor towards terminal A 1 .
  • the turning-on of diode 24 - 25 causes the injection of electrons by N + region 25 .
  • a portion of these electrons limited due to the strong value of resistor R 2 , continues to terminal G.
  • Another portion of these electrons reaches substrate 1 and is attracted by the anode formed of layer 4 - 5 connected by metallization M 2 to terminal A 2 .
  • a symmetrical operation occurs when terminal A 2 is negative with respect to terminal A 1 (negative halfwave). Then, the application of a positive voltage on terminal G turns on MOS transistor T 3 , a current flows in diode 24 - 25 . This results in an injection of electrons into the substrate. This time, these electrons are directed towards layer 2 which is connected to positive terminal A 1 and this layer 2 injects holes into the substrate which tend to unblock the blocking junction of thyristor Th 1 between substrate 1 and P-type well 4 .
  • MOS transistor T 3 when no signal is applied on terminal G, MOS transistor T 3 is blocked and does not conduct any current.
  • NPN transistor T 2 in series with MOS transistor T 3 has its emitter floating and can by no means become conductive, even if charges are injected into the substrate by various parasitic effects, for example, by application of a strong current variation according to the time (dV/dt) between terminals A 2 and A 1 .
  • a transistor with a high gain can be obtained by optimizing well 24 so that, especially, the thickness of the base ( 24 ) between emitter and collector is small.
  • Sensitive thyristors may for example result from an optimized topology and from a small density of emitter short-circuits. This results in that transistor T 2 can be triggered by a very small current, and in that a resistor R 2 of high value can be placed in series on its base. Thus, in the subsequent control and operation, an extremely small current is injected into the base of transistor T 2 . This results in that there is in practice a voltage control and no longer a current control as in prior art.
  • FIGS. 3A and 3B Two more detailed examples of embodiment of the present invention are respectively illustrated in the top and bottom views of FIGS. 3A and 3B and in the top and bottom views of FIGS. 4A and 4B .
  • the metallizations have been eliminated, but how to arrange them will be understood from the simplified cross-section view of FIG. 2A and from the circuit diagram of FIG. 2B .
  • P-type wells 4 and 5 form one and the same well. It should be understood that the channel area of MOS transistor T 3 is arranged in the opposite portions of N + -type regions 26 , 28 .
  • the two thyristors Th 1 and Th 2 are separate and arranged on either side of the structure.
  • Wells 4 and 5 are thus distinct and insulating wall 7 comprises a median portion separating the two structures.
  • Two control areas are arranged symmetrically with respect to the median portion of the insulating wall, each substantially having the same structure as what has been shown and described previously.
  • FIGS. 3 and 4 only show certain specific examples of embodiment of the present invention. Many other practical embodiments will occur to those skilled in the art as to the topology of the various layers, according to a concept of present invention being forming, in monolithic form, of a circuit corresponding to that which is illustrated in FIG. 2B .

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  • Thyristors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
US11/304,247 2004-12-15 2005-12-15 Voltage-controlled bidirectional switch Abandoned US20060125055A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/026,121 US20080142834A1 (en) 2004-12-15 2008-02-05 Voltage-controlled bidirectional switch
US13/242,626 US8338855B2 (en) 2004-12-15 2011-09-23 Voltage-controlled bidirectional switch

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0452991A FR2879350A1 (fr) 2004-12-15 2004-12-15 Commutateur bidirectionnel a commande en tension
FRFR04/52991 2004-12-15

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/026,121 Continuation US20080142834A1 (en) 2004-12-15 2008-02-05 Voltage-controlled bidirectional switch

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US20060125055A1 true US20060125055A1 (en) 2006-06-15

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US11/304,247 Abandoned US20060125055A1 (en) 2004-12-15 2005-12-15 Voltage-controlled bidirectional switch
US12/026,121 Abandoned US20080142834A1 (en) 2004-12-15 2008-02-05 Voltage-controlled bidirectional switch
US13/242,626 Expired - Lifetime US8338855B2 (en) 2004-12-15 2011-09-23 Voltage-controlled bidirectional switch

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US12/026,121 Abandoned US20080142834A1 (en) 2004-12-15 2008-02-05 Voltage-controlled bidirectional switch
US13/242,626 Expired - Lifetime US8338855B2 (en) 2004-12-15 2011-09-23 Voltage-controlled bidirectional switch

Country Status (5)

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US (3) US20060125055A1 (fr)
EP (1) EP1672699B1 (fr)
CN (1) CN100492658C (fr)
DE (1) DE602005008176D1 (fr)
FR (1) FR2879350A1 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080303089A1 (en) * 2007-06-07 2008-12-11 Advanced Micro Devices, Inc. Integrated circuit system with triode
US20110284921A1 (en) * 2010-05-18 2011-11-24 Samuel Menard Hf-controlled bidirectional switch
US8779464B2 (en) * 2011-04-22 2014-07-15 Stmicroelectronics (Tours) Sas Starting structure and protection component comprising such a starting structure
US20160027907A1 (en) * 2014-07-24 2016-01-28 Stmicroelectronics (Tours) Sas Bidirectional switch
US20180090572A1 (en) * 2015-05-29 2018-03-29 Abb Schweiz Ag Thyristor with improved plasma spreading
US11462624B2 (en) 2018-01-05 2022-10-04 Stmicroelectronics (Tours) Sas Semiconductor triode

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2959598B1 (fr) * 2010-04-29 2012-12-07 St Microelectronics Tours Sas Commutateur bidirectionnel a commande en q1, q4
JP2011249601A (ja) * 2010-05-27 2011-12-08 Shindengen Electric Mfg Co Ltd 短絡型サイリスタ
US9293533B2 (en) * 2014-06-20 2016-03-22 Infineon Technologies Austria Ag Semiconductor switching devices with different local transconductance
US9455253B2 (en) * 2014-07-23 2016-09-27 Stmicroelectronics (Tours) Sas Bidirectional switch
DE102016204699B4 (de) * 2015-04-13 2020-07-30 Infineon Technologies Ag Schutzvorrichtungen mit Trigger-Vorrichtungen und Verfahren zu deren Bildung
CN105845739A (zh) * 2016-05-17 2016-08-10 天津理工大学 一种二维纳米片层过渡金属硫化物双向开关器件

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608235A (en) * 1993-11-10 1997-03-04 Sgs-Thomson Microelectronics S.A. Voltage-controlled bidirectional switch
US5923055A (en) * 1994-09-22 1999-07-13 Daimler-Benz Aktiengesellschaft Controllable semiconductor component
US6034381A (en) * 1996-06-28 2000-03-07 Sgs-Thomson Microelectronics S.A. Network of triacs with gates referenced with respect to a common opposite face electrode

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63244881A (ja) * 1987-03-31 1988-10-12 Toshiba Corp 制御整流半導体装置
JP3182862B2 (ja) 1991-05-31 2001-07-03 富士電機株式会社 半導体装置
JP2878587B2 (ja) * 1993-10-20 1999-04-05 株式会社日立製作所 半導体装置
FR2819102B1 (fr) * 2000-12-29 2003-04-04 St Microelectronics Sa Commutateur electronique bidirectionnel bistable a commande par impulsions

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608235A (en) * 1993-11-10 1997-03-04 Sgs-Thomson Microelectronics S.A. Voltage-controlled bidirectional switch
US5923055A (en) * 1994-09-22 1999-07-13 Daimler-Benz Aktiengesellschaft Controllable semiconductor component
US6034381A (en) * 1996-06-28 2000-03-07 Sgs-Thomson Microelectronics S.A. Network of triacs with gates referenced with respect to a common opposite face electrode

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080303089A1 (en) * 2007-06-07 2008-12-11 Advanced Micro Devices, Inc. Integrated circuit system with triode
US8089125B2 (en) * 2007-06-07 2012-01-03 Advanced Micro Devices, Inc. Integrated circuit system with triode
US20110284921A1 (en) * 2010-05-18 2011-11-24 Samuel Menard Hf-controlled bidirectional switch
US8785970B2 (en) * 2010-05-18 2014-07-22 Stmicroelectronics (Tours) Sas HF-controlled bidirectional switch
US8779464B2 (en) * 2011-04-22 2014-07-15 Stmicroelectronics (Tours) Sas Starting structure and protection component comprising such a starting structure
US20160027907A1 (en) * 2014-07-24 2016-01-28 Stmicroelectronics (Tours) Sas Bidirectional switch
US9722061B2 (en) * 2014-07-24 2017-08-01 Stmicroelectronics (Tours) Sas Bidirectional switch
US20180090572A1 (en) * 2015-05-29 2018-03-29 Abb Schweiz Ag Thyristor with improved plasma spreading
US10170557B2 (en) * 2015-05-29 2019-01-01 Abb Schweiz Ag Thyristor with improved plasma spreading
US11462624B2 (en) 2018-01-05 2022-10-04 Stmicroelectronics (Tours) Sas Semiconductor triode
US12575164B2 (en) 2018-01-05 2026-03-10 Stmicroelectronics (Tours) Sas Semiconductor triode

Also Published As

Publication number Publication date
US20120012891A1 (en) 2012-01-19
EP1672699B1 (fr) 2008-07-16
CN1835247A (zh) 2006-09-20
CN100492658C (zh) 2009-05-27
DE602005008176D1 (de) 2008-08-28
US8338855B2 (en) 2012-12-25
FR2879350A1 (fr) 2006-06-16
US20080142834A1 (en) 2008-06-19
EP1672699A1 (fr) 2006-06-21

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