US20140145565A1 - Electronic Assembly Group and Method for Producing the Same - Google Patents

Electronic Assembly Group and Method for Producing the Same Download PDF

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Publication number
US20140145565A1
US20140145565A1 US14/171,379 US201414171379A US2014145565A1 US 20140145565 A1 US20140145565 A1 US 20140145565A1 US 201414171379 A US201414171379 A US 201414171379A US 2014145565 A1 US2014145565 A1 US 2014145565A1
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Prior art keywords
layer
electronic assembly
assembly group
connection regions
electrically conductive
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Abandoned
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US14/171,379
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English (en)
Inventor
Thomas Gottwald
Christian Rossle
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Schweizer Electronic AG
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Schweizer Electronic AG
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Assigned to SCHWEIZER ELECTRONIC AG reassignment SCHWEIZER ELECTRONIC AG ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GOTTWALD, THOMAS, RÖSSLE, Christian
Publication of US20140145565A1 publication Critical patent/US20140145565A1/en
Priority to US15/375,578 priority Critical patent/US10154593B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H02K11/0068—
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02K—DYNAMO-ELECTRIC MACHINES
    • H02K11/00—Structural association of dynamo-electric machines with electric components or with devices for shielding, monitoring or protection
    • H02K11/30—Structural association with control circuits or drive circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02K—DYNAMO-ELECTRIC MACHINES
    • H02K11/00—Structural association of dynamo-electric machines with electric components or with devices for shielding, monitoring or protection
    • H02K11/30—Structural association with control circuits or drive circuits
    • H02K11/33—Drive circuits, e.g. power electronics
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02K—DYNAMO-ELECTRIC MACHINES
    • H02K9/00—Arrangements for cooling or ventilating
    • H02K9/22—Arrangements for cooling or ventilating by solid heat conducting material embedded in, or arranged in contact with, the stator or rotor, e.g. heat bridges
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02K—DYNAMO-ELECTRIC MACHINES
    • H02K9/00—Arrangements for cooling or ventilating
    • H02K9/22—Arrangements for cooling or ventilating by solid heat conducting material embedded in, or arranged in contact with, the stator or rotor, e.g. heat bridges
    • H02K9/227—Heat sinks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/184—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/501—Inductive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
    • H01G2/065—Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0397—Tab
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10015—Non-printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10022—Non-printed resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/1003—Non-printed inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0228—Cutting, sawing, milling or shearing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Definitions

  • the present invention relates to an electronic assembly group and a method for its production, as well as an electric motor, for example for use in a motor vehicle.
  • DCB Direct Copper Bonding
  • This usually means ceramic substrate with soldered power semiconductors, onto which further necessary (passive) component parts are connected.
  • these component parts can be capacitors, particularly film capacitors and inductors.
  • the electronic assembly group comprises a printed circuit board structure with a multilayer structure or multilayer configuration.
  • the multilayer structure contains, in a conventional manner, at least two electrically conductive layers.
  • the invention proposes to lengthen each of these two layers in such a way that they exhibit a section projecting beyond the multilayer structure, said section defining a connection region for direct contact formed by an additional passive component part.
  • connection regions can be designed, for example, in a lattice-like or striped form.
  • the additional passive component part can be a capacitor and/or an inductor and/or a resistor.
  • a multilayer structure with an electrically conductive carrier layer and at least one further electrically conductive layer are provided.
  • the carrier layer and the further electrically conductive layer have layer sections projecting beyond the core region of the multilayer structures. Any layer sections not needed as connection regions are at least partially removed, and also the prepreg layer sections projecting beyond the core region are at least partially removed. If necessary, remaining layer sections that project beyond the core region are bent to create connection regions for a passive component part.
  • At least one through-connection between a projecting layer section of the further electrically conductive layer and a projecting layer section of the carrier layer is established, and the projecting layer section of the further electrically conductive layer is separated from the further electrically conductive layer.
  • connection regions projecting beyond the multilayer structure with inductive component parts, such as, for example, ferrite cores, targeted inductors with specific values can additionally be created.
  • inductive component parts such as, for example, ferrite cores
  • targeted inductors with specific values can additionally be created.
  • These inductive component parts can be used alone or also in combination with other passive component parts such as a capacitor.
  • connection regions can exhibit at least one recess, with a contact pad contained within it, for contact with a passive component part.
  • the contact pad for example, can be electrically connected to the connection region via at least one holding web or holding bar. Due to this, during soldering/welding lower heat dissipation occurs because of the reduced cross-section of the holding web.
  • the contact pads can thus, for example, be soldered directly to the Schoop layer of a film capacitor.
  • Different geometries are possible for the arrangement of the contact pads and also the holding webs.
  • the holding webs can be arranged in such a way that they take on different expansion coefficients or the related mechanical tensions during use.
  • the holding webs can, for example, be arranged in a meandering or zig-zag way, or can allow deformation or twisting due to their mounting geometries.
  • FIG. 1 shows a side view cutaway diagram through a first exemplary embodiment of an electronic assembly group of the invention.
  • FIG. 2 shows a side view cutaway diagram through a second exemplary embodiment of an electronic assembly group of the invention.
  • FIGS. 3 through 6 illustrate the production of the connection regions according to the invention.
  • FIG. 7 shows a multilayer structure with separation layers for use in the production of connection regions according to the invention.
  • FIGS. 8 through 12 illustrate an alternative production of the connection regions according to the invention.
  • FIG. 13 shows a top view of an arrangement of a connection region according to the invention.
  • FIG. 1 shows an electronic assembly group 50 according to the invention in a side view cutaway diagram.
  • Assembly 50 contains a multilayer printed circuit board structure that has a carrier layer 12 which carries an (embedded) semiconductor component part 18 . Extending above the carrier layer 12 and the semiconductor component part 18 is a prepreg layer or one resin layer 20 from an earlier prepreg layer above which lies a further electrically conductive layer 14 . It has a through-connection to the semiconductor component part 18 . On the top layer 14 a logic circuit 40 can be attached as shown, for example by lamination. According to the exemplary embodiment shown, an electronic assembly group is a appropriate logic control. However, the logic circuit pictured can also be a separate circuit, and be coupled with conventional connection technology to the power electronic part.
  • a second further electrically conductive layer 16 is provided—separated by a second prepreg layer 22 . It is arranged such as to be electrically insulated from layer 12 , but its material thickness and its material properties are selected in such a way that good thermal conductivity and simultaneously high dielectric strength is achieved. The arrangement is positioned with the second further layer 16 at a heat sink 60 .
  • connection with the heat sink 60 can be made directly in the factory, so that the assembly according to the invention is delivered already complete with a cooling element. This would be an option, for example, in the compact design shown in FIG. with a ring capacitor surrounding the multilayer structure including the heat sink.
  • the assembly can also be connected only at the destination with the element serving as a heat sink possibly already present there.
  • the underside or bottom side of the assembly i.e., the underside of the second conductive layer 16
  • connection region 12 . 2 is extended beyond the original multilayer structure—to the right in the depiction of FIG. 1 —and forms a connection region 12 . 2 .
  • further conductive layer 14 is extended in the opposite direction beyond the “core region” or “functional region” of the multilayer structure, to form a connection region 14 . 1 .
  • the connection regions 12 . 2 and 14 . 1 are connections for a capacitor C, which are thus directly connected to the drain and source connections of the power semiconductor.
  • connection regions 12 . 2 , 14 . 1 are directly led out of the multilayer printed circuit board structure and are directly connected with a passive component part, i.e. in the present example a capacitor. Thereby a short connection from the passive component part to the semiconductor component part 18 is achieved.
  • the electronic assembly group according to the invention is of simple construction and has a significantly raised assembly density/integration as well as reduced parasitic inductions.
  • connection regions 14 . 1 and 12 . 2 are executed as a load inductor L.
  • the load inductor L can be formed, for example, by one or more ferrite cores.
  • the design according to the invention additionally permits direct contact of at least one of the load inductor-forming ferrite cores with the heat sink 60 .
  • FIG. 2 shows an alternative design of the electronic assembly group 50 of the invention, having a ring-shaped capacitor C that is arranged surrounding the printed circuit board structure.
  • the drain/source connection regions 12 . 1 , 14 . 1 , 12 . 2 , 14 . 2 in this case emerge on both sides of the structure from the carrier layer 12 and the further electrically conductive layer 14 so that altogether four connection regions 12 . 1 , 14 . 1 , 12 . 2 , 14 . 2 are present.
  • the ring capacitor can be connected with only two connections (as in the exemplary embodiment in FIG. 1 ); with four connections, however, the parasitic inductions that occur in the Schoop layer of the ring capacitor would be reduced by half.
  • connection regions according to the invention can be relatively short.
  • the ring capacitor receives within its inside (i.e. the opening of the ring) the multilayer printed circuit board structure from which the connection regions extend.
  • the connection regions are directly connected to the connections of the ring capacitor.
  • the heat sink 60 is also arranged inside the ring capacitor, in order to achieve the most compact design.
  • capacitor packs can be placed left and right on the connection pairs 12 . 1 , 14 . 1 and 12 . 2 , 14 . 2 .
  • the electronic assembly group can be a rectifier/converter in an electric motor for an automobile.
  • the assembly group can be placed in a particularly space-saving manner directly (with a suitable thermally conductive connective layer (e.g. adhesive pastes, sinter pastes, soldering pastes, etc.) in-between to prevent air gaps) on a cooling section (already present) of the electric motor, such that this forms the heat sink 60 , and no separate heat sink is necessary.
  • a suitable thermally conductive connective layer e.g. adhesive pastes, sinter pastes, soldering pastes, etc.
  • a standard multilayer structure 10 ′ is provided (cf. FIG. 3 ).
  • This multilayer structure may be, e.g., a structure such as that known from the parallel German patent application 10 2010 060 855.6 of the same applicant.
  • the multilayer structure 10 ′ provided comprises a first conductive layer 12 , representing a carrier layer for a semiconductor component 18 (not depicted).
  • the multilayer structure 10 ′ also comprises a further electrically conductive layer 14 which is located above the first conductive layer 12 in the depiction of FIG. 3 .
  • a prepreg layer 20 which may consist of thermally conductive material is provided between the two layers 12 , 14 .
  • the multilayer structure 10 ′ further comprises a second electrically conductive layer 16 which is located underneath the first conductive layer 12 in the depiction of FIG. 3 and separated from it by a second prepreg layer 22 .
  • This prepreg layer 22 may also consist of thermally conductive material.
  • the further electrically conductive layers 14 , 16 may be copper foils, which can additionally be plated.
  • the multilayer printed circuit board structure of the invention may have a symmetrical structure around the carrier layer 12 , i.e. the prepreg layers 20 , 22 have the same thickness, just as the further conductive layers 14 , 16 are each of the same thickness.
  • the symmetry of the structure results in a high level of reliability of the assembly. While asymmetrical structures such as DCB substrates tend to bend when subjected to the strain of temperature changes, this behavior is inhibited with the symmetrical structure described here.
  • the actual size/width of the electronic assembly group to be produced is indicated in FIG. 3 by the two dashed vertical lines, and is hereinafter termed the “core region” or functional region K.
  • the layers of the multilayer structure 10 ′ extend in this process stage as far beyond the dashed lines on both sides as corresponds to the desired length of the eventual/future connection regions. These sections of the layers are designated by the addition of “0.1” or “0.2” to the reference signs.
  • the prepreg layers 20 . 1 , 20 . 2 , 22 . 1 , and 22 . 2 may consist of the same (thermally conducting) material as in the “core region” K between the dashed lines, or if indicated by cost considerations—of a cheaper standard material.
  • That section of the multilayer printed circuit board structure containing the power electronic and, if applicable, control function is designated as core region K or functional region.
  • the sections projecting beyond this core region serve to realize the idea or gist of the invention, namely to create the possibility of a direct connection for passive components.
  • FIG. 4 depicts the multilayer structure after an etching process: the sections 16 . 1 and 16 . 2 of the second further electrically conductive layer 16 extending beyond the core region have been etched away, as has one of the two projecting sections 14 . 2 of the first further electrically conductive layer 14 .
  • the prepreg layers are unaffected by the etching step, as are the projecting sections 14 . 1 and 12 . 2 (which will still be needed later) of the first further layer 14 and carrier layer 12 .
  • the exposed prepreg layers 20 . 1 , 20 . 2 , 22 . 1 and 22 . 2 are substantially removed through milling (depth milling) (cf. FIG. 5 ), leaving a multilayer structure 10 the layers of which correspond in the “core region” to the desired dimensions, with two of the layers each having one layer section 14 . 1 , 12 . 2 projecting beyond the multilayer structure 10 .
  • These layer sections 14 . 1 , 12 . 2 are defined as connection regions, and are bent as necessary in a subsequent process step such that they serve to directly contact a passive component (cf. FIG. 6 ).
  • the connection regions may be formed as tabs or strips according to the invention. In particular, the connection regions are so formed as to be suited for directly contacting at least one further passive component without the need for additional connecting means (such as, in particular, cables, etc.).
  • connection regions 14 . 1 , 12 . 2 so formed can then be connected to a passive components, in the present exemplary embodiment a condenser C, C′, e.g. by soldering, if necessary via a Schoop layer.
  • a condenser C, C′ e.g. by soldering
  • connection regions 14 . 1 , 12 . 2 can be formed as at least one load inductor L, in that the conductive connection region is enclosed e.g. in ferrite cores.
  • the structure can also be connected to a heat sink 60 .
  • the final product may be potted (casting 70 ; cf. FIG. 1 ).
  • FIG. 7 One variant of the initial multilayer structure 10 ′′ is shown in FIG. 7 .
  • the basic structure of the multilayer structure corresponds with the depiction of FIG. 3 , with the difference that separating foils 11 , 13 , 15 are provided between the projecting layer sections 14 . 1 and 12 . 1 and their adjacent prepreg layer sections 20 . 1 , 20 . 2 , 22 . 2 , said foils permitting or easing the separation by mechanical means (through pulling, peeling, etc.) of the prepreg layer sections 20 . 1 , 20 . 2 , 22 . 2 from the eventual/future connection regions 14 . 1 , 12 . 2 .
  • the contour of the region to be removed is depth milled in order to provide access to the separating foil.
  • any other separating means may be used that prevents the prepreg layer from sticking to the electrically conducting layer.
  • This separating means can also be a suitable liquid or paste-like material applied via screen printing, spraying, or immersion.
  • a further variant, as illustrated in FIG. 8 provides for what is called “plane offsetting”.
  • a multilayer structure 10 ′′′ is provided in which the carrier layer 12 extends only slightly beyond the “core region” (reference sign 12 ′).
  • the further electrically conductive layer 14 is—as in the previous exemplary embodiments—extended on both sides beyond the core region (reference signs 14 . 1 and 14 . 2 ).
  • a through-connection 17 (which may consist of several through-connections, e.g. in the form of one or more rows of through-connections) is made from the extended layer section 14 . 1 of the first further electrically conductive layer 14 to the short projection 12 ′ of the carrier layer 12 positioned beneath it (cf. FIG. 9 ), followed by a separation of the layer section 14 . 1 from the first further electrically conductive layer 14 at the boundary of the “core region” and before the through-connection 17 (cf. FIG. 10 , reference sign 19 ).
  • a contact is established between the (somewhat thicker) carrier layer 12 and the (thinner) connection region 14 . 1 of the further electrically conductive layer 14 , so that the carrier layer 12 has a thinner “auxiliary” connection region.
  • the effect is that the connection regions both i) are on the same level and ii) have the same thickness.
  • depth millings are carried out from the side opposite the first further electrically conductive layer 14 , i.e. from the side of the second electrically conductive layer 16 , in order to create a bending region 24 on either side of the core region. These depth millings are carried out outside the core region, but close to it, so that the connection regions can be bent as close to the core region as possible. The depth millings go through all layers except the connection regions 14 . 1 and 14 . 2 (cf. FIG. 11 ).
  • two depth millings may be carried out, also from the side opposite the first further electrically conductive layer 14 , i.e. from the side of the second electrically conductive layer 16 .
  • These second depth millings serve to create solder connections 26 in order to make it possible to connect the passive component (cf. FIG. 12 ).
  • the remaining regions 28 with sequences of layers below the connection regions 14 . 1 and 14 . 2 can serve during potting as spacers between a housing surrounding the electronic assembly group (not shown).
  • FIG. 13 shows an extract of a plan view of an embodiment of a connection region 12 . 2 or 14 . 1 according to the invention.
  • the connection region has one or (as depicted) multiple recesses 30 (the embodiment of FIG. 13 has four such recesses).
  • Each recess 30 is provided with a contact pad 32 which is provided and formed for welding or soldering to a contact of the passive component to be connected.
  • the contact pad 32 has an essentially quadratic outline/footprint, though it may take any other suitable form.
  • the contact pad 32 is connected electrically to the connection region by means of at least one holding web/bar 34 .
  • at least one holding web/bar 34 In the embodiment shown, four holding webs 34 are provided for each contact pad 32 ; however, more or fewer may be used.
  • the holding webs 34 have a lower thermal cross-section than the surrounding connection region, thus simplifying the process of attachment via welding or soldering.
  • the holding webs 34 are additionally designed so as to compensate for different coefficients of expansion during operation (which involves heating). This occurs because the holding webs 34 are suited for absorbing mechanical stress loads.
  • the geometrical arrangement is such that, for straight holding bars or webs 34 , a twisting of the contact pad 32 is possible. This is achieved through a broken symmetry when connecting the contact pad and the connection region.
  • Another possibility is, e.g., to design the holding webs in a meander or zig-zag shape.
  • the invention thus permits direct connection of a passive component to a multilayer printed circuit board structure without additional connecting means, cables, bond wires, etc. Only the actual connection (generally by means of soldering) of the component need be performed.
  • the contact paths are thus shortened, the number of solder connections decreased and reliability consequently increased, parasitic inductances are reduced, and integration density is increased.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)
US14/171,379 2011-06-21 2014-02-03 Electronic Assembly Group and Method for Producing the Same Abandoned US20140145565A1 (en)

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DE102011105346A DE102011105346A1 (de) 2011-06-21 2011-06-21 Elektronische Baugruppe und Verfahren zu deren Herstellung
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WO2012175207A3 (de) 2013-04-04
US20170127524A1 (en) 2017-05-04
EP2724597B1 (de) 2017-01-18
US10154593B2 (en) 2018-12-11
DE102011105346A1 (de) 2012-12-27
CN103814629B (zh) 2017-08-22
WO2012175207A2 (de) 2012-12-27
CN103814629A (zh) 2014-05-21
EP2724597A2 (de) 2014-04-30

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