US3107348A - Annunciator system - Google Patents

Annunciator system Download PDF

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US3107348A
US3107348A US706687A US70668758A US3107348A US 3107348 A US3107348 A US 3107348A US 706687 A US706687 A US 706687A US 70668758 A US70668758 A US 70668758A US 3107348 A US3107348 A US 3107348A
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input
terminal
output
signal
rectifier
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Jon J Mcneill
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Westinghouse Electric Corp
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Westinghouse Electric Corp
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    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING SYSTEMS, e.g. PERSONAL CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B25/00—Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems
    • G08B25/14—Central alarm receiver or annunciator arrangements
    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING SYSTEMS, e.g. PERSONAL CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B1/00—Systems for signalling characterised solely by the form of transmission of the signal
    • G08B1/08—Systems for signalling characterised solely by the form of transmission of the signal using electric transmission ; transformation of alarm signals to electrical signals from a different medium, e.g. transmission of an electric alarm signal upon detection of an audible alarm signal

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  • WITNESSES 'NVENTOR 59, g Q I Jon J McNel K 74 x0. WA W W W ATTOB/NEY Oct. 15, 1963 J. MONEILL, 3,107,348
  • ANNUNCIATOR SYSTEM Filed Jan. 2, 1958 4 Sheets-Sheet 4 SN N8 Na I 08 mm 2% vvm mw QW MH QN ⁇ i hmm QVN M EN 8% 08 ohm EN ow 3% mm w United States Patent 3,107,343 ANNUNCIATOR SYSTEM Jon 1!. McNeill, Pittsburgh, Pa, assignor to Westinghouse Electric Corporation, East Pittsburgh, Pin, a corporation of Pennsylvania Filed .lan. 2, 1958, Ser. No. 706,687 @iaiins. (El. 346-213)
  • This invention relates to annunciator systems of a type which embodies static logic elements, such for example as saturable core or other static switching devices, to perform the various annunciator functions.
  • An object of this invention is to provide an annunciator having static logic elements which cooperate with a flasher to produce a flashing light for indicating an abnormal condition in a monitored circuit.
  • Another object of this invention is to provide an annunciator having static elements which cooperate with a pulse producing device to provide a pulsing signal for indicating an abnormal condition at a monitored point.
  • Still another object of this invention is to provide an annunciator system having saturable core static logic elements which respond to an abnormal condition in a monitored circuit to actuate an audio indicator and a flashing visual indicator, and which thereafter responds to an acknowledge signal to deactuate the audio indicator and simultaneously switch the flashing visual indicator to a steady visual indicator.
  • Another object of this invention is to provide an annuuciator system having saturable core static logic elements which cooperate with impedance means to actuate a dim light indicator in response to normal conditions at a monitored point and to actuate a flashing or bright light indicator in response to an abnormal condition at the monitored point.
  • An additional object of the invention is to make possible the use of a low energy output flasher of the static type, by connecting the flasher at the input side of the amplifiers which feed the lamps, so that the flasher does not have to handle the power for lighting the lamps.
  • the invention accordingly, comprises the features of construction, combination of elements, and arrangements of parts which will be exemplified in the constructions hereinafter set forth and illustrated in the drawings.
  • FIGURE 1 is a schematic diagram of interconnected static elements illustrating a basic embodiment of this invention
  • FIG. 2 is a schematic diagram of a transformer, rectifier and control circuit which may be used to provide power and logic signals to the annunciator of FIG. 1;
  • FIG. 3 is a block diagram indicating the logic functions of the static elements of FIG. 1 as connected to an indicator and an alarm;
  • FIG. 4 is a block diagram of a second embodiment of the invention.
  • PEG. 5 is a block diagram of a third embodiment of the invention.
  • FIG. 6 is a block diagram of a fourth embodiment of the invention.
  • FIG. 7 is a block diagram of a fifth embodiment of the invention.
  • FIG. 8 is a schematic diagram of a static flasher comprised of static elements.
  • the annunciator systems in this application are illustrated by using static elements which include diodes and a plurality of saturable core static logic elements, which are different from each other in detailed structure, to provide different ones of the logic functions AND, OR, NOT and NOT-MEMORY.
  • the various logic elements thus constructed are combined with each other and with various indicator devices to comprise annunciator systems which respond to abnormal conditions at a monitored point.
  • the monitor may be a conventional trouble sensing device of the binary type such as a pressure switch, ratio switch, temperature switch, a limit switch of the magnetic or contact type, or a proximity switch, any one of which may open or close a contact in response to abnormal variations at the monitored point.
  • the annunciator responds directly to the presence of a normally absent signal or to the absence of a normally present signal.
  • the following description is divided into two major parts.
  • the first part is directed to the structure and operation of the different ones of the individual static saturable core logic elements.
  • the second part is directed to the manner in which the logic elements may be interconnected with each other and combined with various indicator devices to perform the different annunciator functions in annunciator systems embodying this invention.
  • the logic elements used in the annunciators disclosed are of the static type, since they give important advantages over the relays used in prior annunciators.
  • the static logic elements shown and described herein are made up of all static parts such as diodes, magnetic cores and resistors. While these particular elements, and the specific arrangements thereof, are an important part of the specific aspects of the invention; it is to be understood that the broader aspects of the invention may be utilized through the use of other arrangements of these and/or other static parts.
  • Diflerent nomenclature may be used for the various static logic or decision elements and their functions as used in the invention, and the names which have been chosen for use herein are as set forth below.
  • a NOT-MEMORY is a memory comprised of a plurality of static NOT elements.
  • FIG. 1 of the drawing is directed to the body of one unit of an annunciator system embodying this invention for monitoring one point and includes schematic diagrams of typical OR elements OR 71 and OR '73, a NOT element N10, a two-input AND element All, a NOT- MEMORY element NM12 and a two-input AND amplifier A13. Power is supplied to these elements from the power supply unit of FIG. 2.
  • each terminal reference numeral ending in a given letter is connected to the output terminal of the power supply unit of FIG. 2 having a reference numeral ending in the same letter.
  • the two-input AND element All is comprised of a central saturable core 14 having a gate winding 15 and a reset winding 16.
  • the reset circuit may be traced from terminal 52A, which is supplied with power from terminal 17A of the transformer (FIG. 2), through winding 16, rectifier 18, terminal 37, rectifier 19, input conductors 2t 21, 22 and 23, terminal 38, rectifier 24 to common 25B, common 26B (FIG. 2) and terminal 27B of the transformer. If this switching element All were a single input AND, no other reset circuit would be provided; however, another input conductor 30 of the two-input AND provides a second possible reset circuit for the reset current for winding 16.
  • This second reset circuit may be traced from terminal 52A through winding 16, but now deviates through rectifier 28, terminal 39, rectifier 29, conductor 30 and input terminal 19512.
  • An inputsignal may be applied to input terminal 195L by a connection from terminal 196L (FIG. 2) rectifier 1W7, rectifier 198 to common 199B.
  • rectifiers 24 and 19 are forward biased rectifiers and therefore common 258 is'always slightly positive with respect to terminal 37.
  • reset current can in effect flow through rectifiers l9 and 24 in the reverse direction to accomplish reset of the core in the manner set forth above.
  • the above-identified high voltage negative bias circuit is also identified as a non-linear resistance circuit be- 7 cause the rectifiers l9 and 24 are reverse biased when a is applied through conductor 30.
  • terminal 37 and 39 are more positive than common and thus block the reset exciting current.
  • the rectifier 2a is thus reverse biased.
  • the potential difference between input voltages, the reset supply voltage and the negative bias passes a current through resistors 40 and 52.
  • the gating circuit for the AND element All may be traced from winding terminal 46D, which is energized from transformer terminal 45D, through winding15, rectifiers 47 and 4S, and common 49B and transformer common 263 to transformer terminal 273.
  • Rectifier 48 is the non-linear element for the gate winding and is structurally and operationally the same as the hereinbefore'discussed non-linear devices.
  • This non-linear resistance circuit may be traced from transformer terminal 27B, common 26B, common 49B, rectifier 48, resistance 56, terminal 51B and transformer terminals 52E and 53B.
  • the core 14 traverses through its rectangular hysteresis loop each cycle.
  • the previously described gating circuit drives the core 14 toward positive saturation when the gate voltage goes positive, the gate voltage being a sine wave.
  • the non-linear resistance circuit voltage across resistor St is going negative to cause a current to flow in the forward direction through rectifier 43 in the manner hereinbefore described.
  • the rectifier 47 blocks the current flow attempting to drive the core towards negative saturation.
  • the reset voltage also a sine wave, is positive and drives the core toward negative saturation in the manner hereinbefore discussed.
  • the nonlinear circuit voltage across resistors 40 and 52 is going negative causing a current to flow in the forward direction through the non-linear resistance circuits.
  • the core alternates between positive and negative saturation.
  • FIG. 2 is a schematic diagram of the power supply or transformer circuit, referred to in part in the above description of the reset and gating circuits, which may be used to provide the hereinbefore mentioned out-of-phase relationship between the gate voltage and the reset voltage, and also provide the in-phase relationships between each of these voltages and its attending negative bias circuit.
  • An alternating current source 53 is suitably connected to the primary winding 54.
  • the secondary winding 55 is provided with seven taps, namely, end taps 53B and 43C, center tap 27B and intermediate taps 56F, 17A, 57G and 45D. Center tap 27B is used as common.
  • the taps may be positioned to to centertap 273.
  • the symbol 0 indicates all points which have the same phase relationship at any instant while the symbol at represents all points which are 180 out of phase with the points 0 at the same instant.
  • intermediate tap 56F is a gate supply voltage 180 out-of-phase With gate voltage supply tap 45D to provide opposed phase taps, to be selected at will, for proper connection for accomplishing this type of phasing relationship.
  • intermediate tap 57G is a reset voltage 180 out of phase with reset voltage supply tap lllA.
  • an output is produced by preventing reset of the core by blocking rectifiers 23 and 13 'm the reset circuit thereof. This is done by feeding in a signal of the same phase and of greater amplitude than the reset voltage, through rectifiers l9 and 29. In this instance, 15 volts, the value of the gate supply voltage, is suitable as a blocking voltage. This blocking voltage prevents the reset voltage from accomplishing reset. Since the core 14 is thus already at positive saturation, it cannot support any positive voltage and will, therefore, gate an output when the gate voltage goes positive on the next half cycle. If either one of the rectifiers 18 or 28 are not blocked, reset of the core 14 can occur therethrough and no output will appear.
  • the two-input AND amplifier A13 is operationally identical with the hereinbefore described two-input AND circuit All. Structurally, the AND element and the amplifier differ only in respect to minor changes such as the number of windings on the saturable core which can be changed to provide a higher output power. Other changes in structure and material to provide a higher power output will be obvious to one skilled in the art.
  • the two-input AND amplifier A15 is comprised of a saturable core 5%, a reset winding 57 and a gate Winding 58.
  • the reset circuit may be traced from transformer 57G, reset terminal 536, winding 57, rectifiers 58, 59 and dil, conductor till, terminals 62 and 63, non-linear element 48, to common 49B and transformer terminals and 2719. It may be noted that this circuitry provides for in-phase operation with respect to the gate circuit of AND element All serving as the driving circuit or input circuit through conductor 61 to the amplifier A33.
  • the negative bias circuit for the reset circuit may be traced from transformer terminal 273, common 263, common 43B, rectifier or non-linear element 43, conductor 64-, terminal 62, conductor 61, rectifiers 6i) and 59, terminal 65, resistor 66, terminals to and 66B and transformer terminals 52B and SEE.
  • Rectifiers 60 and 69 are connected at terminal 7i? so that either one or both may provide an output through rectifier 59 to block the reset voltage through rectifier 58. Accordingly, rectifiers dd, 69 and terminal "ill comprise an OR element 01171 which in turn constitutes one input of the two-input AND amplifier A13.
  • the other input of the AND amplifier Alli-l is provided through rectifier 72, which in turn is connected to the output of an output of an OR element OR'73 having an input through either of rectifier 7 or rectifier 75, which are
  • an alternate reset circuit for Winding 5'7 may be traced from transformer terminal 576, winding terminal 586, Winding 57, terminal 77, rectifiers 78, 72 and 74-, terminal '79, conductor terminal fil, conductors 23, 22 and 21, terminal 32-, conductor 83, terminal 84, rectifier $5, to common 86B and transformer common 26B and terminal 278.
  • the negative bias circuit may be traced from common 863 back through the previously traced reset traced reset circuit to rectifier 72, terminal $7, resistor 8%, terminals 67 and dtlE to transformer terminals 52E and 53E.
  • the gate circuit of the amplifier A13 may be traced from transformer terminal 56?, winding terminal 8%, winding 5%, rectifier sea, terminal 3%, non-linear element 61, to common 62B, and transformer common 26B and terminal 273.
  • the negative bias circuit may be traced from transformer terminals 27B and common 263 to common 62B, non-linear element 61, terminal 60, resistor 89, terminal 9iiC and transformer terminals 42C and 43C.
  • the NOT circuit Nlil differs from the two-input AND circuit All in that it has only one input and no reset supply voltage is provided for the core 91.
  • the core )1 is then generally at positive saturation and an output occurs through terminal Q4 and conductor for each gating half-cycle.
  • reset of core 91 occurs th ough terminal 96, reset winding 9'7, terminal 93, and the non-linear resistance circuit comprised of terminal 99E, resistance fill), non-linear element Till and common NE.
  • T he non-linear resistance circuit is connected appropriately across transformer common 26B and negative bias terminal 52E.
  • the gating circuit may be traced from transformer terminal 56F, terminal 3F, gate winding @3, rectifier 1%, terminal $4, non-linear element 35 and common to transformer common 265.
  • the non-linear resistance circuit may be traced from trans former common 268, common 36B, non-linear element 35', terminal 94, resistor lltid, terminal 295 to transformer terminals 42C and In this NOT circuit Nftl, conductor 33 and rectifier 34 are ineffective and are included only because such structure becomes useful when two such NOT circuits are interconnected to form a NOT-It ZEMORY as at element NMTZ as hereinafter described.
  • the NOT-MEMORY circuit MMTZ is comprised of two NOT circuits Nl'ZH and NTZK, each identical in structure and operation to the NOT circuit Nltl' as hereinbefore described.
  • the NOT circuit NTZH includes a core 1%, an input reset winding N7 and a gate winding Ttlfi.
  • the input-reset circuit may be traced from positive input terrmnal ill, reset winding 167, then to a non-linear resistance circuit comprising a non-linear element 112 and resistor $.13 connected through common 114B and terminal 115C to the transformer common 26B and terminal 42C respectively.
  • the gate circuit may be traced from transformer terminal 452), gate terminal lid, gate Winding 163, rectifier 1T7, terminal 84, to common 863 through nondinear element 85.
  • the non-linear resistance circuit also includes resistor ill-.3 connected to terminal llli E, and transformer terminal 52E. When no input signal is present at terminal ill to actuate reset coil 167, an output is gated to conductor 83.
  • the other NOT circuit NTZK includes a saturable core 120, an input-reset Winding 122i and a gate winding 44.
  • the input-reset circuit may be traced through positive input terminal 122, reset winding 121, then to common 12433 through non-linear element 123.
  • the non-linear resistance circuit may be traced from transformer common 26B, and common through non-linear element 123, resistor 125 to terminal 126E and transformer terminal 52E.
  • the gate circuit maybe traced from transformer terminal 56F to gate terminal 127R gate Winding 44, rectifier 128, terminal 38, non-linear element 24 to common 25B and transformer common 263.
  • the non-linear resistance circuit maybe traced from common 25B, non-linear element 24, terminal 3%, resistor T29, terminal 139C to transformer terminal
  • the NOT circuits N 12H and N121 are interconnected to form the NOT-MEMORY circuit NMlZ.
  • the output of each NOT circuit is connected to the input of the other.
  • output conductor 13 ⁇ . of NOT circuit N12K is connected to input terminal 111 of NOT circuit NlZH through terminal 81, conductor 23, terminal 132, conprised of rectifiers 137 and 1 2i Rectifiers M and 11-39 are connected to inputs external of the NOT-MEMORY system.
  • NOT-MEMORY circuit In the operation of the NOT-MEMORY circuit, if no input signal is present through rectifier lid to the reset winding 107, core 106 is not reset and thus a half-cycle later the gate circuit including winding M28 gates an output through the conductors 83, 21, 22, 23 and 13s to rectifier 137 and reset winding 121 of NOT circuit NllZK to thus reset core 120. A half-cycle later, the gate circuit of NOT circuit NTZK including winding 44 does not gate an output through rectifier 128, and conductors 131, "23, 22, and 134. Thus NOT circuit NIZH has no input and therefore has an output to again reset core 121 in NOT circuit NlZK. This stable condition is therefore selfsustaining.
  • the output is a half-wave voltage in phase with the gate voltage to winding of NOT circuit NTZH.
  • This output appears external-1y of the NOT-MEMORY circuit through terminal 82 to conductor 20, and through terminal 81, to conductors 3t 1% and T47. If an input voltage is now applied through rectifier 116 to reset winding 107 of NOT circuit NIZH, core 1% will reset.
  • a half-cycle later no output appears from NOT circuit NllZH across conductors 83, 21, 22. and 136 to the inputreset Winding of NOT circuit NTZK and thus core 12% is not reset.
  • a half-cycle later, NOT circuit NlZK gates a second output through winding 44 and rectifier 12% to conductor 131, which second output is opposite in phase to the first output.
  • the second output appears externally of the NOT-MEMORY circuit through terminal 81 to conductors 8t and 141, and through conductors 23, 22 and 21 to terminal 82 and then to external conductor 20.
  • This second output also resets core 106 of NOT circuit N12H through conductors 131, 23, 2.2, 134, rectifier 135 and input-reset winding 1657 so that NOT circuit NdZI-l will have no output on its gating half-cycle. Even though the input is removed, the output remains stably in this condition. The output may be shifted back to the original phase'by presenting an input voltage to NOT circuit NlZK through conductor 142 and rectifier 1% of the OR element OR139. It is to be noted that normally the NOT- MEMORY has an output of either one phase or the other. However, only one of these outputswill be eitective with respect to any other static element to be driven thereby.
  • ANNUNCIATOR SYSTEMS The plurality of saturable core switching devices hereinbefore described are interconnected with each other and combined with various indicator devices to comprise annunciators embodying this invention as shown in FIGS. 3 through 7.
  • Each of these annunciators to be described hereinafter is comprised of an alarm or audible indicator system, a light or visual indicator system and an acknowledge system.
  • These individual systems difier in detail firorn one annunciator to another, but the basic cooperation between systems is common to all disclosed annunciators and follows the operation pattern of Chart l.
  • Normal states 1 and 4 are the same thus indicating that the annunciator system returns to normal when the sensing device return to normal. Accordingly, the annunciator system may go directly irom state 2 to state 4, omitting state 3, when the abnormal condition is corrected before the acknowledge signal is provided.
  • FIG. 1 discloses one mode of interconnecting the various static logic elements to provide the annunciator functions set forth in Chart 1.
  • PEG. 3 is a symbolic diagram of the system of FIG. 1 showing the same interconnections between the logic elements, but showing the logic elements in symbolic form, and additionally showing the various indicator devices combined therewith to provide the dusired annunciator signals.
  • the annunciator system of FIG. 1 and FIG. 3 is constructed to respond to an abnormal condition as indicated by the presence of a normally absent signal and may be driven by direct current or full wave rectified direct current of a proper voltage and phasing to provide a proper input for the static logic circuits hereinbefore described.
  • the output through normally open contact 143 of a trouble sensing device is connected to the input of NOT element N10 through conductor 31 which contact when closed provides NOT element N16 with a signal from terminal 1%L of transformer-rectifier direct current source 2% (shown in detail in FIG. 2
  • the output of terminal .1961. is also connected at terminal 1951. to one input of AND element Alli through conductor 34
  • the output of NOT element N10 is connected to a conductor 146 providing a signal to other equipment (not shown) when a signal from the sensing device is not present, and could be used to automatically start or stop such other equipment as may be desired.
  • the output'of NOT element Nlltl also is connected to one input of NOT-MEMORY element NMlZ through conductor 95.
  • An acknowledge switch 144 is connected to the other inputof NOT-MEMORY element NMTZ through conductor 1.42, which switch when closed provides NOT-MEMORY element NMTZ with a signal from terminal 292 of transformer-rectifier direct current source 2M (FIG. 2).
  • One output of the NOT-MEMORY element NMlZ is connected to the other input of AND element All through conductor 26.
  • the AND element Ali output is connected through conductors 6d and 21.45 and through OR element'ORlfid to drive a horn amplifier'and a horn.
  • the A11 output is also connected to one input of OR element 01171 through conductors 6d and 61.
  • the second output of the NOT-MEMORY element NMlZ is connected to a shut down element (not shown) for other equipment through conductors 141
  • the second NOT-MEMORY output is also connected first to Y the second input of OR element OR71 through conductors 8t and 147 and, second, to the first input of OR element ORIS through conductors 8d and M8.
  • the second input Zltl of OR element 01173 is connected to the output from flasher unit 221 for providing an output to the other input of the AND amplifier A13 through conductor 158.
  • the AND amplifier A13 output is connected to actuate an indicator such as a lamp L through conductor 1521.
  • the lamp is connected in series circuit relationship with a resistor arouses 152.
  • a suitable direct current source of power such as may be supplied by taps 45D and 5635 of the transformer of FIG. 2 through rectifiers 2&3 and 2% respectively, is connected to resistor T52 and across the lamp to common to provide the dimly lit visual signal of the normal state hereinbefore described. It is obvious that the voltage value and resistor value may be adjusted to provide any desired degree of contrast between the dimly lit condition and the steady bright condition.
  • the normal dimly lit condition of the lamps eliminates the necessity of periodically testing the lamps.
  • contact 143 closes to provide a signal of proper voltage and phase to the input of the annunciator.
  • a practical voltage of 15 volts may be provided through a step-down transformer and rectifier 2953 (FIG. 2) having a primary coil energized by the alternating current source 53 of PEG. 2.
  • This signal provides an input to NOT element Nit) which then gates no output to the NOT-MEMORY element NMTTZ.
  • the removal of the NOT-MEMORY input in this manner does not eflect its output because of the hereinbefore described memory feature and accordingly the NOT-MEMORY continues to gate an output of proper phase to one input of the AND element All.
  • the closed contact 143 also provides an input signal to the other input of the AND element All.
  • the AND element All gates an output to sound the horn.
  • the AND output also drives an input or" the two-input AND amplifier A13 through the OR element OR71.
  • the flasher 221 provides a periodic output to the other input of the two-input AND amplifier A13 through the OR element OR73. The last two mentioned inputs cooperate to provide a periodic output from the AND amplifier A13 to flash the light.
  • the flasher 211 is connected into the circuit of the lamp on the input side of the amplifier A13.
  • This makes it possible to use a flasher of low-energy output, which is small and compact and still use a single flasher for supplying a substantial number of annunciator points as is described hereinafter.
  • This advantageous result is obtained because the flasher does not have to supply the energy for lighting the lamps, since this energy is supplied to the amplifier A13 (referring to FIG. 1) at the terminal 8? of the gate winding 53, from the terminal 56E of the power supply unit, shown in FIG. 2.
  • each lamp requires 350 milliamperes at 4 volts half-Wave direct current, so that the flasher would have to handle 3500 milliamperes, if 10 lamps might be lighted simultaneously and flashed directly by the flasher.
  • the current required of the flasher for each point is only 6 ma; or 60 ma. if the lights at ten points might have to be flashed, compared With the current of 3500 ma. which would otherwise be required for the ten points. This makes possible the use of a small low cost flasher which uses only static parts.
  • each amplifier need have an output of only 350 ma. and may also be of low-cost static parts and of the type which is frequently used as a preamplifier at the input of a larger amplifier; which is not required in the lamp circuits of the arrangements described herein.
  • contact 143 opens to terminate an input signal to the AND element All and to the NOT element N19.
  • the NOT element Nld thus gates an output to the first mentioned N OT-AEMORY input causing the NOT-MEMORY output to reassume its initial phasing to provide a driving input for one input of the AND element A11.
  • the same phase change occurs simultaneously in the NOT-MEM- ORY output leading to the AND amplifier A13; however, this output is now out-of-phase with the AND amplifier reset voltage and thus effectively constitutes no input for the AND amplifier
  • the AND amplifier A13 gates no output to thus terminate an output to the light.
  • the lamp L now glows dimly in the circuit including resistor 152.
  • FIGS. 4 through 7 there are disclosed block diagrams of modified annunciators.
  • each system is shown as monitoring a single point, but it will be understood that the equipment individual to each point will be duplicated for other points and that a single horn circuit, a single flasher and a single reset or acknowledgement switch may be used in common to all, or a group, of the monitored points, as shown and described in detail in connection with PEG. 3.
  • FIG. 4 there is disclosed a symbolic diagram of an annunciator having static logic elements of the same type as disclosed in FIG. 1.
  • the static logic elements are interconnected in a different fashion but cooperate to perform the same functions as that of the FIG. 1 annunciator.
  • the annunciator of FIG. 4 differs from that of FTGS. l and 3 in that it is adapted to respond to the absence of a normally present signal. It will be obvious to one skilled in the art how the static logic elements of the type shown in FIG. 1 may be interconnected in the manner illustrated in PEG. 4 and described in the following matter relating thereto.
  • a trouble sensing device (not shown) operates to open normally closed contact 156 to terminate the input signal to NOT element N157 through the OR element 011158, thus causing NOT element N157 to gate an output to the horn ampliher and horn to thus sound the audio indicator.
  • the NOT element N157 output also drives a two-input AND element A159 in cooperation with the flasher output provided at the other input of the AND element AND A159.
  • AND amplifier A161) then gates a periodic output to change the lamp signal from a steady dim condition to a flashing bright condition.
  • the termination of the input .to the NOT-MEMORY element NM161 has no effect upon its output, therefore, it continues to effectively gate no output with respect to the NOT element NOT N157 and the AND amplifier 161).
  • NOT-MEMORY element Nit 1161 gates an effective output through the OR element O'R158 to cause the NOT element NOT N157 to terminate its output to the audio system thus silencing the horn.
  • the NOT-MEMORY element Nit i161 output changes the lamp condition from one of flashing bright to one of steady bright through the OR element OR164- and amplifier A166. Elimination of the abnormal condition closes the contact 156 to restore an input signal to the NOT-MEMORY element NM161 and the NOT element N157.
  • the NOT-MEMORY element NM161 then returns to its previous condition of no effectwo output thus eliminating an input to the preamplifier A169 and permitting the lamp to return to its steady dim condition in its circuit including resistor 163.
  • NOT element N157 then gates no output and thus permits the audio signal to remain in a silenced condition.
  • the no output condition of NOT element N157 provides no input at one terminal of the AND element A159, thus prohibiting AND element 159 from gating an output to drive preamplifier A166. The light remains in a dim condition.
  • Conductor provides a shutdown signal, if desired.
  • the acknowledge switch 162 and the audio indicator may be connected in common with a plurality of annunciators in the same manner as disclosed in FIG. 3. It is obvious that if an abnormal condition is eliminated before the acknowledge switch is closed, the hereinbefore d scribed operations of the static logic element causing a change in signal from steady dim to flashing bright are reversed and the annunciator again assumes a normal condition.
  • FIG. 5 there is disclosed in block diagram, a further embodiment of the invention in an annunciator having the same type of static logic elements described in detail with respect to FIG. 1.
  • the logic elements are interconnected in a manner not hereinbefore described, but cooperate with each other to perform the same annunciator functions as the foregoing annunciator systems.
  • This annunciator responds to an abnormal conglows dimly in its circuit including resistor 174.
  • a trouble sensing device (not shown) operates to open a normally closed I contact to thus terminate an input signal through the OR element OR166 to NOT element N167 thus causing it to gate an output to actuate the horn amplifier and horn.
  • NOT element N167 also provides an input to AND element A168 which gates an output to one input of the two-input AND preamplifier A169. through the OR clement OR17t).
  • the flasher provides a periodic input to the other input of the AND preamplifier A169 through the OR element OR171 which cooperates with the first mentioned AND preamplifier input to cause the preamplifier to gate an output to periodically energize the lamp to thus provide the flashing bright condition.
  • NOT-MEMORY element NM172 which continues to gate an ineffective output with respect to NOT element N167. If the operator now closes acknowledge switch 173, NOT-MEMORY element NM172 now is actuated to its opposite gating condition and now gates an effective output to NOT element N167 causing it to gate no output to thus terminate the signal to one input of the AND amplifier A169. The lack of a NOT element N167 output likewise terminates the signal to the audio signal system thus silencing the horn. The same NOT- MEMORY output also now provides a steady effective signal to both inputs of the AND amplifier A169 through each of the elements 011176 and OR1'71.
  • AND amplifier 169 now gates at steady output causing the lamp to assume a steady bright condition. Elimination of the abnormal condition causes the sensing device to recl'ose switch 165, in which event an input signal is reapplied to the opposite terminal of NOT-MEMORY element NM172 reversing its output condition thus producing an ineffective output with respect to NOT element N167 and with respect to the two inputs of amplifier A169.
  • the reclosed switch also provides an input through the OR element OR166 to NOT element N167 which now gates no output to either audio or visual signal,
  • the lamp now If the abnormal condition should be corrected before the acknowledge switch is closed, it is obvious that the hereinbefore described operations of the static logic elements causing a change from a dimly glowing visual condition to a flashing bright condition combined with sounding audio alarm are reversed.
  • Conductor 205 provides a shutdown signal if desired.
  • the indicator silence switch 1'73 and the audio system may be connected in common with a plurality of annunciators in the same manner as disclosed in FIG. 3.
  • FIG. 6 there is disclosed in block diagram a further embodiment of the invention in an annunciator having the same type of static logic elements described in detail with respect to FIG. 1.
  • the logic elements are interconnected in a manner not hereinbefore described, but cooperate with each other to perform the same annunciator functions as the foregoing annunciator systems.
  • This annunciator responds to an abnormal condition as indicated by the presence of a normally absent signal.
  • the annunciator of FIG. 6 may respond to an annunciator input signal consisting of direct current, alternating current, one-half wave direct current or full wave direct current as desired- In the annuncia-tor system of FIG.
  • a trouble sensing device (not shown) operates to close a normally open contact 175 to provide an annunciator input signal in a first direction to NOT element N176 and in a second direction through the OR element OR177 to one input of the two-input AND amplifier A178.
  • NOT element N176 ceases gating an output through the OR element 011179 to one of the plural inputs of AND element A195.
  • the remaining two inputs of AND element A195 shown unconnected to other devices, lead 13 from the outputs of similarly arranged OR elements in other annunciator systems (not shown) of the same type as the annunciator now described, wherein an abnormal condition at the monitored point provides a signal through the respective OR elements as through the OR element OR179 as above described.
  • NOT element N176 also ceases gating an output to NOT-MEMORY element NMlSl; however, the absence of an input signal to NOT-MEMORY element NM181 has no effect on NOT-MEMORY element NM181 which continues to gate an ineffective output to AND element A182 and to the two input terminals of the two-input AND amplifier A178 through the OR elements OR177 and OR183.
  • the annunciator input signal provided through contact 175, provides an input signal to one input of the AND amplifier A178 through the OR element OR177, which input cooperates with the periodic input to the other AND amplifier input provided by the flasher unit to cause the AND amplifier A173 to gate a periodic output causing previously dimly glowing lamp to assume a flashing bright condition.
  • NOT-MEMORY element NMT-Sf If the operator now closes acknowledge switch 184, an input signal is provided at the other input of NOT-MEMORY element NMT-Sf which then reverses its output condition to now gate an eliective out- "put to both inputs of the two-input AND amplifier A178 through the OR elements OR177 and ORiidd to provide a steady output which changes the lamp condition from flashing bright to steady bright.
  • NOT- MEMORY element NM181 gates an effective output to AND element A182; which gates an output through the OR elements OR179 and and A195 to NOT element N180.
  • NOT element N180 now ceases to gate an output and thus the audio alarm is silenced.
  • contact 175 opens to terminate the input signal to NOT element N176 which then gates an output through the OR element 012179 to provide an input for NOT element NlSti which in turn is prevented from gating an output to sound the audio system.
  • the output from NOT element N176 provides an input to the opposite input of NOT-MEMORY element NMlSll which reverses its output condition to gate an ineffective output with respect to AND amplifier Ai'i'S and AND element A182.
  • the termination of the annunciator input signal likewise interrupts the input through the OR element R1l77 to one input of the AND amplifier A178 thus preventing the AND amplifier from gating an output to the lamp signal system. If the abnormal condition should be eliminated before the acknowledge switch is closed, it is obvious that the operations of the static logic elements which change the condition of the lamp from one of dim glow to one of flashing bright are reversed.
  • Conductor 206 provides a shutdown signal, if desired.
  • FIG. 7 there is disclosed in block diagram 21 further embodiment of the invention in an annunciator having the same type of static logic elements described in detail with regard to FIG. 1.
  • the logic elements are interconnected in a manner not hereinbefore described, but cooperate with each other to perform the same annunciator functions as the foregoing annunciator systems.
  • This annunciator responds to an abnormal condition as indicated by the absence of a normally present signal.
  • the annunciator of FIG. 7 responds to either direct current or full-wave direct current provided through contact 185 of the trouble sensing device (not shown).
  • a trouble sensing device responds to an abnormal condition to open normally closed contact 185 to thus terminate the annunciator input signal to one input of NOT-MEMORY element NMlifie which is unaffected by the interruption of its input signal and therefore continues to gate an ineffective output.
  • the aforementioned termination of the annunciator input signal through contact 185 provides no input through the OR element ORltis to NOT element N187 to cause NOT element N187 to thus gate an output which actuates the horn amplifier and sounds the horn.
  • the aforementioned termination of the input signal through contact 185 performs a third action in terminating the input through the OR element 03.189 to NOT element Nlti thu causing NOT element NlQtB to gate an output through the OR element 011191 to provide an input to the one input AND amplifier A192 which gates an output to actuate the lamp.
  • the flasher is providing a periodic input to NOT element N199 which now gates a periodic output through the OR element ORE to AND element A192. to cause the lamp condition to change from a steady dim condition to a flashing bright condition.
  • NOT-MEMORY element NMldo which causes it to now gate an eifective output in a first direction through the OR element (Bi-119i to AND element A332 causing an output which provides a steady bright lamp condition, and in a second direction through the OR element ORlLSi-B to provide an input for NOT element N187 which then gates no output to thus deactuate the horn amplifier and silence the horn.
  • the sensing device closes its contact 3185 which provides an annunciator input in a first direction to the other input of NOT-MEMORY element NME o causing it to reverse its output condition to gate an ineffective input with respect to AND element A192 amplifier to tend to terminate the steady bright lamp condition and with respect to NOT element N187 tending to cause it to gate an output to sound the horn.
  • the annunciator input takes a second direction through the OR element OR139 to NOT element N causing NOT element N 1% to gate no output through the OR element ORTEBT to AND element A192 thus permitting the lamp to return to its normal dim condition in its circuit including resistor 194.
  • the flasher is ineffective since NOT element N195 is now provided with a steady input.
  • the annunciator input takes a third direction through the OR element ORESS to NOT element N137 causing a no-output condition to deactivate the horn amplifier and silence the horn. If the abnormal condition should be eliminated before the acknowledge switch is closed, it is obvious that the operations of the static logic elements causing the lamp to change condition from dim to flashing bright and causing the audio system to change from a silenced condition to an audible condition, are reversed to cause the annunciator system to reassume a normal condition.
  • Conductor 2&7 provides a shutdown signal, if desired.
  • a plurality of annunciators of the type shown in FIG. 7 may be connected in common with audio silence switch 1% and the audio indicator in the same manner as disclosed in FIG. 6.
  • the flasher 221 disclosed in FIG. 8 provides the pulsating signal to the lamp preamplifier in the manner herein before described and is comprised of a static element oscillater stage 222 and a static element butler stage 223.
  • the oscillator stage 222 is comprised of two static magnetic NOT elements N224 and N225 interconnected with each other and a pair of resistor-capacitor circuits to provide regenerative feedback to sustain oscillation.
  • the buffer stage 223 is comprised of two static magnetic IN- HiBITED-NOT elements IN273 and IN275 interconnected with each other and connected to the oscillator to provide high output power, to isolate the oscillator from its load, and to provide a fast switching action.
  • the first NOT element N224 is comprised of a magnetic core 226 having a gating winding 227 which may be energized from transformer terminal 56F (FIG. 2) which may be connected to flasher terminal 22% Ga, conductor 229, winding 27, rectifier rectifier 231 of non-linear impedance 232, common conductor 2335 and flasher terminal 234 Ca which may be connected to transformer common terminal 263.
  • the non-linear impedance includes transformer terminal 525, flasher terminal 235 Gb, conductors 23-5 and 236.1 rectifier 237, rectifier 231, conductor 233, terminal 234 Ca, and transformer terminal 26B. Rectifier 23th and nonlinear impedance 232 connect gate Winding 227 to output terminal 24%.
  • the NOT reset winding 22% is connected to a NOT input terminal 238 in circuit with a rectifier 239, rectifier 241 of non-linear impedance 242, conductor 233, terminal 23401, and transformer 263.
  • winding 228 is energized in response to a positive signal applied to NOT input terminal 233.
  • the non-linear impedance includes transformer terminal 268, flasher terminal 2346a, conductor 233, rectifier 241, resistor 311, conductor 229, flasher terminal 228 Ga and transformer terminal 26B.
  • the NOT element N225 of oscillator 222 is comprised of a magnetic core 312 having a gating winding 243 which may be energized from transformer terminal 55D, through flasher terminal 235Gb conductor 2%, winding 243, rectifier 22 i, rectifier 245 of non-linear impedance 246, common conductor 233a, flasher terminal 234Ca and transformer terminal 26B.
  • the non-linear impedance 246 includes transformer terminal 26B, flasher terminal ZIdCa, conductor 233a, rectifier 2 35, resistor 247, conductors 229a and 229, flasher terminal 223Ga and transformer terminal 42C. Rectifier and impedance 246 connect gate Winding 24?: to output terminal 253.
  • the magnetic core 312 is also provided with a NOT reset winding 247 connected to NOT input terminal 248, rectifier 249, rectifier 251 of non-linear impedance 25ft ⁇ , conductor 233a, flasher terminal 23401, and transformer terminal 263.
  • reset Winding 247 is connected to respond to a positive input, applied at NOT input terminai 248.
  • the non-linear impedance25tt includes transformer terminal 26B, flasher terminal 23 5061, conductor 233a, rectifier 251, resistor 252, conductor 2%, terminal 235Gb and transformer terminal 45]).
  • the output terminal 2% of NOT element N224 is connected through a capacitor 254 to the NOT input 248 of NOT element N225.
  • the capacitor 254 is also connected in circuit with a resistor 255 annd rectifiers 256 and 259 which complete a hereinafter described discharge circuit for capacitor 254.
  • the output terminal 253 of NOT element N225 is connected through a capacitor 257 to the NOT input 238 of NOT element N222.
  • Capacitor 257 is also connected in circuit with a resistor 258 annd rectifiers 259 and 256 which complete a hereinafter described discharge circuit for capacitor 257.
  • the output terminal 2% of NOT element N224 and the output terminal 253 of NOT element 224 are each connected to an input of the buffer stage 223 in a manner hereinafter described.
  • the first static INHIBITED- NOT element 1N273' is comprised of a magnetic core 269 having a gate winding 261 and a reset winding 2h2.
  • the gate winding 2551i. may be energized from transcases former terminal 45D, through flasher terminal 235Gb, conductors 236 and 236a, winding 2X1, rectifier 263, rectifier 264 of non-linear impedance 265', conductor 233, flasher terminal 234Ca to transformer terminal 263.
  • the non-linear impedance 265 includes transformer terminal 26B, flasher terminal 2340a, conductor 233, rectitier 26 d, resistor 26s, conductor 229 flasher terminal 2286a and transformer terminal 565.
  • Rectifier'263 and non-linear impedance 265 connect gate winding 261 to output terminal 267. Thereset winding is connected to NOT input terminal 268 through rectifier 269, reset Winding 262, INHlB-TT input terminal 27d, rectifier 2'71 of non-linear impedance 272, conductor 23 3, flasher terminal ZS-tCa to transformer terminal 268.
  • the nonlinear impedance 272 includes transformer terminal 263, flasher terminal 23401, conductor 233, rectifier 271, resister 2'74, conductors 236a and 236, flasher terminal 235Gb and transformer terminal 45D.
  • the other INHIBITED-NOT element IN275 is comprised of a magnetic core 276, a gate winding 277 and a reset winding 278.
  • the gate winding 277 is energized from transformer terminal 56F, flasher terminal 228cm, conductors 229 and 22%, winding 277, rectifier 279, rectifier 28d of nondinear impedance 281, conductor 233a, flasher terminal 234Ca, to transformer terminal 268.
  • the non-linear impedance includes transformer terminal 263, flasher terminal 234Ca, conductor 233a, rectifier 239, resistor 282, conductor 236, flasher terminal 235 and transformer terminal 45D. The rectifier 279 and non-linear impedance 28?.
  • the reset winding 27% is connected to NOT input terminal 268 through rectifier 283', and is connected through INHIBIT input terminal 284, rectifier 285 of non-linear impedance 286, conductor 233a, and terminal 2340a to transformer terminal Ca.
  • the non-linear impedance 286 includes transformer terminal 26B, flasher terminal 2340a, conductor 233a, rectifier 285, resistor 22%), conductors 229a and 229, flasher terminal 223 and transformer terminal 5 6 F.
  • the output terminal 241 of the oscillator 222 is connected through rectifier 287 to the INHIBIT input terminal 270 of the buffer stage 223.
  • the output terminal 253 of the oscillator 222 is connected through rectifier 2% to the TNHIBIT input terminal of the buffer stage 223.
  • NOT element N224 is gating an output signal through output terminal 240 to NOT element N225 to 257. Additionally, capacitor 257 may discharge through rectifier 256 through the transformer windings connected across terminals 2288a and 2346a.
  • the NOT element N224 thus receives no effective input to reset its core 226 and accordingly continues to gate an output to capacitor'254. As capacitor 254 continues to charge, it eventually blocks the reset signal to NOT input terminal 24a; and at the same time reduces its own charging rate.
  • NOT element N225 The termination of the NOT input to reset winding 247 causes NOT element N225 to begin gating an output through its output terminal 253' to begin charging capacitor 257 and to cause reset of core 226 through NOT input terminal 233.
  • the NOT element 222- noW ceases gating an output through 249, thus permitting charged capacitor 54 to discharge through terminal 243, rectifier 237, resistors 237 and 2'74, conductors 236a and 236, rectifier 256 and resistor 255 back to capacitor 254.
  • capacitor 254 may discharge through rectifier 259 through terminals 228Ga and 235Gb connected across the transformer.
  • the NOT element N225 thus receives no effective input to reset its core and accordingly continues to gate an output to reset core 226 of NOT element N224 and to continue charging capacitor 257.
  • the NOT element N224 begins gating an output to begin a new cycle of operation and thus the NOT elements N224 and N225 cooperate to provide the desired oscillations.
  • the output through terminal 240 also is providing a signal through rectifier 287 to INHIBIT terminal 270 of INHIBITED-NOT element IN27 3 in the buffer stage 223.
  • This INHIBIT input voltage signal is the same phase and opposite in direction to the reset voltage across reset winding 262.
  • This input signal 270 increases as capacitor 257 charges to prevent full reset of core 226.
  • the INHIBIT signal reaches a predetermined level reset of core 26% is blocked causing it to gate an output through terminal 265, 267 and flasher output terminal 2%.
  • the output signal from the IN- HIBITED-NOT element IN273 is provided through NOT input terminal 268 and rectifier 233 to reset winding 278 of INHIBITED-NOT element IN275 to thus reset core 276 which prevents gating winding 277 from gating an output through rectifier 279 to output terminal 267 and flasher output 299.
  • the INHIBITED-NOT element IN273 continues gating an output to flasher terminal 290 so long as the NOT element N224 of the oscillator stage 222 is gating an output. While NOT element N224 is gating an output, capacitor 257 is discharging to provide a signal through output terminal 253 and rectifier 288 to INHIBIT input terminal 284 in the manner previously described.
  • the NOT input signal is not blocked, as the voltage level on the capacitor is too low at this time and thus the capacitor 257 discharge signal to INHIBIT terminal 284 is insufficient to inhibit INHIBITED-NOT element IN2'75.
  • the output signal from N225 through output terminal 253 is providing an input signal through rectifier 288 to INHIBIT terminal 284 of INHIBIT ED-NOT element IN275.
  • This INHIBIT signal opposes the NOT signal to reset winding 278, thus blocking reset of core 276 which then gates an output through rectifier 279, and output terminal 267 to flasher output terminal 2%.
  • the output from IN2'75 provides a signal through NOT terminal 269 to reset winding 262 causing reset of core 260 to thus terminate its output signal to flasher output terminal 290.
  • the buffer stage 223 responds to oscillations of the oscillator stage 222 to alternately provide signals of opposite phase to the flasher output terminal 290. Accordingly, if the output terminal 290 is connected to an input terminal of a static element such as preamplifier A13 of FIG. 3 or any of the preamplifiers as hereinbefore described, the output signal from 2% will periodically be in phase with the reset voltage of said static element thus providing a pulsing on input signal.
  • a static element such as preamplifier A13 of FIG. 3 or any of the preamplifiers as hereinbefore described
  • the annunciator embodying the features of this invention is comprised of static logic elements having no moving parts, the annunciator is highly reliable in operation and requires substantially no maintenance.
  • an indicator an indicator; a two input AND element for operating the indicator; a first OR element having its output connected to one input of the AND ele ment; a second two input OR element having its output connected to the other input of said AND element; another two input AND element having its output connected to one input of the first OR element; a source of a pulsating signal having its output connected to one input of the second OR element; a MEMORY element having two in-' puts, a first output connected to one input of the said another AND element, and having another output connected to the other input of each of the first OR element and the second OR element; a NOT element having its output connected to one input of the MEMORY element; a normally opened condition responsive switch for providing a signal to the other input of said another AND element and to the NOT element; and acknowledgment means including a normally opened switch operable to provide a signal to the other input of the MEMORY element.
  • an indicator an indicator; a single input AND element for operating the indicator; a first two input OR element for providing a signal to the AND element; a two input AND element for providing a signal to one input of the first OR element; a source of a pulsatingsignal for providing a signal to one input of the two input AND element; a NOT element for providing a signal to the other input of the two input AND element; a second OR element for providing a signal to the NOT element; a normally closed condition responsive means normally providing a signal to one input of the second OR element; a MEMORY means for providing a signal simultaneously to the other input of each of the first OR element and the second OR element and having one input for receiving the condition signal and another input; and, acknowledgment means including a normally opened switch for providing a signal to the other input of the MEMORY element.
  • an indicator for providing a signal to the indicator; a first two input OR element for providing a signal to one input of the AND amplifier; a second two input OR element for providing a signal to the other input of the AND element; a source of a pulsating signal for providing a signal to one input of the first OR element; a single input AND element for providing a signal to one input of the second OR ele ment; a NOT element for providing a signal to the single input AND element; a third two input OR element for providing a signal to the NOT element; a MEMORY element having two inputs for providing a signal to one input of the third OR element and to one input of the first OR element; condition responsive means including a normally closed switch for providing a signal to the other input of the third OR element and to one input of the MEMORY element, and having one input for receiving the condition responsive means signal; acknowledgment means including a normally opened switch for providing a signal to the other input of the MEMORY element.
  • an indicator In an annunciator: an indicator; a two input AND element for providing a signal to the indicator; a first two input OR element for providing a signal to one input of the two input AND element; a second two input OR element for providing a signal to the other input of the two input AND element; a source of a pulsating signal for providing a signal to one input of the first OR element; a condition responsive means including a normally opened switch for providing a signal to one input of the second OR element; a MEMORY element having two inputs for providing a signal to the other input of each of the first and second OR elements in response to 19 receipt of a signal at one input of the MEMORY element; an acknowledgment means including a normally opened switch and operable to provide a signal to said one input of the MEMORY element; 3. NOT element for providing a signal to the other input of the MEMORY element and having its input responsive to the condition responsive means.
  • an indicator an indicator; a single input AND for providing a signal to the indicator; a first two input OR element for providing a signal to the AND element; a NOT element for providing a signal to one input of the first OR element; a second tWo input OR element for providing a signal to the NOT element; a source of a pulsating signal for providing a signal to one input of the second OR element; a MEMORY element having two inputs for providing a signal to the other input of the first OR element in response to a signal at one of its inputs; acknowledgment means including a normally opened 20 switch for providing a signal to one input of the MEMORY element; and a condition responsive means including a normally closed switch for providing a signal simultaneously to the other input of the MEMORY element and the other input of the second OR element.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
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US706687A 1958-01-02 1958-01-02 Annunciator system Expired - Lifetime US3107348A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3212078A (en) * 1962-10-12 1965-10-12 Honeywell Inc Annunciator apparatus
US3999176A (en) * 1975-04-07 1976-12-21 Westinghouse Electric Corporation Indicator light circuit providing normal and emergency indication
US4631542A (en) * 1984-09-28 1986-12-23 Cincinnati Microwave, Inc. Police radar warning receiver with mute function
US5070327A (en) * 1989-09-11 1991-12-03 Dale Ellingson Signalling mechanism

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US2625595A (en) * 1950-01-12 1953-01-13 Anderson Co Electrical signal control system
US2724104A (en) * 1954-10-06 1955-11-15 Ibm Ring check circuit
US2730704A (en) * 1955-02-14 1956-01-10 Howard C Warren Annunciator system
US2751578A (en) * 1953-02-04 1956-06-19 Ericsson Telefon Ab L M Fault indicator for plural connected devices
US2762997A (en) * 1950-01-12 1956-09-11 King Seeley Corp Gauging system with alarm means
US2807006A (en) * 1955-10-24 1957-09-17 Collins Howard William Magnetic amplifier circuits
US2824295A (en) * 1956-02-13 1958-02-18 Gen Telephone Lab Inc Annunciator system
US2832948A (en) * 1956-03-09 1958-04-29 Westinghouse Electric Corp Static annunciator
US2858528A (en) * 1957-04-24 1958-10-28 Westinghouse Electric Corp Indicating system
US2931018A (en) * 1957-05-20 1960-03-29 Panellit Inc Annunciator system

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Publication number Priority date Publication date Assignee Title
US2625595A (en) * 1950-01-12 1953-01-13 Anderson Co Electrical signal control system
US2762997A (en) * 1950-01-12 1956-09-11 King Seeley Corp Gauging system with alarm means
US2751578A (en) * 1953-02-04 1956-06-19 Ericsson Telefon Ab L M Fault indicator for plural connected devices
US2724104A (en) * 1954-10-06 1955-11-15 Ibm Ring check circuit
US2730704A (en) * 1955-02-14 1956-01-10 Howard C Warren Annunciator system
US2807006A (en) * 1955-10-24 1957-09-17 Collins Howard William Magnetic amplifier circuits
US2824295A (en) * 1956-02-13 1958-02-18 Gen Telephone Lab Inc Annunciator system
US2832948A (en) * 1956-03-09 1958-04-29 Westinghouse Electric Corp Static annunciator
US2858528A (en) * 1957-04-24 1958-10-28 Westinghouse Electric Corp Indicating system
US2931018A (en) * 1957-05-20 1960-03-29 Panellit Inc Annunciator system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3212078A (en) * 1962-10-12 1965-10-12 Honeywell Inc Annunciator apparatus
US3999176A (en) * 1975-04-07 1976-12-21 Westinghouse Electric Corporation Indicator light circuit providing normal and emergency indication
US4631542A (en) * 1984-09-28 1986-12-23 Cincinnati Microwave, Inc. Police radar warning receiver with mute function
US5070327A (en) * 1989-09-11 1991-12-03 Dale Ellingson Signalling mechanism

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