US3716428A - Method of etching a metal which can be passivated - Google Patents

Method of etching a metal which can be passivated Download PDF

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Publication number
US3716428A
US3716428A US00113924A US3716428DA US3716428A US 3716428 A US3716428 A US 3716428A US 00113924 A US00113924 A US 00113924A US 3716428D A US3716428D A US 3716428DA US 3716428 A US3716428 A US 3716428A
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Prior art keywords
metal
etching
protective layer
platinum
layer
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Expired - Lifetime
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US00113924A
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English (en)
Inventor
C Amouroux
G Peres
P Valette
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Alcatel Lucent SAS
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Compagnie Generale dElectricite SA
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes

Definitions

  • the present invention concerns the etching of a metal which can be passivated by an acid bath.
  • the acid bath is capable of etching the metal throughout its thickness, but that this etching is effective only under certain conditions relating to the previl ous treatment of the surface of the metal. This surface mustnot, for example, have been in contact with an oxidizing medium.
  • the metal is said to be passivated when no etching takes place. This passivating can be avoided by various methods, for example, by keeping the metal, from the moment it is produced until it is etched, constantly in a high vacuum or in a strictly controlled atmosphere. These processes are obviously cumbersome and expensive.
  • the problem is set more particularly, when the acid bath is to act selectively, that is, when it must simultaneously etch the metal in question and not etch another material incorporated in the same part as the metal.
  • the acid bath is to act selectively, that is, when it must simultaneously etch the metal in question and not etch another material incorporated in the same part as the metal.
  • An aim of the present invention is therefore to provide a simple method enabling the passivation of a metal which is to be etched by an acid bath to be avoided.
  • FIGS. 1 through 10 are side elevational views of a silicon plate after the successive stages of a process for producing power points on these plates, in accordance with the method of the present invention.
  • FIGS. 1-10 show a small silicon plate after the successive stages of a process for producing power points on these plates.
  • the power points taken from the silicon plate must have a resistive character, that is, they must have no rectifier effect. Moreover, their resistance must be as low as possible. Lastly, they must be very reliable, that is, more particularly, the successive layers must have high mutual adhering power, and must not undergo chemical changes during the course of time.
  • the process which will be described concerns the production of contacts on transistors for ultra-high frequencies on which the dimensions of the emitters are particularly small.
  • the extent of the area on which the emitter contact may be produced is therefore particularly small and the contour of the metal layers ensuring that contact must be defined very accurately.
  • the contacts are produced, of course, after the transistor itself, that is, after the areas having a suitable type of conductivity have been produced within the plate.
  • the silicon plate 1 is coatedwith a layer 2 of silicon oxide (FIG. 1).
  • a window 20 is opened up in the oxide layer above the area on which the contact is to be made.
  • the method used to accomplish this is wellknown a layer of photosensitive resin is deposited on the oxide layer. This layer is treated or exposed through a suitable mask, so as to make it resistant outside the window to be opened up.
  • the oxide layer is etched by a suitable bath, only the part of the layer corresponding to the window then being removed, because the rest of that layer is protected by the resin. The remaining resin is then removed and the configuration shown in FIG. 1 is obtained.
  • the process which has just been described is called photolithography.
  • the surface of the silicide in the window is deoxidized by quickly passing diluted hydrofluoric acid over it, this being followed by ten minutes of rinsing in deionized water and drying in nitrogen. Then a layer of 3 of 500 angstroms of platinum is deposited by cathode sputtering on all the surface of the plate. Thus, the configuration shown in FIG. 2 is obtained.
  • the plate is then heated to 500 during approximately 15 minutes so as to form the silicide 4 in the window.
  • Platinum silicide is used to give a low contact resistance.
  • the platinum which has not combined to form silicide is then etched by an acid solution consisting of aqua regia, that is, by a mixture of nitric acid and hydrochloric acid. Etching, which is relatively fast in itself is very long to start up, subsequent to the passivating of the surface of the platinum. It must be carried out as soon as the metal is removed from the enclosure under vacuum in which the cathode sputtering has been effected, and it is desirable to finish it in an ultrasound bath to facilitate the removal of the platinum from the edges of the window.
  • the plate is then covered successively by cathode sputtering of a SOO-angstrom layer 5 of titanium and a lOOO-angstrom layer 13 of platinum (FIG. 4).
  • the function of the titanium layers is to ensure adherence of the subsequent layers on the silicon oxide. Indeed, it will be seen that these layers overlap from the previously opened window.
  • the function of the platinum is to prevent the diffusion of the gold, in a layer which is to be deposited subsequently, towards the silicon, whose electrical properties it would modify. Its function is also to prevent the diffusion of the titanium towards that layer of gold.
  • the thickness of that layer of platinum must be sufficient, but on the other hand, it must subsist only on a well-defined area of the finished transistor. It must therefore be etched by photolithography, that is, in the presence of a protective layer consisting of resin. Its thickness must therefore be sufficiently small.
  • the configuration after the depositing of the titanium and of the platinum is shown in FIG. 4.
  • the layer of platinum is then limited by photolithography.
  • a layer 6 of resin (FIG. 5) is deposited on a well-defined contact area comprising the window previously formed.
  • the same operations as previously are carried out: non-selective depositing of photosensitive resin, insolation through a mask, rinsing.
  • the configuration then obtained is shown in FIG. 5.
  • Etching the platinum with aqua regia could then be considered, so as to let it remain only in the contact area protected by the resin, which would lead to the configuration shown in FIG. 7.
  • the passivating of the platinum would cause this etching to take too long too long for the resistance of the layer of resin. The latter would be at least partially etched and the result obtained would be inaccurate.
  • the layer of platinum and the protective layer consisting of resin are coated with a layer 7 of silver deposited by cathode sputtering.
  • the configuration shown in FIG. 6 is thus obtained.
  • the silver is then etched in approximately ten seconds in diluted nitric acid, and the platinum is etched immediately after, in approximately six minutes by the aqua regia. It can be thought that the surface of the platinum has been depassivated by the silver. When there is no layer of silver, the time during which the etching takes place should have been greater than ten minutes, that is, excessive.
  • the configuration obtained is shown in FIG. 7.
  • a layer 16 of resin is then deposited in a spatially selective way on the titanium round the contact area coated with platinum.
  • the configuration thus obtained is shown in FIG. 8.
  • gold 8 is deposited on the layer of platinum by electrolysis in the following conditions:
  • the temperature of the bath is 60 C.
  • the plate is prepared, after having been mounted on its support, by a ten minute bath in a 10 solution of sulphuric acid, then by 10 minutes rinsing in deionized water. Electrolysis then takes place for 10 minutes with a current density ranging from 8 to 10 mA/cm In these conditions, a thickness of gold in the order of 2 microns is obtained.
  • the configuration at the end of the electrolysis is shown in FIG. 9.
  • the layer of resin is then removed.
  • the layer of titanium on the outside of the contact area is then etched by means of a solution consisting half of sulphuric acid and half of hydrogen peroxide.
  • the contact production is then completed by soldering a gold wire on the layer of gold which has thus just been deposited,
  • the present invention concerns the etching of the platinum after the second depositing of platinum and before the depositing of gold.
  • This process enables contact widths of a few microns to be obtained.
  • the present invention is in no way limited to the improvement of this process. More generally, it can be applied to great advantage in each case of a very selective etchingof metal which can be passivated, more particularly when the area in which the metal is etched is to be established with great accuracy. This is done preferably by a photolithography process, the present invention not being connected with the intervention of light.
  • the protective layers used in such a process can have only a limited resistance. It is therefore desirable that the etching should be very selective.
  • the metal which can be passivated and is to be etched can be a metal other thanplatinum.
  • This metal can be, for example, palladium.
  • the auxiliary metal used for depassivating can be other than silver. It can, for example, be copper. The essential point is that the auxiliary metal must be more oxidizable than the metal which can be passivated, thatis, its redox potential must be lower.
  • a method for the selective metallizing of an electronic semiconductor device by a first metal which can be passivated wherein the first metal is deposited non-selectively on the device, a protective layer is deposited selectively on the first metal, and the first metal is etched by an acid solution which the protective layer resists
  • the improvement comprising the steps of depositing on the protective layer and thefunprotected areas of the first metal, an auxiliary metal that is more oxidizable than the first metal after the selective depositing of the protective layer and before the etching of said first metal so as to depassivate said first metal, and acid etching said auxiliary metal with an acid which the protective layer resists immediately prior to the acid etching of the first metal so as to completely remove said auxiliary metal.

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  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
  • Electrodes Of Semiconductors (AREA)
US00113924A 1970-02-09 1971-02-09 Method of etching a metal which can be passivated Expired - Lifetime US3716428A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7004491A FR2077718A1 (fr) 1970-02-09 1970-02-09

Publications (1)

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US3716428A true US3716428A (en) 1973-02-13

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US (1) US3716428A (fr)
BE (1) BE762218A (fr)
CH (1) CH516005A (fr)
DE (1) DE2104804A1 (fr)
FR (1) FR2077718A1 (fr)
NL (1) NL7101664A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4361599A (en) * 1981-03-23 1982-11-30 National Semiconductor Corporation Method of forming plasma etched semiconductor contacts
US20020121912A1 (en) * 2000-07-28 2002-09-05 Andre Belmont Method for making a card with multiple contact tips for testing microsphere integrated circuits, and testing device using said card

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287612A (en) * 1963-12-17 1966-11-22 Bell Telephone Labor Inc Semiconductor contacts and protective coatings for planar devices
US3489656A (en) * 1964-11-09 1970-01-13 Western Electric Co Method of producing an integrated circuit containing multilayer tantalum compounds
US3540954A (en) * 1966-12-30 1970-11-17 Texas Instruments Inc Method for manufacturing multi-layer film circuits
US3556951A (en) * 1967-08-04 1971-01-19 Sylvania Electric Prod Method of forming leads on semiconductor devices
US3576722A (en) * 1969-03-26 1971-04-27 Bendix Corp Method for metalizing ceramics
US3616401A (en) * 1966-06-30 1971-10-26 Texas Instruments Inc Sputtered multilayer ohmic molygold contacts for semiconductor devices

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287612A (en) * 1963-12-17 1966-11-22 Bell Telephone Labor Inc Semiconductor contacts and protective coatings for planar devices
US3489656A (en) * 1964-11-09 1970-01-13 Western Electric Co Method of producing an integrated circuit containing multilayer tantalum compounds
US3616401A (en) * 1966-06-30 1971-10-26 Texas Instruments Inc Sputtered multilayer ohmic molygold contacts for semiconductor devices
US3540954A (en) * 1966-12-30 1970-11-17 Texas Instruments Inc Method for manufacturing multi-layer film circuits
US3556951A (en) * 1967-08-04 1971-01-19 Sylvania Electric Prod Method of forming leads on semiconductor devices
US3576722A (en) * 1969-03-26 1971-04-27 Bendix Corp Method for metalizing ceramics

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4361599A (en) * 1981-03-23 1982-11-30 National Semiconductor Corporation Method of forming plasma etched semiconductor contacts
US20020121912A1 (en) * 2000-07-28 2002-09-05 Andre Belmont Method for making a card with multiple contact tips for testing microsphere integrated circuits, and testing device using said card
US6873145B2 (en) * 2000-07-28 2005-03-29 Mesatronic Method for making a card with multiple contact tips for testing microsphere integrated circuits, and testing device using said card

Also Published As

Publication number Publication date
FR2077718A1 (fr) 1971-11-05
DE2104804A1 (de) 1971-08-19
NL7101664A (fr) 1971-08-11
BE762218A (fr) 1971-07-29
CH516005A (fr) 1971-11-30

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