US9362839B2 - Power converter with common mode voltage reduction - Google Patents

Power converter with common mode voltage reduction Download PDF

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US9362839B2
US9362839B2 US13/024,056 US201113024056A US9362839B2 US 9362839 B2 US9362839 B2 US 9362839B2 US 201113024056 A US201113024056 A US 201113024056A US 9362839 B2 US9362839 B2 US 9362839B2
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inverter
rectifier
common mode
vector
active
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US20120201056A1 (en
Inventor
Lixang Wei
Zhongyuan Cheng
Yuan Xiao
Navid R. Zargari
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Rockwell Automation Technologies Inc
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Rockwell Automation Technologies Inc
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Assigned to ROCKWELL AUTOMATION TECHNOLOGIES, INC. reassignment ROCKWELL AUTOMATION TECHNOLOGIES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHENG, ZHONGYUAN, WEI, LIXIANG, XIAO, YUAN, ZARGARI, NAVID R.
Priority to CN201210028984.5A priority patent/CN102638172B/zh
Priority to EP12154755.8A priority patent/EP2487785B1/de
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/40—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC
    • H02M5/42—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters
    • H02M5/44—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC
    • H02M5/453—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/458—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M5/4585—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only having a rectifier with controlled elements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53873—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with digital control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/0003—Control strategies in general, e.g. linear type, e.g. P, PI, PID, using robust control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from AC input or output
    • H02M1/123—Suppression of common mode voltage or current

Definitions

  • Motor drives and other power conversion systems operate to convert electrical power from one form to another and may be employed in a variety of applications such as powering an electric motor using power converted from a single or multiphase AC input source.
  • Such power converters are typically constructed using a passive or active rectifier to convert input AC power to an intermediate DC, followed by an active inverter stage that converts the intermediate DC to AC output power to drive a motor, power grid, or other load.
  • Matrix converters provide AC-AC conversion, typically without internal DC storage elements.
  • the matrix converter or rectifier/inverter stages generally include switches actuated through various forms of pulse width modulation (PWM), where the PWM switching states used in the rectifier and inverter may be constructed according to selective harmonic elimination (SHE or SHEPWM) or space vector modulation (SVM or SVPWM) or other PWM techniques.
  • PWM pulse width modulation
  • CSC Current source converter
  • VSCs Voltage source converters
  • VSI voltage source inverter
  • switches of an active rectifier are pulse width modulated according to an SHE scheme, and the inverter stage is controlled by SHEPWM when the output frequency is high, and SVPWM may be used for low inverter output frequencies.
  • SVPWM is generally simpler and easier to control on the inverter side than SHEPWM.
  • space vector modulation typically generates more common mode voltage on the link choke than does SHEPWM.
  • the link choke is typically designed for high saturation levels, for instance, where the choke can be 20 to 30% larger where the inverter uses SVPWM than if SHE is used. This increases the cost, size, and weight of the link choke. Accordingly, there is a continuing need to control or reduce common mode currents and voltages in power conversion systems to allow link chokes and other system components to be better optimized.
  • the present disclosure provides methods and apparatus for common mode reduction techniques based on SVPWM zero vector selection to reduce the saturation level of the SVPWM for power converters while facilitating reduction in the cost of common mode chokes or without over-sizing the choke by using SVPWM. These techniques can be employed in CSC and/or VSC type converters, and may be used in motor drives or other forms of power converters.
  • zero vector selection is used to try to counteract computed or estimated active vector common mode contributions.
  • zero vectors are selected to counteract measured common mode voltages or currents.
  • the zero vector selection may be done to counteract the combined common mode contributions of multiple converter stages (e.g., rectifier and inverter), and the techniques can also be used in matrix converters.
  • common mode reduction techniques are presented in which zero vector selection is done without extensive common mode computations by using the status of the inverter as being either motoring or regenerating to select the SVM zero vectors.
  • a power conversion system with rectifier and inverter stages coupled by an intermediate DC circuit and operated by a switch control system, which can be a CSC or VSC type system in various embodiments.
  • a switch control system which can be a CSC or VSC type system in various embodiments.
  • One of the rectifier and inverter is operated by SVPWM with the switch control system selecting one of a plurality of zero vectors for space vector modulation based at least partially on a common mode contribution of active vectors used in space vector modulation of the corresponding converter stage.
  • the zero vector is selected so that a zero vector common mode contribution tends to counteract the common mode contribution of the active vectors used in space vector modulation of the corresponding converter stage.
  • an active vector common mode contribution is determined based at least partially on AC voltages, active vectors and dwell times corresponding to a current SVM reference vector, and a zero vector is selected for which a polarity of the corresponding zero vector common mode contribution is opposite to the polarity of the active vector common mode contribution.
  • the zero vector for space vector modulation of the first converter is selected at least partially according to a common mode contribution of the second converter.
  • the switch control system for the first converter determines an active vector common mode contribution of the first converter, determines a common mode contribution of the second converter, and determines the combined common mode contribution of these.
  • the switch control system selects the zero vector for space vector modulation of the first converter for which the polarity of the corresponding zero vector common mode contribution is opposite to the polarity of the combined common mode contribution.
  • both the rectifier and inverter are operated by SVPWM.
  • the switch control system determines active vector common mode contributions of the inverter and of the rectifier, and selects zero vectors for the rectifier and for the inverter to at least partially counteract the active vector common mode contributions of the converters.
  • a CSC or VSC power conversion system which includes rectifier and inverter stages and an intermediate DC circuit.
  • a switch control system operates one of the converters by SVPWM with a zero vector selected based at least partially on a measured common mode current.
  • the zero vector is selected for which a corresponding zero vector common mode contribution tends to counteract the measured common mode current.
  • both the rectifier and inverter are operated by SVPWM, and the switch control system selects zero vectors for the rectifier and inverter to at east partially counteract the measured common mode current.
  • a power conversion system having a rectifier and an inverter coupled with an intermediate DC circuit, and which can be a current source converter in certain embodiments.
  • a switch control system provides space vector modulated control signals to operate the inverter, and selects the SVM zero vector based at least partially on whether the inverter is motoring or regenerating.
  • the zero vector is selected which shorts or bypasses an inverter phase not used in only one of the current SVM active vectors for motoring operation, and if the inverter is regenerating, the zero vector is selected which shorts an inverter phase used in both active vectors.
  • An AC-AC matrix converter in accordance with further aspects of the disclosure, which includes a multiphase AC input and a multiphase AC output, and a switching network coupled therebetween.
  • the converter includes a switch control system that operates the switching network using SVPWM and selects a SVM zero vector based at least partially on a measured or estimated common mode current or voltage.
  • the switch control system selects a SVM zero vector for which a corresponding zero vector common mode contribution tends to counteract a common mode contribution of active vectors used operating the switching network.
  • FIG. 1 is a schematic diagram illustrating an exemplary variable frequency motor drive power conversion system with at least one common mode reduction zero vector selection component according to one or more aspects of the present disclosure
  • FIG. 2 is a schematic diagram illustrating an exemplary space vector modulation (SVM) diagram of current source converters including six sectors and a rotating reference vector with peripheral corners defining active switching vectors and a center defining a plurality of zero vectors used in the various common mode reduction pulse width modulation schemes of the present disclosure;
  • SVM space vector modulation
  • FIG. 3 is a flow diagram illustrating a method and exemplary operation of the switch control system of FIG. 1 in reducing common mode voltages or currents through SVM zero vector selection;
  • FIG. 4 is a flow diagram illustrating another exemplary method and switch control system operation to reduce common mode voltages or currents through SVM zero vector selection based on active vector common mode polarity;
  • FIG. 5 is a flow diagram illustrating another exemplary method and switch control system operation to reduce common mode by SVM zero vector selection according to the polarity of a measured common mode current;
  • FIG. 6 is a flow diagram illustrating yet another exemplary method and switch control system operation with inverter zero vectors selected according to combined common mode contributions of inverter SVM active vectors and measured or calculated rectifier common mode;
  • FIG. 7 is a flow diagram illustrating yet another exemplary method and switch control system operation with zero vectors being selected for SVPWM operation of both the rectifier and inverter to counteract active vector common mode contributions of both converters;
  • FIG. 8 is a flow diagram illustrating another exemplary method and switch control system operation with inverter zero vector selection based on whether the inverter is motoring or regenerating;
  • FIGS. 9A and 9B are schematic diagrams illustrating exemplary SVM diagrams showing sector-based zero vector selection based on motoring or regenerating inverter modes, respectively;
  • FIG. 10 is a schematic diagram illustrating an exemplary VSC type variable frequency motor drive power conversion system with at least one common mode reduction zero vector selection component
  • FIG. 11 is a schematic diagram illustrating an exemplary matrix power converter with a common mode reduction zero vector selection component in accordance with certain aspects of the disclosure.
  • CSC current source converter
  • VSC voltage source converter
  • matrix converter architectures for any common mode reduction or control goals, for instance, to facilitate reduction in the size, weight, and cost of common mode chokes and other components such as filter inductors, etc. of the system.
  • Some examples of these techniques include selecting SVM zero vectors so as to counteract computed or estimated active vector common mode contributions and/or to counteract measured common mode voltages or currents.
  • the zero vector selection may be done to counteract the combined common mode contributions of multiple converter stages (e.g., rectifier and inverter), and other embodiments are disclosed in which the zero vector is selected according to the inverter motoring or regenerating status without requiring computation of common mode current or voltage estimates.
  • converter stages e.g., rectifier and inverter
  • FIG. 1 illustrates an exemplary system 100 in which a number of these common mode reduction zero vector selection techniques can be employed.
  • the system includes a current source converter (CSC) type motor drive 110 (power conversion system) driving a motor load 120 .
  • the system 100 includes an exemplary three-phase AC voltage source 111 providing input power to the drive 110 , and the drive 110 converts the input power to drive a motor load 120 coupled to a converter output 114 .
  • the drive 110 is a current source converter (CSC) type, with an input 112 connected to the AC power source 111 . While these examples are illustrated as having a three phase input 112 , other embodiments may provide a single phase AC input or may include a multiphase input adapted to receive three or more input phases.
  • CSC current source converter
  • the CSC drive 110 in FIG. 1 provides variable frequency, variable amplitude single or multiphase AC output power at output terminals 114 to drive an AC motor load 120 , which has three phase windings in the illustrated example.
  • the output 114 in other embodiments may provide a single phase AC output or may be of any number of phases, and may power a load other than a motor, such as a power grid in a wind energy system, for example.
  • the illustrated motor drive 110 includes both input filter capacitors Ci in the input circuit 112 , as well as output filter capacitors Cm in an output filter circuit 113 .
  • the input filter capacitors Ci are coupled between corresponding input phase lines A, B, and C and an input neutral node (N I ).
  • the output capacitors Cm are individually coupled between a corresponding output phase line U, V, and W and an output neutral node “o” (N O ). Certain embodiments may omit either or both of the input or output filter capacitor sets.
  • the input and output neutral nodes N I , N O may be floating in certain embodiments, or one or both of the neutrals N I , N O may be coupled to the ground of the input power source or to another ground.
  • the neutrals N I , N O are coupled to one another through a sense impedance Rcm without reference to any system ground for measurement of one or both of common mode currents i cm and/or common mode voltages or other sensed operating conditions of the drive 110 from which common mode currents and/or voltages can be computed, estimated or otherwise determined by components of a feedback system 118 .
  • the drive 110 includes a rectifier 110 a receiving the AC input power from the source 111 via an input 112 , as well as an intermediate DC circuit 150 with a DC link choke having upper and lower windings WA and WB coupled between the rectifier 110 a and an output inverter 110 b .
  • the DC link could be a simple DC link inductor or a common mode choke with windings in each of the upper and lower Dc current paths as in the illustrated example.
  • the illustrated drive 110 provides input filtering including inductors Li in each input phase and input filter capacitors Ci coupled between the input lines A, B, C, and the input neutral node g (N I ).
  • the rectifier 110 a is a current source rectifier (CSR) coupled with a current source inverter (CSI) 110 b by the intermediate DC circuit 150 , and one or more isolation components (e.g., transformers, not shown) may optionally be included in the drive 110 .
  • the output 114 provides AC electrical output power to the motor load 120 via lines U, V, and W, and includes filter circuit 113 with the output capacitors Cm coupled between the load 120 and the output neutral node o (N O ).
  • the rectifier 110 a is an active switching-type current source rectifier (CSR) with switching devices S 1 -S 6 coupled between the input 112 and the DC circuit 150 and operates according to a plurality of rectifier switching control signals 142 a provided by a rectifier control component 144 a of a switch control system 140 .
  • the AC input power is switched by the rectifier switches S 1 -S 6 to create an intermediate DC link current Idc in the intermediate circuit 150 .
  • the exemplary inverter 110 b is a current source inverter (CSI) that includes switching devices S 7 -S 12 coupled between the DC circuit 150 and phase lines U, V, and W of the output 114 .
  • CSI current source inverter
  • the inverter switches S 7 -S 12 are operated according to corresponding switching control signals 142 b from an inverter control component 144 b of the switch control system 140 to selectively convert DC power from the DC circuit 150 to provide the AC output power to drive the motor load 120 .
  • the DC link choke or inductor links the switches of the rectifier 110 a and the inverter 110 b , and provides forward and return current paths therebetween.
  • the first winding WA of the link choke is coupled in a forward or positive DC path and has a first end P 1 connected to the upper rectifier switches S 1 -S 3 and a second end P 2 coupled with the upper inverter switches S 7 -S 9 .
  • the second (lower) winding WB is coupled in a negative or return DC path and has a first end N 1 coupled to the lower rectifier switches S 4 -S 6 as well as a second end N 2 coupled to the lower inverter switches S 10 -S 12 .
  • the rectifier and inverter switching devices S 1 -S 12 may be any suitable controllable electrical switch types (e.g., SGCTs, IGCTs, GTOs, thyristors, IGBTs with reverse blocking capability, etc.) that are controlled according to any suitable type or form of switching scheme or schemes, such as phase control, pulse width modulation, etc., in open or closed-loop fashion.
  • suitable controllable electrical switch types e.g., SGCTs, IGCTs, GTOs, thyristors, IGBTs with reverse blocking capability, etc.
  • the switching devices S 7 -S 12 of the inverter 110 b are forced commutated devices including without limitation SGCTs, IGBTs or GTOs, and the switching devices S 1 -S 6 of the rectifier 110 a can be force commutated devices such as those mentioned above as well as line commutated devices such as Thyristors.
  • Thyristor devices could be used for the inverter switching devices S 7 -S 12 in the form of forced commutated devices with extra circuitry added to the device triggering circuit, triggering circuit commutation.
  • the rectifier 110 a and the inverter 110 b operate under control of the switch control system 140 , which may include one or more processors and associated memory as well as I/O circuits including driver circuitry for generating switching control signals 142 to selectively actuate the switching devices S 1 -S 12 although separate switching control systems may be employed, for example, with interconnections and information sharing to facilitate the coordinated operation of the rectifier 110 a and the inverter 110 b .
  • the switch control system 140 may include one or more processors and associated memory as well as I/O circuits including driver circuitry for generating switching control signals 142 to selectively actuate the switching devices S 1 -S 12 although separate switching control systems may be employed, for example, with interconnections and information sharing to facilitate the coordinated operation of the rectifier 110 a and the inverter 110 b .
  • the switch control system 140 in these embodiments includes an inverter control component 144 b providing the inverter switching control signals 142 b to cause the inverter 110 b to selectively convert DC current from the intermediate DC circuit 150 to provide AC electrical power to the AC output 114 according to one or more setpoints 141 , such as desired motor speed, torque, etc.
  • the switch control system 140 and the components 144 thereof can be implemented as any suitable hardware, processor-executed software, processor-executed firmware, programmable logic, or combinations thereof, operative as any suitable controller or regulator by which the motor 120 is controlled according to one or more desired profile(s) or setpoint(s) 141 , whether signals and/or digital values, in open or closed-loop fashion or combinations thereof.
  • a rectifier control component 144 a of the controller 140 provides the rectifier switching control signals 142 a to cause the rectifier 110 a to convert AC electrical input power to provide a regulated DC current Idc to the DC circuit 150 .
  • the rectifier controller 144 a may employ one or more feedback signals or values 118 a , such as a measured DC current value from the rectifier 110 a representing the actual DC link current Idc and/or DC link voltage.
  • the DC link current Idc from the rectifier 110 a provides input current for conversion by the inverter 110 b , where the exemplary inverter control 144 b may provide a desired DC link current signal or value as a regulation setpoint to the rectifier controller 144 a .
  • the rectifier 110 a provides the DC current required by the inverter 110 b , and the rectifier controller 144 a may also implement other control functions such as power factor correction, while the inverter controller 144 b performs the necessary motor control operation of the drive 110 according to one or more setpoint values or signals 141 .
  • the drive 110 also includes a feedback system 118 including one or more sensing elements operative to provide one or more feedback signals and/or values 118 a indicative of electrical conditions at the input 112 , the rectifier 110 a , the intermediate DC circuit 150 , the inverter 110 b , the output filter 113 , and/or at the output 114 .
  • the switch control system 140 may be provided with one or more setpoints or desired values 141 and one or more feedback signals or values 118 a from the feedback system 118 by which one or more closed loop motor drive control goals are achieved in normal motor drive operation.
  • Feedback signals or values for the control functions can be based on signals and/or values 118 a from the feedback system 118 , measured input values (e.g., line voltages, neutral voltages, currents, etc.), and other information, data, etc., which may be in any suitable form such as an electrical signal, digital data, etc., and which may be received from any suitable source, such as one or more sensors, an external network, switches, a user interface associated with the system 100 , or other suitable source(s).
  • measured input values e.g., line voltages, neutral voltages, currents, etc.
  • Other information, data, etc. which may be in any suitable form such as an electrical signal, digital data, etc., and which may be received from any suitable source, such as one or more sensors, an external network, switches, a user interface associated with the system 100 , or other suitable source(s).
  • the feedback circuit 118 provides feedback signal(s) or value(s) to the controller 140 from at least one of the rectifier 110 a , the DC circuit 150 , and the inverter 110 b , and may provide measured motor speed values through appropriate tachometers or other sensors, and/or sensed values from which motor speed, torque, current, and/or voltage, etc. may be determined by the controller 140 .
  • sensorless motor speed feedback values may be generated internally by the controller 140 via suitable motor models based on the feedback signals or values 118 a even for systems having no direct motor speed measurement sensors.
  • the switch control system 140 includes one or more zero vector selection components 144 c , which can be implemented individually as part of either or both of the rectifier controller 144 a and/or the inverter controller 144 b , and which can be integrated.
  • FIGS. 2-9B illustrate exemplary processes by which the switch control system 140 generates pulse width modulated switching control signals 142 b for the inverter 110 b and/or PWM signals 142 a for the rectifier 110 a using space vector modulation with zero vector(s) selected in a manner that can facilitate control of or reduction in common mode currents and/or voltages in the system 110 .
  • the illustrated methods and other methods of the disclosure may be implemented in hardware, processor-executed software, or combinations thereof, in order to provide the common mode reduction pulse width modulation control functionality described herein, and may be employed in any power conversion system including but not limited to the above illustrated drive 110 , wherein the disclosure is not limited to the specific applications and embodiments illustrated and described herein.
  • the switch control system 140 generates the pulse width modulated switching control signals 142 b for the inverter 110 b using space vector modulation according to a set of switching sequences for each sector of a space vector modulation diagram 200 , or the use of SVPWM may be for certain inverter output frequencies, for instance with selective harmonic elimination (SHE) PWM used for high output frequencies and SVPWM used for low frequencies.
  • SHE selective harmonic elimination
  • SHEPWM may be used exclusively, or the rectifier switches may be controlled via SVPWM with intelligent zero vector selection via component 144 c .
  • the exemplary zero vector selection techniques are described below in the context of inverter SVPWM for controlling the inverter switches S 7 -S 12 , but these concepts are applicable to SVPWM control of the rectifier switches S 1 -S 6 .
  • FIG. 2 shows an exemplary space vector modulation diagram 200 for inverter operation with six stationary active space vectors I 1 -I 6 positioned counterclockwise (CCW) around the periphery of the diagram 200 as well as three stationary zero vectors I 7 -I 9 located at the diagram origin, where the active and zero vectors I 1 -I 9 represent unique switching states for the inverter switching network S 7 -S 12 .
  • the SVM diagram 200 also defines six triangular sectors (labeled Sector 1 through Sector 6 in FIG. 2 ) positioned around the origin, each of which is defined by a unique set of two of the active vectors I 1 -I 6 and the zero vectors I 7 -I 9 at the corners of the corresponding triangular segment.
  • the switch control system 140 provides the switching control signals 142 b according to a selected switching sequence corresponding to the diagram sector in which the reference (e.g., command) vector i cmd is currently located, with the sequence and corresponding dwell times determined at least partially according to one or more feedback signals or values 118 a from the feedback system 118 and/or to setpoint information 141 .
  • the inverter switching control signals 142 b are provided by pulse width modulation according to the vectors and dwell times determined for each vector in the sequence based on the reference vector position.
  • the exemplary SVM convention used herein provides for the following set of active vectors and zero vectors in Table 1, in which a “1” indicates the upper inverter switch for a given output phase (U, V, or W) is “ON” (conductive) while the lower switch for that phase is “OFF” (non-conductive); a “ ⁇ 1” indicates that the upper switch is OFF and the lower switch is ON, and a “0” indicates that both switches of the given phase are OFF.
  • the upper switch S 7 of the phase U is ON and the lower switch S 10 is OFF, and the lower switch S 11 of phase V is on while the corresponding upper switch S 8 is OFF, and both switches S 9 and S 12 of phase W are OFF.
  • the phase U upper switch S 7 is ON and the lower switch S 10 is OFF, both phase V switches S 8 and S 11 are OFF, and the phase W upper switch S 9 is OFF and the lower switch S 12 is ON.
  • the indication “U” indicates that both the upper and lower switches S 7 and S 10 for inverter phase U are ON so as to short or bypass that output phase for a CSI inverter 110 b .
  • “V” indicates that both switches S 8 and S 11 are ON and “W” indicates that both switches S 9 and S 12 are ON.
  • the SVPWM at any given sector can use any one of the zero vectors I 7 -I 9 to achieve the same motor control (inverter output control) performance.
  • the inventors have appreciated that intelligent selection among these zero vectors I 7 -I 9 can be used to combat the adverse effects of common mode issues, and this control capability in certain applications can be leveraged to avoid having to over-size the common mode choke of the DC link circuit 150 in the CSC drive example 110 of FIG. 1 . Similar design advantages can be achieved for other converter components in the various applications of these techniques.
  • FIG. 3 illustrates an exemplary operating process 300 for one embodiment of the inverter controller 144 b , which may be applied to rectifier control in certain embodiments.
  • a new inverter PWM period begins at 310 , and the reference vector position (e.g., I cmd in FIG. 2 ) is determined at 320 along with the pair of active vectors (e.g., and i 2 in the example of FIG. 2 ) corresponding to the sector (e.g., “Sector 1 ”) in which the reference vector is currently positioned.
  • the reference vector position e.g., I cmd in FIG. 2
  • the pair of active vectors e.g., and i 2 in the example of FIG. 2
  • the sector e.g., “Sector 1 ”
  • the reference vector angle and magnitude in the space vector diagram 200 also provides for determination at 320 of the corresponding active vector dwell times (e.g., d 1 and d 2 in this example) as well as a zero vector dwell time (e.g., d 0 ).
  • the pulse width modulation is thus determined as d 1 i 1 +d 2 i 2 +d 0 i 7, 8, or 9 where the selected zero vector is chosen for common mode reduction.
  • the switch control system 140 determines the active vector common mode contribution of the SVPWM controlled converter stage (e.g., the inverter 110 b ).
  • the controller 140 determines the common mode current contribution attributable to the presently chosen active vectors i 1 and i 2 as shown in FIG. 2 .
  • the common mode voltage stress added to the DC common mode choke V cm2 by the zero vectors is within the range given by the following equation (2): d 0 ⁇ min( V u ,V v ,V w ) ⁇ V cm2 ⁇ d 0 ⁇ max( V u ,V v ,V w ), (2) where d 0 is the dwell time for the zero vector.
  • the switch control system 140 selects the zero vectors I 7 , I 8 , or I 9 for the inverter space vector modulation at least partially according to the common mode contribution V cm1 of the active vectors i 1 and i 2 .
  • the system 140 selects one of the plurality of zero vectors I 7 , I 8 , I 9 for which the corresponding zero vector common mode contribution V cm2 tends to counteract the active vector common mode contribution V cm1 for the inverter 110 b in the next switching cycle.
  • the system 140 uses the measured, derived, or estimated output phase voltages (e.g., line-to-line or line-to-neutral, etc.) via the feedback system 118 and the above equation (2) to ascertain the zero vector contributions V cm2 at 330 and makes the selection at 340 so as to wholly or partially counteract the active vector common mode contribution V cm1 .
  • the inventors have appreciated that wholly or at least partially canceling out V cm1 by adjusting V cm2 through this zero vector selection technique to reduce overall common mode voltage integral ( ⁇ V cm *dt) in a given cycle can advantageously reduce the common mode current in the system 110 .
  • the SVPWM signals 142 b are then generated at 350 in FIG. 3 using the selected zero vector I 7 , I 8 , or I 9 .
  • FIG. 4 shows another exemplary process 400 method and switch control system operation to reduce common mode voltages or currents through SVM zero vector selection based on active vector common mode polarity.
  • the SVPWM period begins and the reference vector position, active vectors, and dwell times are determined at 420 based at least partially on setpoint value(s) 141 and/or feedback value(s) 118 a .
  • the system 140 determines the active vector common mode contribution (e.g., V cm1 ), and a determination is made at 432 as to whether the active vector contribution V cm1 , is positive or negative.
  • the switch control system 140 selects one of the plurality of zero vectors I 7 , I 8 , I 9 at 440 based on the active vector contribution polarity.
  • the system 140 selects the zero vector for which the polarity of the corresponding zero vector common mode contribution V cm2 is opposite to the polarity of the active vector common mode contribution V cm1 .
  • V cm1 is positive (YES at 432 )
  • the system 140 selects a zero vector I 7 , I 8 , or I 9 at 440 a that generates a negative zero vector common mode contribution V cm2 (e.g., using the measured output voltages and equation (2) above to determine the prospective zero vector contributions V cm2 ).
  • V cm1 is negative (NO at 432 )
  • a zero vector I 7 , I 8 , or I 9 is selected at 440 b that generates a positive zero vector common mode contribution V cm2 .
  • the selected zero vector I 7 , I 8 , or I 9 is then used at 450 to generate the inverter SVPWM signals 142 b.
  • FIG. 5 illustrates yet another process 500 for switch control system operation in which the zero vector is selected according to the polarity of a measured common mode current i cm .
  • the SVPWM period begins at 510 and the reference vector position, active vectors, and dwell times are determined at 520 .
  • a common mode current is measured at 530 via the feedback system 118 (e.g., directly as by measuring the voltage across resistor Rcm in FIG. 1 , or by derivation from other measured system parameter), and the system 140 selects one of the zero vectors I 7 , I 8 ,I 9 for inverter space vector modulation at least partially according to the measured common mode current i cm .
  • the common mode current polarity is determined at 532 and the system 140 selects the zero vector at 540 according to this polarity (e.g., using the measured output voltages and equation (2) above to determine the prospective zero vector contributions V cm2 ).
  • the switch control system 140 selects a zero vector at 540 a for which the determined zero vector contributions V cm2 (e.g., equation (2)) reduces the common mode current i cm , and otherwise (NO at 532 for negative measured i cm ) selects a zero vector at 540 b for which the contribution V cm2 increases the common mode current i cm .
  • the selected zero vector I 7 , I 8 , or I 9 is then used at 550 to generate the inverter SVPWM signals.
  • FIG. 6 Another switch control system operational process 600 is shown in FIG. 6 , in which the inverter zero vector is selected according to combined common mode contributions of inverter SVM active vectors and measured or calculated rectifier common mode.
  • a new PWM period for the inverter 110 b begins at 610 and the system 140 determines the inverter reference vector position, active vectors, and dwell times at 620 .
  • the active vector common mode contribution (e.g., V cmi ) is determined at 630 (e.g., using equation (1) above), and the common mode contribution V cm _ rectifier of the rectifier 110 a is measured or calculated at 632 .
  • any suitable technique can be used to determine V cm _ rectifier at 632 , for example using equations similar to equations (1) and (2) above if the rectifier is controlled by SVPWM based on measured input voltages and rectifier reference vectors and dwell times.
  • the switch control system 140 selects the inverter zero vectors I 7 , I 8 , or I 9 based at least in part on the inverter active vector common mode contribution (e.g., V cm1 ) and on the rectifier common mode contribution V cm _ rectifier .
  • the system 140 determines a combined common mode contribution V cm1 +V cm _ rectifier and determines the polarity of this combined contribution at 634 .
  • the system 140 selects an inverter zero vector I 7 , I 8 , or I 9 for which the polarity of the corresponding zero vector common mode contribution V cm2 is opposite to the polarity of the combined common mode contribution V cm1 +V cm _ rectifier . For example, if V cmi +V cm _ rectifier is positive (YES at 634 ), the system 140 selects a inverter zero vector I 7 , I 8 , or I 9 at 640 a for which V cm2 is negative, and otherwise (NO at 634 for negative V cmi +V cm _ rectifier ) a zero vector I 7 , I 8 , or I 9 is selected at 640 b for which V cm2 is positive. The selected zero vector I 7 , I 8 , or I 9 is then used at 650 to generate the SVPWM signals 142 b.
  • a process 700 is illustrated in which zero vectors are selected for SVPWM operation of both the rectifier 110 a and the inverter 110 b to counteract active vector common mode contributions of both converters. This is useful for situations in which both the rectifier 110 a and inverter 110 b are space vector modulated by the switch control system 140 .
  • the switch control system 140 determines an active vector common mode contribution V cm1 _ inverter of the inverter 110 b , and determines an active vector common mode contribution V cm1 _ rectifier of the rectifier 110 a at 720 (e.g., using equation (1) above).
  • the system 140 selects zero vectors (e.g., I 7 , I 8 , or I 9 for the inverter 110 b and a zero vector for the rectifier 110 a ) so as to at least partially counteract the active vector common mode contributions V cm1 _ inverter , V cm1 _ rectifier of the inverter 110 b and the rectifier 110 a .
  • This selection can be by any suitable approach, such as summing the active vector contributions (V cm1 _ inverter +V cm1 _ rectifier ) and selecting the zero vectors for the inverter 110 b and rectifier 110 a to attempt to offset the combined active vector common mode contribution, which may be done passed on polarities of the contributions as described above.
  • the selected zero vector I 7 , I 8 , or I 9 is then used at 750 to generate the inverter SVPWM signals 142 b.
  • FIG. 8 another exemplary process 800 is shown in FIG. 8 for operating the switch control system 140 with inverter zero vector selection based on whether the inverter is motoring or regenerating, and the SVM diagrams 900 a and 900 b in FIGS. 9A and 9B , respectively, illustrate sector-based zero vector selection according to these motoring or regenerating inverter modes.
  • This approach is computationally advantageous since no complex common mode contribution calculations need to be made, and instead the zero vector selection is done based on the attributes of the current reference vector sector in the space vector diagram 900 . While this method can reduce the common mode current, it may not minimize it.
  • This technique can be employed in any form of converter (e.g., CSC or VSC drive 110 ) for SVPWM control of an active inverter 110 b , even where a passive rectifier 110 a is used.
  • the inverter PWM control period begins and the inverter reference vector position, active vectors, and dwell times are determined at 820 .
  • the system 140 determines at 830 whether the inverter 110 b is currently providing power to the output load 120 (motoring mode) or is instead providing power from the load (e.g., a power grid) to the DC intermediate circuit 150 (regenerating mode).
  • the system 140 selects the inverter zero vectors I 7 , I 8 , or I 9 at least partially according to whether the inverter 110 b is motoring or regenerating.
  • the switch control system 140 selects the zero vectors I 7 , I 8 , or I 9 at 840 a to short an inverter phase not used in only one of the current active vectors determined at 820 . This is shown in the SVM diagram 900 a of FIG. 9A , where the reference vector sector location determines the zero vector selection for motoring operation.
  • the system 140 selects zero vector i 8 or vector i 9 at 840 a since zero vector i 8 shorts phase V (both switches S 8 and S 11 are ON) and phase V was activated by the active vector but not by i 2 .
  • zero vector i 9 can be selected at 840 a since this zero vector shorts phase W, which phase was activated by the active vector i 2 but not by i 1 . Similar selections are shown in the diagram 900 a of FIG. 9A for motoring operation, which are summarized in the following Table 2:
  • the system 140 selects the zero vector I 7 , I 8 , or I 9 at 840 b for inverter SVPWM to short the inverter phase that is used in both of the current active vectors. For example, if the reference vector i cmd is in Sector 1 , zero vector i 7 is selected at 840 b since this zero vector shorts phase U, and both the active vectors i 1 and i 2 use phase U. In this manner, the inverter leg is shorted which is connected to a Dc node in both of the active vectors during the active switching state.
  • Table 3 The zero vector selection for regenerating mode is summarized in the following Table 3:
  • the selected zero vector I 7 , I 8 , or I 9 is then used at 850 to generate the inverter SVPWM signals 142 b .
  • This technique can also be used in SVPWM control of an active rectifier 110 a , and can be used alone or in combination with one or more of the above described common mode reduction zero vector selection techniques.
  • FIG. 10 shows an exemplary VSC type variable frequency motor drive power conversion system 110 with at least one common mode reduction zero vector selection component 144 c in which one or more of the above zero vector selection techniques can be employed to combat common mode voltages and currents.
  • the converter 110 in this example is used to drive a motor load 120 .
  • FIG. 10 illustrates a voltage source converter 110 with an active rectifier 110 a
  • FIG. 10 illustrates a voltage source converter 110 with an active rectifier 110 a
  • the system 100 of FIG. 10 includes an input 104 coupled with a three-phase AC voltage source 111 providing input power to the drive 110 , and the drive 110 converts the input power to provide motor voltages to drive a motor load 120 having phase windings with associated inductances Lm coupled to a converter output 114 .
  • the drive 110 may include an input filter 112 connected to the AC power source 111 and an output filter 113 including line inductances L.
  • the drive 110 in FIG. 10 provides variable frequency, variable amplitude single or multiphase AC output power at output terminals 114 to drive an AC motor load 120 , which has three phase windings in the illustrated example.
  • the output 114 in other embodiments may be of any number of phases, and may power a load other than a motor, such as a power grid in a wind energy system, for example.
  • the motor drive 110 may include input filter capacitors in the input circuit 112 , as well as output filter capacitors in an output filter circuit 113 .
  • the drive 110 includes a rectifier 110 a receiving the AC input power from the source 111 via an input 112 , as well as an intermediate DC circuit 150 with a capacitance C (single or multiple capacitors) connected between the upper and lower DC branches.
  • the rectifier 110 a is coupled with the inverter 110 b by the intermediate DC circuit 150 , and one or more isolation components (e.g., transformers, not shown) may optionally be included in the drive 110 .
  • a switch control system 140 is provided, as described above in connection with FIG.
  • rectifier controller 144 a and an inverter controller 144 b may include common mode reduction zero vector selection components 144 c operative to implement the above described zero vector selection techniques for SVPWM operation of the respective converter stages 110 a , 110 b.
  • FIG. 11 illustrates an exemplary matrix power converter 1100 with a switching matrix 1102 operated by a switch control system 140 with a common mode reduction zero vector selection component 144 c in accordance with further aspects of the disclosure.
  • the system 1100 includes a multi-phase AC input 104 with a plurality of AC input terminals for receiving multi-phase AC electrical input power from a source 111 , and may include an input filter circuit 112 (capacitors in this example) coupled with the input lines A, B, and C and providing an input neutral coupled to an output neutral via a common mode resistance Rcm.
  • an input filter circuit 112 capacitor in this example
  • the system 1100 also has a multi-phase AC output 114 with a plurality of AC output terminals for providing multi-phase AC electrical output power, for instance, to a load 120 (e.g., motor, grind, etc.).
  • the switching network 1102 includes a plurality of switching devices forming a plurality of leg circuits 1102 1 , 1102 2 , and 1102 3 in the illustrated three-phase example).
  • the matrix switching devices are operated according to a corresponding switching control signal from the controller 140 , with each leg circuit 1102 1 , 1102 2 , 1102 3 being connected to a corresponding AC input terminal A, B, C and to a corresponding AC output terminal U, V, W, where each leg circuit 1102 1 , 1102 2 , and 1102 3 includes at least one switching device coupled between the corresponding AC input terminal and the corresponding AC output terminal.
  • the switch control system 140 provides SVPWM switching control signals 142 to cause the switching network 1102 to selectively convert the AC electrical input power from the multi-phase AC input 104 to provide the multi-phase AC electrical output power to the multi-phase AC output 114 based on one or more setpoint signals or values 141 .
  • the switch control system 140 selects one of a plurality of zero vectors (e.g., equivalent to I 7 , I 8 , I 9 for the matrix configuration) for space vector modulation of the switching network 1102 at least partially according to a measured or estimated common mode current or voltage (e.g., i cm ).
  • the system 140 select the zero vector for which a corresponding zero vector common mode contribution tends to counteract a common mode contribution of active vectors used in space vector modulation of the switching network 1102 .
  • a non-transitory computer readable medium such as a computer memory, a memory within a power converter control system (e.g., switch control system 140 above), a CD-ROM, floppy disk, flash drive, database, server, computer, etc. which has computer executable instructions for performing the processes described above.

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