WO1987006029A3 - Procede de transfert de configurations pour fabriquer des dispositifs a circuits integres - Google Patents
Procede de transfert de configurations pour fabriquer des dispositifs a circuits integres Download PDFInfo
- Publication number
- WO1987006029A3 WO1987006029A3 PCT/US1987/000512 US8700512W WO8706029A3 WO 1987006029 A3 WO1987006029 A3 WO 1987006029A3 US 8700512 W US8700512 W US 8700512W WO 8706029 A3 WO8706029 A3 WO 8706029A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pbs
- transfer process
- layer
- circuit devices
- pattern transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/30—Imagewise removal using liquid means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
- H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/094—Multilayer resist systems, e.g. planarising layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/68—Organic materials, e.g. photoresists
- H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Electron Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Formation Of Insulating Films (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Abstract
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019870701080A KR880701400A (ko) | 1986-03-24 | 1987-03-04 | 집적 회로 장치의 제조방법 |
| SG1232/92A SG123292G (en) | 1986-03-24 | 1992-12-09 | Pattern transfer process for fabricating integrated-circuit devices |
| HK100193A HK100193A (en) | 1986-03-24 | 1993-09-23 | Pattern transfer process for fabricating integrated-circuit devices |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US84324286A | 1986-03-24 | 1986-03-24 | |
| US843,242 | 1995-06-07 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO1987006029A2 WO1987006029A2 (fr) | 1987-10-08 |
| WO1987006029A3 true WO1987006029A3 (fr) | 1988-03-24 |
Family
ID=25289430
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1987/000512 Ceased WO1987006029A2 (fr) | 1986-03-24 | 1987-03-04 | Procede de transfert de configurations pour fabriquer des dispositifs a circuits integres |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP0268595B1 (fr) |
| JP (1) | JPS63502936A (fr) |
| KR (1) | KR880701400A (fr) |
| ES (1) | ES2004266A6 (fr) |
| SG (1) | SG123292G (fr) |
| WO (1) | WO1987006029A2 (fr) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0410635A1 (fr) * | 1989-07-28 | 1991-01-30 | AT&T Corp. | Méthode de gravure d'une fenêtre à profil conique dans la fabrication de composants de circuits intégrés à semiconducteurs |
| WO1996007954A1 (fr) * | 1994-09-09 | 1996-03-14 | Board Of Supervisors Of Louisiana State University And Agricultural And Mechanical College | Microstructures et procede de fabrication de microstructures |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4244799A (en) * | 1978-09-11 | 1981-01-13 | Bell Telephone Laboratories, Incorporated | Fabrication of integrated circuits utilizing thick high-resolution patterns |
| US4362598A (en) * | 1981-10-26 | 1982-12-07 | General Electric Company | Method of patterning a thick resist layer of polymeric plastic |
| EP0100736A2 (fr) * | 1982-08-02 | 1984-02-15 | Fairchild Semiconductor Corporation | Structure et traitement de gaufres par le procédé de "lift-off" |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US436259A (en) * | 1890-09-09 | Fastening for slatted furniture | ||
| GB1421805A (en) * | 1972-11-13 | 1976-01-21 | Ibm | Method of forming a positive resist |
| JPS5811786A (ja) * | 1981-07-16 | 1983-01-22 | Matsushita Electric Ind Co Ltd | 薄膜の微細加工法 |
| JPS6011243A (ja) * | 1983-06-29 | 1985-01-21 | Fujitsu Ltd | 光フアイバ母材製造方法 |
-
1987
- 1987-03-04 WO PCT/US1987/000512 patent/WO1987006029A2/fr not_active Ceased
- 1987-03-04 JP JP62502068A patent/JPS63502936A/ja active Pending
- 1987-03-04 KR KR1019870701080A patent/KR880701400A/ko not_active Ceased
- 1987-03-04 EP EP87902235A patent/EP0268595B1/fr not_active Expired - Lifetime
- 1987-03-18 ES ES8700767A patent/ES2004266A6/es not_active Expired
-
1992
- 1992-12-09 SG SG1232/92A patent/SG123292G/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4244799A (en) * | 1978-09-11 | 1981-01-13 | Bell Telephone Laboratories, Incorporated | Fabrication of integrated circuits utilizing thick high-resolution patterns |
| US4362598A (en) * | 1981-10-26 | 1982-12-07 | General Electric Company | Method of patterning a thick resist layer of polymeric plastic |
| EP0100736A2 (fr) * | 1982-08-02 | 1984-02-15 | Fairchild Semiconductor Corporation | Structure et traitement de gaufres par le procédé de "lift-off" |
Non-Patent Citations (4)
| Title |
|---|
| International Electron Devices Meeting, (Washington, D.C., US), 8-10 December 1980, R.K. WATTS et al.: "Electron Beam Lithography for Small MOSFETs", pages 772-775 see figure 2; page 772, left-hand column, line 9 from bottom - page 772, right-hand column, line 1 * |
| PATENT ABSTRACTS OF JAPAN, Volume 7, No. 83 (C-160)(1223), 7 April 1983, see the whole documents & JP, A, 5811786 (Matsushita Denki Sangyo K.K.) 22 January 1983 * |
| PATENT ABSTRACTS OF JAPAN, Volume 9, No. 262 (P-398)(1985), 19 October 1985, see the whole document, & JP, A, 60111243 (Nippon Denshin Denwa Kosha) 17 June 1985 * |
| VLSI Electronics: Microstructure Science, Volume 8, 1984, Academic Press, Inc., J.B. KRUGER et al.: "Trilayer Resist", pages 91-136, chapter 5, see page 108, section IV.A.2. "E-Beam Lithographyy; page 112, section IV.B.3. "Etching of the Transfer Layer"; page 117, Section IV.C.4. "Etching of the Base Layer" * |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63502936A (ja) | 1988-10-27 |
| WO1987006029A2 (fr) | 1987-10-08 |
| ES2004266A6 (es) | 1988-12-16 |
| SG123292G (en) | 1993-02-19 |
| EP0268595B1 (fr) | 1992-06-10 |
| KR880701400A (ko) | 1988-07-26 |
| EP0268595A1 (fr) | 1988-06-01 |
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