WO1989007796A1 - Systeme de commutation repartie - Google Patents

Systeme de commutation repartie Download PDF

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Publication number
WO1989007796A1
WO1989007796A1 PCT/FI1989/000026 FI8900026W WO8907796A1 WO 1989007796 A1 WO1989007796 A1 WO 1989007796A1 FI 8900026 W FI8900026 W FI 8900026W WO 8907796 A1 WO8907796 A1 WO 8907796A1
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WO
WIPO (PCT)
Prior art keywords
elements
switching
switch
switch group
members
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/FI1989/000026
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English (en)
Inventor
Tapani Antero ÄIJÄNEN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
VTT Technical Research Centre of Finland Ltd
Original Assignee
VTT Technical Research Centre of Finland Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by VTT Technical Research Centre of Finland Ltd filed Critical VTT Technical Research Centre of Finland Ltd
Publication of WO1989007796A1 publication Critical patent/WO1989007796A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
    • G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture

Definitions

  • the present invention relates to a distributed switching system composed of switching members and elements which are interconnectable through the switching members.
  • elements mean processors and other parts or facilities, of the same type and/or of several different types, which can be switched together at least in pairs.
  • Such elements to be used in computers can be for instance processors, storages (central and mass storages) and input and output devices (terminals, parallel buses).
  • hypercube a permanent topology
  • permanent switching has the drawback that several algorithms of different types cannot optimally be fitted therein, in other words the generally used multiprocessor system with permanent switching is cumbersome to realize.
  • the hypercube topology it has been attempted to create an embodiment with as large a range of general applications as possible, but even it has its deficiencies, if all of the generally used topologies are wished to be realized; one example is the binary tree.
  • Another problem with the hypercube is that an extension in the system requires that the number of channels in between the processors must be increased.
  • the object of the present invention is, among others, to eliminate the aforementioned drawbacks and to realize a distributed switching system, where some of the problems connected to switching systems composed of lnterconnectable elements are solved. This is achieved by means of the characteristic novel features of the invention which are enlisted in the appended patent claims.
  • the distributed switching system is composed of switching members and elements which are interconnectable through the switching members.
  • the Invention is characterized in that the switching members are controllable members and that they are arranged in switch groups, which switch groups are interconnected by means of at least one channel to form a regular network, and each switch group is connected to at least one element, so that each switch group communicates, through the rest of the switch groups, with the elements connected thereto, and directly with one or several elements connected to this particular switch group.
  • the number of the switching elements grows as comparable to the number of the processors or corresponding elements.
  • the number of processors can be increased by providing the system with a pair of processor and switch group.
  • the controlling of the switch group can be carried out either locally or centrally. Local control also simplifies the realization of the dynamic configuration. Dynamic configuration means that the topology of the system can be changed during the performance of a program. This also requires that the local control units know the mode of the switched processors.
  • a multiprocessor system with the distributed switching system of the invention can be divided into sections so that several users can indipendently and simultaneously use smaller sections of the whole system.
  • the switching members are realized in switch groups, i.e.
  • At least one uniform physical unit i.e. a module
  • at least one uniform physical unit is formed of one switch group and of one or several elements connected thereto.
  • at least one uniform physical unit i.e.
  • a module is formed of a number of switch groups.
  • at least one uniform physical unit i.e. a module, is formed of elements.
  • at least part of the elements to be switched are permanently interconnected.
  • figure 1 is an illustration of the distributed switching system of the invention
  • figure 2 is an illustration of another distributed switching system which is realized for a four-channel processor.
  • the distributed switching system is composed of the switch groups K and switchable elements E, figure 1.
  • the elements E to be switched are meant to be switched together at least in pairs through the switch groups.
  • the elements E can be microprocessors or other electric, acoustic, optical or the like parts or devices, which are suited for example to the processing or storage of signals, as was maintained above.
  • the switch groups K are composed of a number of controllable switching members, wherethrough signals can be transmitted when the switch is on, and the transmission of signals can be prevented when the switch is off. By means of the control unit 0, the modes (on/off) of the switching member are set and supervised.
  • the method of realizing the switch group has its effect on the fact how freely the elements can be switched together.
  • switchings in between two points only, but it is clear that the same principle can be applied to bus-type channel structures as well.
  • the most common way of realizing a switch group is the cr ⁇ ss-switching matrix, i.e. the switch matrix. By means of this, switchings can be made freely in between the input and output poles of the matrix. Switch groups realized in some other fashion can naturally also be considered. depending on the particular modification of the invention.
  • the switch groups K are interconnected to form a permanent network, as is seen from figure 1.
  • Each switch group K is provided with the switchable elements E.
  • one switch group K receives signals both from other switch groups and from the switchable elements.
  • the ratio of these signal types can vary according to the particular application in question.
  • the permanent network formed by the switch groups K and elements E i.e. the switching topology, can also vary according to the application.
  • a two-dimensional, four-directional network is one possibility, but in some cases for instance a n-dimensional hypercube can be employed.
  • each switch group is connected to the local control units 0, which are also switched together in order to enable global control, for example by means of a common main control unit.
  • the distributed switching system of figure 1 is in principle composed of two types of physical modules which are permanently switched together, i.e. the switch groups K and the elements E.
  • FIG. 2 illustrates a distributed switching system of the invention, where four four-channel processing elements P are connected to the 32-channel switch group K.
  • the switch group K and the four processors P advantageously form one physical unit, i.e. the module M.
  • These modules M are interconnected, according to the drawing, by means of the four channels k.
  • the extreme ends a and b of the thus created network can be connected to each other, so that a toroid formed of the switch groups is obtained.
  • switch groups can be switched, whereby signals only between the switch groups of the original switching can be interconnected.
  • switch groups are advantageously formed as modules. By means of them, the efficiency and versatility of the switching system can be easily increased.
  • the distributed switching system of the invention it is also possible to use partly such elements which are permanently interconnected. Thus the number of required switching members is cut down. However, this presupposes that the switchable elements contain several linkage channels.
  • the complexity of the employed switching members and switching groups can be designed to correspond to the quality and quantity of the required topologies. For example, by means of the distributed switching system of figure 2 , the following generally used topologies can be realized so that the switchings are regular and the processors or other such elements are symmetrically used: network (four-directional), binary tree, ternary tree, ring, toroid and four-dimensional hypercube.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

On a mis au point un système de commutation répartie composé d'organes de commutation et d'éléments que l'on peut interconnecter par l'intermédiaire d'organes de commutation. Lesdits organes de commutation peuvent être commandés et sont agencés en groupes de commutateurs (K). Les groupes de commutateurs sont interconnectés afin de former un réseau régulier, et chaque groupe de commutateurs est connecté à au moins un élément (E, P). Chaque groupe de commutateurs communique, par le reste des groupes de commutateurs, avec les éléments lui étant connectés, et directement avec le ou les éléments connectés à ce groupe de commutateurs particulier.
PCT/FI1989/000026 1988-02-17 1989-02-15 Systeme de commutation repartie Ceased WO1989007796A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI880753A FI78995C (fi) 1988-02-17 1988-02-17 Foerdelat inkopplingssystem.
FI880753 1988-02-17

Publications (1)

Publication Number Publication Date
WO1989007796A1 true WO1989007796A1 (fr) 1989-08-24

Family

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Application Number Title Priority Date Filing Date
PCT/FI1989/000026 Ceased WO1989007796A1 (fr) 1988-02-17 1989-02-15 Systeme de commutation repartie

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FI (1) FI78995C (fr)
WO (1) WO1989007796A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19754466A1 (de) * 1997-12-08 1999-06-10 Czech Christian B Mehrprozessorsystem mit Zellenvermittlung zur Topologie-invarianten, nachrichtenorientierten Kommunikation

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103753A (en) * 1980-01-23 1981-08-19 Hitachi Ltd Data transmission system between electronic computers
EP0104802A2 (fr) * 1982-09-02 1984-04-04 Unisys Corporation Module à cinq portes utilisé comme noeud dans un réseau asynchrone indépendant de la vitesse de processeurs concurrents
US4466064A (en) * 1980-05-14 1984-08-14 U.S. Philips Corporation Multiprocessor computer system for executing a splittable algorithm, notably a recursive algorithm
WO1987002157A1 (fr) * 1985-10-02 1987-04-09 American Telephone & Telegraph Company Reseau de commutation maille
DE3616821A1 (de) * 1986-05-17 1987-11-19 Hilberg Wolfgang Netzwerke von n-dimensionalen wuerfeln und prismen fuer die informationstechnik

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103753A (en) * 1980-01-23 1981-08-19 Hitachi Ltd Data transmission system between electronic computers
US4466064A (en) * 1980-05-14 1984-08-14 U.S. Philips Corporation Multiprocessor computer system for executing a splittable algorithm, notably a recursive algorithm
EP0104802A2 (fr) * 1982-09-02 1984-04-04 Unisys Corporation Module à cinq portes utilisé comme noeud dans un réseau asynchrone indépendant de la vitesse de processeurs concurrents
WO1987002157A1 (fr) * 1985-10-02 1987-04-09 American Telephone & Telegraph Company Reseau de commutation maille
DE3616821A1 (de) * 1986-05-17 1987-11-19 Hilberg Wolfgang Netzwerke von n-dimensionalen wuerfeln und prismen fuer die informationstechnik

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19754466A1 (de) * 1997-12-08 1999-06-10 Czech Christian B Mehrprozessorsystem mit Zellenvermittlung zur Topologie-invarianten, nachrichtenorientierten Kommunikation

Also Published As

Publication number Publication date
FI880753A0 (fi) 1988-02-17
FI78995B (fi) 1989-06-30
FI78995C (fi) 1989-10-10

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