WO1991018331A1 - Dispositif et procede de mesure numerique du temps - Google Patents

Dispositif et procede de mesure numerique du temps

Info

Publication number
WO1991018331A1
WO1991018331A1 PCT/JP1990/000663 JP9000663W WO9118331A1 WO 1991018331 A1 WO1991018331 A1 WO 1991018331A1 JP 9000663 W JP9000663 W JP 9000663W WO 9118331 A1 WO9118331 A1 WO 9118331A1
Authority
WO
WIPO (PCT)
Prior art keywords
clock
time
sub
base clock
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP1990/000663
Other languages
English (en)
Japanese (ja)
Inventor
Sinji Inoue
Hiroaki Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Corns & Co Ltd
Original Assignee
Corns & Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Corns & Co Ltd filed Critical Corns & Co Ltd
Priority to PCT/JP1990/000663 priority Critical patent/WO1991018331A1/fr
Publication of WO1991018331A1 publication Critical patent/WO1991018331A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means
    • G04F10/04—Apparatus for measuring unknown time intervals by electric means by counting pulses or half-cycles of an AC

Definitions

  • the present invention relates to a digital time measuring technique, and more particularly to a digital time measuring device and method capable of measuring a short time interval in a minute time unit with high accuracy and complete digital measurement.
  • a device for digitally measuring a minute time there are (1) a device that uses a reference clock having a high frequency and counts the reference clock during the time to be measured. (2) Using two signals with slightly different frequencies, each is counted asynchronously during the measured time, and the difference between the counts is cumulatively sampled and averaged.
  • a reference clock having a high frequency
  • two signals with slightly different frequencies each is counted asynchronously during the measured time, and the difference between the counts is cumulatively sampled and averaged.
  • two signals having slightly different frequencies and having periods Tl and ⁇ 2 (hereinafter referred to as a page clock and a subclock, respectively) )
  • ⁇ is the number of repetitions of the base clock at the time of simultaneous detection.
  • the base clock is synchronized at the start of the time to be measured.
  • the start-up period is detected and the rising edge (or falling edge) of the synchronous base clock is detected and the clock related to the base clock is detected.
  • Make one counter count up The sub clock is started synchronously at the end point of the time to be measured, the rising edge (or falling edge) of the synchronous sub clock is detected, and the sub clock is detected.
  • the other counter associated with the counter is counted, noped, and stopped, and at this time, the one counter is stopped.
  • time can be measured with complete digital accuracy.
  • Another object of the present invention is to configure a digital time measuring device using a basic circuit suitable for the implementation of IC.
  • FIGS. 2 and 3 are timing charts useful for explaining the operation of obtaining the least common multiple of the period in the apparatus of FIG.
  • FIG. 6 is a circuit diagram showing one embodiment of a two-edge simultaneous detection circuit of the apparatus shown in FIG.
  • Fig. 7 is an operation timing chart of the two-edge simultaneous detection circuit.
  • FIG. 8 is a circuit diagram showing one embodiment of a synchronization circuit of the apparatus of FIG.
  • Figure 9 is a timing chart of the operation of the synchronous circuit.
  • the counter 14 is counted up and the counter 14 is stopped at this time, and the count number n is held.
  • the counter 14 is detected by detecting that the rising edges of the synchronization base clock S 1 ′ and the synchronization sub-clock S 2 ′ occur at the same time.
  • the number of counts is kept at m.
  • a counter output valid display signal is output from the Q output of the two-edge simultaneous detection circuit 15, and in response to this display signal, the calculation circuit 16 calculates the number of counts n, m, and the period.
  • the measured time T becomes
  • the inverting circuits 63 and 64 give a delay of about 2 ns to the input signal to create a sampling time d for edge detection.
  • the NAND gates 61 and 62 receive the input signal and the delay signals A and B, and make sampling pulses C and D for each signal. By taking the NOR logic of these sampling pulses at NOR gate 65, a positive sampling pulse is generated at point E.
  • the NOR gates 66 and 67 form an R-S flip-flop. The positive sampling pulse is input to the R-S flip-flop set terminal. An external reset signal is supplied to the RESET pin. The output of the flip-flop is connected to the Q terminal. As is clear from Fig.
  • FIG. 8 is a schematic circuit diagram showing the configuration of a synchronous circuit
  • FIG. 9 is a timing chart useful for explaining the operation of the circuit of FIG.
  • the synchronization circuit is a circuit that synchronizes the reference clock with an external trigger signal and outputs it. It can be realized by applying the two-edge simultaneous detection circuit in Fig. 6.
  • Figure 8 In Figure 8,
  • synchronization is performed at the rising edge of the trigger.
  • the trigger is applied to the I 2 input of all 2-edge simultaneous detection circuits. Input the inverted signal of the trigger, delete the inverting circuit 88 for the reset signal, connect the reset terminal directly to the trigger input, and connect to one input of the AND gate 87 of the F0 output. What is necessary is just to connect the inversion signal of the trigger input.
  • the device of the present invention can be integrated as a completely digital circuit, and can be applied to general vehicles such as measurement of inter-vehicle distance and vehicle speed control; It can be applied to various fields, such as control of aircraft rockets, missiles, artificial satellites, and control systems based on real-time measurement of the distance, speed, and acceleration of aircraft.
  • FIG. 10 is a circuit diagram showing a schematic configuration of a high-precision digital frequency counter.
  • D flip-flops 101, 102, 103, 104, and NOR gate 105 are connected as shown in FIG. I have.
  • FIG. 11 is a timing chart useful for explaining the operation of the circuit of FIG. If the start and stop input signals are generated using the edge of one cycle of the signal under test S, this circuit can be applied as it is as a frequency counter.
  • Frequency F is the measured time m

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Unknown Time Intervals (AREA)

Abstract

Une impulsion d'horloge de base (S1) et une impulsion de sous-horloge (S2) ayant des fréquences légèrement différentes sont déclenchées simultanément en synchronisme (11, 13) et les deux fronts des deux impulsions d'horloge sont détectés simultanément (15), ce qui permet de déterminer une fréquence M de répétition des impulsions de sous-horloge correspondant à un plus petit commun multiple des périodes des deux impulsions d'horloge (16). L'impulsion d'horloge de base est déclenchée de façon synchrone au point de départ du temps à mesurer et l'impulsion de sous-horloge est déclenchée de façon synchrone au point terminal du temps à mesurer, ce qui permet de déterminer le nombre n des impulsions d'horloge de base comptées au point terminal et le nombre m des impulsions de sous-horloge comptées au moment où les fronts de l'impulsion d'horloge de base et de l'impulsion de sous-horloge sont détectés simultanément (12, 14, 15), pour permettre de déterminer la durée du temps à mesurer sur la base du nombre n, m, et M et de la période (T1) de l'impulsion d'horloge de base (16).
PCT/JP1990/000663 1990-05-24 1990-05-24 Dispositif et procede de mesure numerique du temps Ceased WO1991018331A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP1990/000663 WO1991018331A1 (fr) 1990-05-24 1990-05-24 Dispositif et procede de mesure numerique du temps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1990/000663 WO1991018331A1 (fr) 1990-05-24 1990-05-24 Dispositif et procede de mesure numerique du temps

Publications (1)

Publication Number Publication Date
WO1991018331A1 true WO1991018331A1 (fr) 1991-11-28

Family

ID=13986523

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1990/000663 Ceased WO1991018331A1 (fr) 1990-05-24 1990-05-24 Dispositif et procede de mesure numerique du temps

Country Status (1)

Country Link
WO (1) WO1991018331A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5867695A (en) * 1992-10-16 1999-02-02 International Business Machines Corp. Method and system for reduced metastability between devices which communicate and operate at different clock frequencies
WO2018050798A1 (fr) * 2016-09-16 2018-03-22 Universität Rostock Dispositif de traitement de signal et dispositif de mesure pour mesurer très précisément le temps de propagation de deux signaux

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62228190A (ja) * 1986-03-29 1987-10-07 Asia Electron Kk 時間測定装置
JPS62228174A (ja) * 1986-03-29 1987-10-07 Asia Electron Kk 周期／周波数測定装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62228190A (ja) * 1986-03-29 1987-10-07 Asia Electron Kk 時間測定装置
JPS62228174A (ja) * 1986-03-29 1987-10-07 Asia Electron Kk 周期／周波数測定装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5867695A (en) * 1992-10-16 1999-02-02 International Business Machines Corp. Method and system for reduced metastability between devices which communicate and operate at different clock frequencies
WO2018050798A1 (fr) * 2016-09-16 2018-03-22 Universität Rostock Dispositif de traitement de signal et dispositif de mesure pour mesurer très précisément le temps de propagation de deux signaux

Similar Documents

Publication Publication Date Title
CN104950169B (zh) 一种高速光纤陀螺频率特性的测试方法与系统
JP3196254B2 (ja) 微小時間計測方法及び微小時間計測装置
WO1991018331A1 (fr) Dispositif et procede de mesure numerique du temps
RU2124222C1 (ru) Подвижный пеленгатор
CN110687773B (zh) 时间统一系统授时精度的测量方法、装置和系统
CZ20032393A3 (cs) Zařízení pro měření časových intervalů
JPWO1991018331A1 (ja) デジタル時間測定装置および方法
RU2106603C1 (ru) Ультразвуковой расходомер
Chandran et al. FPGA based ToF measurement system for ultrasonic anemometer
CN113328745A (zh) 一种时间间隔测量系统及方法
JP2917942B2 (ja) パルス光時間間隔計測方式およびパルス光時間間隔計測方法
RU2561999C1 (ru) Интерполирующий преобразователь интервала времени в цифровой код
US4312239A (en) Method and apparatus for ultrasonic measurement of the rate of flow
RU2661065C1 (ru) Цифровой фазометр
RU2207579C1 (ru) Цифровой фазометр
US4297703A (en) Telemetry device for tracking radar and radar system comprising such a device
US20230366670A1 (en) Data age reduction
US3278845A (en) System for measuring a recurring time interval utilizing the vernier principle
SU1679399A1 (ru) Измеритель амплитуды гармонического сигнала
JP2002372578A (ja) 距離計
Jachna et al. Parallel data processing in a 3-channel integrated time-interval counter
SU898468A1 (ru) Устройство дл считывани графической информации
JP2898371B2 (ja) レーザ干渉装置
JPH0630439B2 (ja) 正弦波信号の零交差点検出装置
RU2044407C1 (ru) Устройство для распознавания импульсных сигналов с внутриимпульсной модуляцией

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP KR US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH DE DK ES FR GB IT LU NL SE