WO1996010861A1 - Convertisseur ca/cc - Google Patents

Convertisseur ca/cc Download PDF

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Publication number
WO1996010861A1
WO1996010861A1 PCT/GB1995/002324 GB9502324W WO9610861A1 WO 1996010861 A1 WO1996010861 A1 WO 1996010861A1 GB 9502324 W GB9502324 W GB 9502324W WO 9610861 A1 WO9610861 A1 WO 9610861A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
current
converter
phase arm
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/GB1995/002324
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English (en)
Inventor
Jan Abraham Ferreira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GRINAKER ELECTRONICS Ltd
Original Assignee
GRINAKER ELECTRONICS Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GRINAKER ELECTRONICS Ltd filed Critical GRINAKER ELECTRONICS Ltd
Priority to AU35729/95A priority Critical patent/AU3572995A/en
Publication of WO1996010861A1 publication Critical patent/WO1996010861A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4258—Arrangements for improving power factor of AC input using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/40—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC
    • H02M5/42—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters
    • H02M5/44—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC
    • H02M5/453—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/458—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into DC by static converters using discharge tubes or semiconductor devices to convert the intermediate DC into AC using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
    • Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Definitions

  • This invention relates to an AC to DC converter.
  • switch mode power supplies with a bridge rectifier at the input followed by capacitor typically have a power factor of less than 0,7.
  • Conductive and radiative interferences may be generated as a result of the switching transients. This can detrimentally effect other electronic equipment.
  • an AC to DC converter comprising:
  • a transformer is coupled between first aiid second switch nodes in the first and second phase arms, and control means are provided for operating the first and second phase arms with switching control signals in such a way that the average voltage between the first and second switch nodes approaches zero.
  • the first soft switching phase arm defines a zero voltage switching pole and carries at least a first control switch
  • the second soft switching phase arm conveniently defines a zero current switching pole carrying a second pair of controlled switches, with the operation of the switches being controlled by the control means, which is typically a PWM or hysteresis controller.
  • the first soft switching phase arm carries a first pair of controlled switches. In another form of the invention, the first soft switching phase arm carries a single controlled switch, and a DC blocking capacitor is provided between the first and second switch nodes.
  • control means includes an input current controller and an output voltage controller, with the input current controller being arranged to control the operation of the second phase arm and the output voltage controller being arranged to control the operation of the first phase arm.
  • the phase of the current through the first phase arm lags the phase of the current through the second phase arm.
  • the input current controller has as inputs a current feedback loop for feeding back a portion of the input AC current, and a voltage feedback loop for supplying DC bus voltage to a first voltage compensator forming part of the input current controller, the voltage compensator being arranged to output an error voltage signal representative of the difference between a DC reference voltage and the DC bus voltage.
  • the duty cycle conveniently determines the magnitude of the line current through the first and second arms.
  • the output voltage controller may include a second voltage compensator which is supplied by rectified output voltage from a secondary winding of an output transformer of the converter circuit, and delay circuitry for varying an additional charging period, the delay circuitry being arranged to be fed by an output from the second voltage compensator.
  • the method includes the steps of sensing the power delivered to the load, and advancing the phase of second control signal relative to the first control signal to as to increase the power delivered to the load.
  • the duty cycle is typically varied so that the average voltage at the first and second switch nodes matches sinusoidal variations in the supply voltage.
  • soft switching any form of zero voltage or zero current switching aimed at reducing switching losses.
  • Figure 1 shows a circuit diagram of a prior art partial series resonant converter circuit coupled to a separate rectifying circuit
  • Figure 2 shows a circuit diagram of a first embodiment of an AC to DC converter circuit of the invention
  • Figure 3 shows typical switching waveforms in respect of ten intervals of a single cycle of the converter circuit of Figure 2;
  • FIGS 4 to 13 show equivalent circuits of current flow during the intervals defined in Figure 3;
  • Figure 14 shows a graphical representation of a zero voltage switching area
  • Figure 15 shows a schematic block diagram of the AC to DC converter circuit of Figure 2 incorporating a first embodiment of control circuitry in the form of an input current controller and an output voltage controller;
  • Figures 16 to 19 show respective graphs of boost inductor current; line voltage and line current; first phase arm voltage and resonant inductor current; and second phase arm voltage and resonant inductor current in respect of an experimental lkW off-line converter;
  • Figure 20 shows a circuit diagram illustrating a second embodiment of an AC to DC converter of the invention
  • Figure 21 shows a typical switching waveform in respect of twelve intervals of a single cycle of the converter circuit of Figure 20;
  • Figure 22 shows a circuit diagram illustrating a third embodiment of an AC to DC converter of the invention.
  • Figure 23 shows a schematic block diagram of an AC to DC converter circuit of the invention incorporating a second embodiment of control circuitry
  • Figure 24 shows a graph indicating conducted EMI of a conventional hard switching converter
  • Figure 25 shows a graph indicating conducted EMI of a converter of the present invention.
  • a prior art partial series resonant convertor 10 is shown coupled to a separate rectifying circuit 12 for rectifying AC line current from an AC supply 14.
  • the rectifying circuit 12 includes a four diode bridge Dl to D4, an input inductor Ls and a relatively large DC smoothing capacitor 20.
  • the convertor circuit 22 is provided with first and second phase arms 24 and 26.
  • the first phase arm 24 defines a zero voltage switching pole, and includes controlled switches SI and S2.
  • the diodes Dl and D2 are shunted across the respective switches, as are the resonant capacitors Cl and C2.
  • the second phase arm 26 defines a zero current switching pole, and includes controlled switches S3 and S4.
  • a resonant inductor L r and a primary coil of transformer Tl are connected between first and second nodes 28 and 30 which are defined between the respective switches SI and S2 and S3 and S4.
  • a load 27 is coupled to the secondary coil of the transformer Tl .
  • a filter capacitor C3 is shunted across the load, and the load and filter capacitor are supplied by current from a rectifier bridge which comprises diodes D5 and D6 connected to a centre tap secondary winding of the transformer Tl.
  • the current I s drawn from the supply during a single resonant transition may be considered to be constant.
  • the two control functions of the converter i.e. the provision of sinusoidal supply current and output power, are interwoven in the operation of the converter. The following description of the operation of the converter will therefore deal with both control functions as they arise.
  • the operation of the converter may be understood by considering each of the switching intervals separately.
  • Typical switching waveforms for the converter are shown in Figure 3.
  • the circuit is simplified by assuming a constant input current and a constant output voltage referred to the primary of the transformer, over one switching cycle.
  • the 220V/50Hz supply and the inductor Ls is thus substituted with a current source so as to simplify the explanation of the operation of the circuit.
  • Interval 1 Adjustable interval for pulse width modulation and sinusoidal current.
  • interval 1 the current in the transformer is zero.
  • Current I s from the source is charging the primary storage element 20 via diodes Dl and D4.
  • the switch S3 is on and the voltage across the transformer is zero, with no power being delivered to the load.
  • the equivalent circuit indicating the current flow is shown in bold in Figure 4. This first interval may be adjusted in order to regulate the power delivered to the load, as well as the power delivered to charge the capacitor 20.
  • the current in inductor L r is given by: j _ Vb S _ -V S m t (1) r
  • V ota is the primary referred voltage and assumed to be constant over one switching cycle.
  • Switch SI is turned off, and the voltage in the first or left phase arm (VI in Figure 2), resonantly falls to the negative supply rail.
  • the equivalent circuit is shown in bold in Figure 7.
  • the voltage VI is given by:
  • the current in the transformer is given by:
  • the zero voltage switching area given by equation 6 is shown in Figure 14.
  • the difference between the initial resonant inductor current and the supply current is multiplied by the characteristic impedance of the resonant circuit, and plotted with respect to the voltage output / input ratio.
  • the DC bus voltage is used as a parameter.
  • the zero voltage switching area is to the left of the curves.
  • Interval 5 Discharge interval a.
  • Interval 6 Discharge interval b.
  • Interval 7 Adjustable period for output control and sinusoidal current.
  • interval 1 is similar to interval 1, where there is no voltage across the transformer and no power is delivered to the load. This period may be regulated in order to control the output power and input current. This interval differs from interval 1 in that the input current source is now not delivering any power to the dc bus capacitor 20, as can be seen in the equivalent circuit in bold in Figure 10.
  • Interval 8 Flux balancing period.
  • Switches S3 and S4 are turned on and the current in the resonant inductor and the transformer is allowed to increase in a direction opposite to that in interval 2 to interval 6.
  • the time these two switches are kept on is determined by the time necessary to counteract the unbalanced charging current in intervals 2 and 3, and to ensure symmetrical operation of the transformer.
  • the equivalent circuit is shown in bold in Figure 11. The current increase is given by:
  • the voltage VI is given by:
  • the current in the transformer is given by:
  • Interval 10 Discharge interval.
  • the functional block diagram of the control circuit is shown in Figure 15.
  • the control circuit consists of an input current controller 32 and an output voltage controller 30.
  • the input current controller includes a voltage compensator 34 having as inputs a DC reference voltage and the actual DC bus voltage and as an output an error voltage signal representing the difference between the DC reference voltage and the DC bus voltage.
  • a multiplier 36 multiplies a sinusoidal reference current with the error signal, and a 100Hz notch filter 38 is included after the multiplier 36 and before a switching controller 40, which may be in the form of a discreet pulse modulator or a hysteresis controller.
  • the hysteresis controller is in turn linked to logic circuitry 42 which is connected to the base of the respective switches S3 and S4 of the second phase arm via driver circuitry.
  • the input current controller 32 has two feedback loops, namely an inner current loop 44 which feeds back a portion of the current I s and an outer voltage loop 46 which supplies actual DC bus voltage to an input of the voltage compensator 34.
  • the output voltage controller 30 performs two main functions.
  • the first function is varying of the additional charging period denoted by interval 3 and indicated at 48. By varying the additional charging period, the peak current of I r is controlled, thereby adjusting the additional current to the load.
  • a voltage compensator 50 is supplied by a rectified output voltage from the secondary of the transformer Tl, and has as an additional input a reference voltage Vref.
  • the outputs of the voltage compensator 50 for controlling the switches SI and S2 of the first arm are fed via delay circuitry 48 for implementing the additional charging period and through respective flip flops 52 and 54 to switching logic circuitry 56.
  • the switching logic circuitry 56 feeds output control signals to driver circuitry for driving the switches SI and S2.
  • a polarity sensor 57 for sensing the polarity of the current I provides a further input to the switching logic circuitry.
  • a flux sensor 58 is used to control the magnitude of the voltage across the transformer Tl to prevent saturation. The flux sensor 58 may be omitted if a blocking capacitor is used.
  • each resonant cycle i.e. from intervals 2 to 6 and from intervals 8 to 10 is initiated by the switching of one of the switches S3 or S4 in the second phase arm 2b. After one of these two switches have closed, the corresponding switch in the first phase arm is turned on after the voltage across it has resonated to zero.
  • the sub-circuit consisting of D3, D4, L s , SI, S2, Dl and D2 can be thought of as a boost converter, with operation intervals 1 and 7.
  • This boost converter is controlled via switches S3 and S4. Any pulse width modulation scheme may be implemented in order to draw a sinusoidal current from the supply.
  • a hysteresis controller was used, similar to that used in boost-type power factor pre-regulators.
  • the amplitude of the input reference current is scaled in order to maintain the DC bus voltage at the reference value.
  • switches SI and S2 are turned on at zero voltage.
  • a zero voltage detector across each of the resonant capacitors determines this time.
  • the regulation of the output power is accomplished by regulating, over the additional charging period ⁇ t of interval 3, the amplitude of the current pulses. If the output voltage is greater than half the DC bus voltage there is a certain rninimum time interval ⁇ t that must be met in order for zero voltage switching to take place. For low load conditions this minimum charging time will necessitate a decrease in switching frequency.
  • the flux balancing of the transformer core is accomplished by integrating the voltage from a separate sense winding on the transformer.
  • the flux balancing period (interval 8) will remain active until the core has reset.
  • a 1 kW off-line converter was constructed with the following specifications:
  • the input current control loop was implemented with a constant band 17
  • Figure 16 shows the input boost inductor current.
  • the in phase line current and line voltage are shown in Figure 17.
  • the first phase arm voltage (VI as defined in Figure 2) where zero voltage switching occurs is shown in Figure 18.
  • the second phase arm voltage (V2 as defined in Figure 2) where zero current switching takes place is shown in Figure 19.
  • the off-line unity power factor AC-DC converter of the invention is suitable for high power levels. Due to the low switching stresses on the semiconductors, it is possible to switch at a high frequency (50kHz and higher).
  • an alternative embodiment of an AC to DC convertor having first and second arms 62 and 64, with the first arm 62 being substantially identical to the first arm 24 of the convertor 22 and defining a zero voltage switching pole.
  • the second arm 64 defines a zero voltage switching pole which is similar to the zero voltage switching pole 62, having a pair of diodes D3 and D4 shunted across the respective switches S3 and S4.
  • a pair of resonant capacitors C4 and C5 are similarly shunted across the respective diodes D3 and D4.
  • the capacitors C4 and C5 may partly or fully be constituted by the parasitic capacitance of the diodes and switches.
  • An inductor L P is also provided in parallel with the primary coil of the transformer Tl and the inductor L R . This inductor provides freewheeling current essential for zero voltage switching of the phase arm 64.
  • a typical switching waveform is shown, which is similar to the waveform illustrated in Figure 3, with the exception that during intervals 1 and 7 the current I. is not zero but has a small value which decays slowly.
  • resonant transition intervals 11 and 12 are inserted between respective intervals 1 and 2 and intervals 7 and 8 during which period resonance takes between the combined capacitances of capacitors C4 and C5, and inductor L P .
  • a DC blocking capacitor with a value typically larger than 1 ⁇ F is inserted in series with the primary coil of the transformer. This constitutes passive means, in contrast with the active control used in the first embodiment of the invention, to prevent the transformer Tl from saturating.
  • a capacitor is indicated in broken outline at 68 in Figure 2 of the specification. The capacitor may also be included in the second embodiment of the converter circuit illustrated in Figure 20, as is shown in at 68a.
  • a full four diode bridge is connected directly over the mains supply.
  • This variation is illustrated in Figure 22, where the full diode bridge is indicated at 70, and is shown as a replacement for the two diode power supply 72.
  • the switch SI becomes optional, and can actually be eliminated. As a result, a larger DC voltage will appear across the capacitor 68.
  • the full diode bridge 70 may be similarly connected to the previous embodiments of the circuit described above.
  • the input current controller 74 includes a constant or fixed frequency pulse width modulation (PWM) pre-regulator controller 78 which has as its inputs an inner current feedback loop 44A and an outer feedback voltage loop 46A, both of which are similar to the feedback loops 44 and 46 of the input current controller 32 in Figure 15.
  • PWM pulse width modulation
  • the pre-regulator controller may be in the form of a fixed frequency PWM controller IC such as a UC1854.
  • the controller could be a hysteresis controller which will allow the switching frequency to vary, and which provides a current waveform of the type illustrated in Figure 16.
  • An output from the pre-regulator controller 78 leads to a duty cycle limiter 80 which is in turn arranged to complementally drive the switches S3 and S4.
  • a synchronising line 82 leads from an output of the duty cycle limiter to a phase controller 84 which forms part of the output voltage controller.
  • the phase controller in conjunction with a dead time logic circuit 86, provides an adjustable time delay between the switching of the first and second switch pairs as constituted by the respective switches SI and S2 and S3 and S4.
  • the dead time logic circuit 86 provides a dead time allowing for the voltage of the common node 28 between switches SI and S2 to change from the negative rail voltage to the positive rail voltage and vice versa before the switchover is completed.
  • the voltage compensator 50 is supplied by a rectified output voltage from the secondary of the transformer Tl, from which it obtains a measured voltage value. From this measured value, it calculates an error signal which is passed to the phase controller 84 by an error signal line 88.
  • the phase controller adjusts the phase lag or time delay according to the error signal. In this embodiment, no flux sensor is needed because of the presence of the DC decoupling or blocking capacitor 68.
  • the conducted EMI of a converter of the present invention is significantly lower than that of a conventional hard switching converter.
  • the lower conducted EMI can be attributed to the slower rate of voltage rise and fall on the boost converter in the first or left phase arm.
  • a further advantage that the present converter enjoys over conventional converters is that it is able to achieve a higher switching frequency due to soft switching of all the switches, thereby making it possible to reduce the size of the input inductor L s and the transformer Tl.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)

Abstract

Un convertisseur CA/CC comporte un circuit de prérégulation de facteur de puissance qui permet de conditionner un courant CA d'entrée. Un circuit convertisseur CC/CC est monté en cascade après ce circuit de prérégulation de facteur de puissance pour fournir une tension CC de sortie à une charge. Un premier élément de phase de commutation douce définissant un pôle de commutation au zéro de la tension est partagé par le circuit de prérégulation de facteur de puissance et le circuit convertisseur CC/CC. Un deuxième élément de phase de commutation douce définissant un pôle de commutation au zéro du courant fait partie du circuit convertisseur CC/CC. Un transformateur est couplé entre les premier et deuxième n÷uds du commutateur dans les premier et deuxième éléments de phase respectivement, et un circuit de commande permet de faire fonctionner les premier et deuxième éléments de phase pour commuter les signaux de commande. L'invention concerne aussi un procédé permettant de faire fonctionner un convertisseur CA/CC en utilisant les premier et deuxième signaux de commande présentant sensiblement le même cycle de travail, et de modifier la phase entre ces premier et deuxième signaux de commande pour régler la puissance de sortie transmise à la charge.
PCT/GB1995/002324 1994-09-30 1995-10-02 Convertisseur ca/cc Ceased WO1996010861A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU35729/95A AU3572995A (en) 1994-09-30 1995-10-02 Ac to dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ZA947666 1994-09-30

Publications (1)

Publication Number Publication Date
WO1996010861A1 true WO1996010861A1 (fr) 1996-04-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1995/002324 Ceased WO1996010861A1 (fr) 1994-09-30 1995-10-02 Convertisseur ca/cc

Country Status (3)

Country Link
AU (1) AU3572995A (fr)
WO (1) WO1996010861A1 (fr)
ZA (1) ZA958443B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100379119C (zh) * 2005-04-13 2008-04-02 台达电子工业股份有限公司 具有功率因数校正和直流-直流转换功能的转换装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3702834A1 (de) * 1987-01-30 1988-08-11 Reo Boris Von Wolff Wechselspannungsstabilisator
EP0394966A2 (fr) * 1989-04-25 1990-10-31 Matsushita Electric Works, Ltd. Alimentation
EP0420628A2 (fr) * 1989-09-29 1991-04-03 Wisconsin Alumni Research Foundation Dispositif de conversion de puissance AC-DC-AC avec peu de commutateurs actifs et régulation d'entrée et de sortie
US5235501A (en) * 1991-07-19 1993-08-10 The University Of Toledo High efficiency voltage converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3702834A1 (de) * 1987-01-30 1988-08-11 Reo Boris Von Wolff Wechselspannungsstabilisator
EP0394966A2 (fr) * 1989-04-25 1990-10-31 Matsushita Electric Works, Ltd. Alimentation
EP0420628A2 (fr) * 1989-09-29 1991-04-03 Wisconsin Alumni Research Foundation Dispositif de conversion de puissance AC-DC-AC avec peu de commutateurs actifs et régulation d'entrée et de sortie
US5235501A (en) * 1991-07-19 1993-08-10 The University Of Toledo High efficiency voltage converter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KHERALUWALA M H ET AL: "A FAST-RESPONSE HIGH POWER FACTOR CONVERTER WITH A SINGLE POWER STAGE", PROCEEDINGS OF THE ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE, MASSACHUSETTS, 25 - 27 JUNE, 1991, no. CONF. 22, 23 June 1991 (1991-06-23), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 769 - 779, XP000278419 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100379119C (zh) * 2005-04-13 2008-04-02 台达电子工业股份有限公司 具有功率因数校正和直流-直流转换功能的转换装置

Also Published As

Publication number Publication date
ZA958443B (en) 1996-05-07
AU3572995A (en) 1996-04-26

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