WO1999009639A2 - Commutation de convertisseur des deux alternances a la tension zero - Google Patents

Commutation de convertisseur des deux alternances a la tension zero Download PDF

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Publication number
WO1999009639A2
WO1999009639A2 PCT/US1998/017264 US9817264W WO9909639A2 WO 1999009639 A2 WO1999009639 A2 WO 1999009639A2 US 9817264 W US9817264 W US 9817264W WO 9909639 A2 WO9909639 A2 WO 9909639A2
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Prior art keywords
primary
switches
switch
voltage
auxiliary
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PCT/US1998/017264
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English (en)
Inventor
Dennis J. Solley
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International Power Systems Inc USA
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International Power Systems Inc USA
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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/34—Snubber circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33571—Half-bridge at primary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/34—Snubber circuits
    • H02M1/342—Active non-dissipative snubbers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/01—Resonant DC/DC converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33573—Full-bridge at primary side of an isolation transformer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • This invention relates generally to power converters and, more particularly, to a DC to DC zero voltage switching converter .
  • Zero voltage switching techniques were developed in response to the demand for small, efficient, light weight switching power supplies capable of processing power at high frequency typically above 200KHz and at high power density typically above 20Watts/cu. in.
  • Zero voltage switching has evolved in the 1990 's from earlier innovations such as zero current switching in the 1980 's and prior resonant techniques. All these techniques attempt to "use” rather than to fight the parasitics, namely stray capacitance and leakage inductance, associated with semiconductors and magnetics, during each switching cycle.
  • the ZVS single-ended forward converter While processing power from a low input voltage (48VDC) for telecommunication purposes, the ZVS single-ended forward converter is close to being an optimum solution. At higher power levels and in off-line applications, employing zero voltage switching techniques with full wave topologies such as the half bridge or full bridge may offer a better solution.
  • the voltage stress on the switching FETs is lowered, as is voltage that the parasitic circuit capacitances are discharged from. That is, less inductive energy per cycle is required to achieve ZVS operation.
  • the present invention utilizes an active clamp circuit, comprised of not one but two auxiliary switches connected in series.
  • This bilateral switch allows current to selectively flow in either direction and may be constructed from bipolar transistors, insulated gate transistors (IGBT) or MOSFET transistors having N or P channels. External diodes or integral body diodes may be employed with these devices to selectively block, or allow the passage of current in both directions.
  • N-channel MOSFET devices having an integral body diode will be used as the preferred embodiment to implement the active clamp for the purposes of this discussion.
  • This active clamp is connected in various configurations across any winding of a power transformer to clamp both the energy accumulated in the magnetic field and also the magnetic flux of the transformer of any full wave converter for a period of time determined by the control function.
  • ZVS zero voltage switching
  • ZVT zero voltage transition
  • the benefits of ZVS or "soft switching" converters compared to “hard switched” converters are well documented: absence of capacitive switching loss, absence of transistor turn-on loss, controlled dV/dt and dl/dt transitions reducing conducted and radiated electromagnetic emissions, constant frequency PWM operation and efficiency improvements in the gate drive of power MOSFETS due to the absence of Miller effects.
  • other advantages include extended duty cycle operation beyond 50% and operation of the transformer core into the third quadrant of the B-H loop.
  • the invention is a half bridge, zero voltage switching, DC-DC converter, having a primary and secondary windings.
  • Each of the two primary switches alternately couples half the input voltage across the primary winding of the transformer.
  • Two auxiliary switches selectively allow the voltage across each primary switch to reach zero sequentially.
  • the primary switches and the auxiliary switches each have an OFF period and an ON period.
  • One auxiliary switch is non- conductive prior to the ON period of the next appropriate primary switch in the switching cycle, for a predetermined period sufficient to allow the voltage across the primary switch to reach zero voltage. This auxiliary switch remains non-conductive for a period after the appropriate primary switch is turned OFF.
  • a fifth and sixth secondary switch is coupled in series with the secondary windings of the trans- former and selectively remain at least partially non- conductive as the voltage across the appropriate primary switch decreases. These fifth and sixth switches become conductive when the voltage across the appropriate main switch reaches zero.
  • Two rectifiers are selectively coupled with the fifth and sixth secondary switches for the means of conducting current to the output.
  • a control circuit selectively operates the main switches, the auxiliary switches and the secondary switches to transfer energy through the converter by modification of the duty cycle of operation of at least the main and auxiliary switches to turn ON the primary switches at zero voltage.
  • the fifth and sixth secondary switches are saturable reactors.
  • the converter may comprise discrete resonant capacitors in parallel with the main switches.
  • each secondary switch and rectifier comprise a unidirectionally controlled switch circuit.
  • the unidirectional controlled switch circuits are selectively operated by the control circuit, so that they remain non- conductive until after the voltage across the appropriate main switch reaches zero and conductive during the appropriate ON time of the main switch.
  • the transformer comprises a plurality of secondary windings.
  • the half bridge topology may be exchanged for a full bridge topology with the necessary drive signals for the two additional two primary switches being provided by the control circuit .
  • a bifilar winding may be wound with primary of the isolation transformer and the auxiliary switches may be series connected across the bifilar winding .
  • the converter further comprises a load in parallel with a filter capacitor and a load inductor.
  • the control circuit comprises a sensory circuit for sensing the voltage across the load.
  • the control circuit maintains a constant voltage across the load by varying the ON period of the primary switches, the auxiliary switches and also the secondary switches, if saturable reactors are not employed.
  • the converter further comprises a voltage reference.
  • the control compares the difference in voltage across the load and the voltage reference.
  • the difference may be directly used to modulate the switches ON time as in voltage mode control.
  • the difference may be compared to an average current or a peak event sensed in the power train before switch modulation is performed as in current mode control .
  • the invention is a half bridge converter in which energy is transferred from a primary winding to a secondary winding of a transformer during each ON period of the primary switches.
  • a circuit is provided for maintaining the magnetic energy stored in the transformer during the OFF period of the primary switches. When this energy is released, it charges/ discharges the voltage across any capacitance associated with the primary switches, the transformer winding and the printed wiring board. In particular, it discharges the voltage across the appropriate primary switch to zero, prior to turn ON of that switch.
  • Two auxiliary switches, each including an anti- parallel diode, is coupled in series connection.
  • a switch control circuit operates the auxiliary switches including the anti-parallel diode in accordance with the control logic such that: (a) one auxiliary switch including the anti- parallel diode is opened prior to the ON period of the appropriate primary switch for a period of time sufficient to discharge the output capacitance of the primary switch;
  • each auxiliary switch including the anti- parallel diode closes after a period of time after the primary switch is driven OFF. This period of time is sufficient to allow the mid point of the primary switches to charge to the mid point of the input source .
  • the primary and/or auxiliary switches may comprise a field effect transistor in parallel with a discrete and/or a body diode, but are not limited to this type of semiconductor.
  • the converter further comprises a circuit for inhibiting current flow in the secondary windings of the transformer until the output capacitance of the appropriate primary switch is discharged.
  • the invention is also a method of operating a half bridge DC to DC converter comprising the steps of storing energy in a primary winding of a transformer by flowing AC current through the primary winding in series with two primary switches. After each primary switch is turned OFF an auxiliary switch in a series connection with a diode (body diode of the other auxiliary switch) and across the primary of the transformer clamps the transformer voltage to almost zero.
  • the circulating current consisting of primary load current and magnetizing current is commutated from the body diode of the second auxiliary switch to its channel by control action.
  • the turn ON of the second auxiliary switch is also accomplished under zero voltage conditions.
  • the transformer's energy including leakage is then clamped by both auxiliary switches to zero volts.
  • the auxiliary switch is opened allowing the transformer's energy to drive the primary switch and circuit capacitances to the other input bus.
  • the voltage across the appropriate primary switch is reduced to zero, thereby allowing the switch to turn on at zero voltage.
  • Voltage discharge is implemented in part and facilitated by selective opening of the appropriate secondary switch in series with one of the secondary windings of the transformer.
  • Figure 1 is a schematic of a half bridge converter made in accordance with the teachings of the present invention.
  • Figures 2a - 2k are timing diagrams for the schematic of Figure 1.
  • Figure 3 shows one embodiment of the invention where the active clamp is placed across a bifilar winding of the transformer.
  • Figure 4 shows one embodiment of the invention where the active clamp is placed across a center-tapped transformer secondary winding.
  • Figure 5 shows one embodiment of the invention where the active clamp is placed across the transformer secondary winding of a current doubler.
  • Figure 6 shows one embodiment of the invention where the active clamp is placed across the transformer of a full bridge converter.
  • Figure 7 shows one embodiment of the invention where three active clamps are placed across the phases of a three phase motor-control bridge.
  • Figure 8 shows one embodiment of the invention where two active clamps are placed across each primary winding of a center-tapped push-pull converter.
  • Figure 9 shows one embodiment of the invention where one active clamp is placed across both primary windings of a center-tapped push-pull converter.
  • a half bridge DC-DC converter is operated with two primary switches in series circuit with a primary winding of the isolation transformer and two auxiliary switches which provide a clamping function across the primary winding.
  • the main switches and auxiliary switches are operated through control logic, so that no primary switch is ON at the same time.
  • a combination of the magnetizing current plus the load current that is cycled by auxiliary field effect transistors generates the zero voltage action.
  • a predetermined time T4-T3 is provided between turning OFF the appropriate auxiliary switch to allow the output capacitance of both main switches and all other circuit parasitic capacitance to be charged/discharged from the mid-point of the DC source to one or the other rail.
  • secondary switches which may be either a saturable reactor in series with the secondary or a selectively controlled switch.
  • a second predetermined time “T2-T1" is provided between turning OFF the primary switch and turning ON the appropriate auxiliary switch to allow the voltage at the midpoint of the primary switches to charge from zero to the midpoint of the input voltage source.
  • primary switches SI and S2 and auxiliary switches S3 and S4 are MOSFETS which are the preferred choice because of the existence within the such devices of body diodes Dl, D2, D3 and D4 respectively, to provide a reverse current flow without an additional external diode.
  • MOSFETS MOSFETS which are the preferred choice because of the existence within the such devices of body diodes Dl, D2, D3 and D4 respectively, to provide a reverse current flow without an additional external diode.
  • the circuit equivalent of the actual MOSFET devices has been illustrated within a dotted outline.
  • the body diodes Dl, D2, D3 and D4 thus represent the parasitic diode within the actual MOSFET. External diodes may be paralleled across SI, S2, S3 or S4 to enhance circuit performance.
  • the circuit equivalent of a transformer Tl is illustrated within a dotted outline and includes the parasitic magnetization inductance Lm and the parasitic leakage inductance Lk.
  • Control signals VGl, VG2 , VG3 and VG4 are provided to the gates of the MOSFETS SI, S2 , S3 and S4 from a control circuit, the timing of which is described in greater detail in connection with Figures 2 and 3.
  • Mode 1 (TO - Tl) Assume the primary switch SI is ON driven by its control signal VGl. Energy flows from the input source VI and the bulk capacitors Cl, C2 through the primary of transformer Tl and switch SI and flows to the output via the secondary winding TS1 and secondary switch S5 and rectifier D5. Auxiliary switch S3 is gated ON by its gate drive VG3 but auxiliary switch S4 is OFF, hence the active clamp selectively blocks the flow of current during Mode 1.
  • the primary switch Si conducts load current and transformer magnetizing current which has a value of -Imag at time "TO” increasing linearly to +Imag at time "Tl".
  • the change in magnetizing current is defined by:
  • the current through the output inductor also increases during this interval by:
  • Gate drive signal VGl turns switch SI OFF at time Tl .
  • the load current and magnetizing current flowing in SI is commutated from its channel to its output capacitance Cl.
  • the switch current I(Sw) charges the output capacitance Cl from zero volts and discharges the output capacitance C2 initially at VI volts in a linear ramp, together with all other circuit capacitances connected to this circuit node VN in Figure 2e.
  • the body diode D4 of auxiliary switch S4 conducts, clamping the transformer primary and leakage inductance Lk to a small voltage ( ⁇ lvolt) .
  • the interval "T1-T2" is short, typically a few hundred nanoseconds, depending on load.
  • T2 - Tl ⁇ ( C1 +C2) *V ⁇ / 2 ) / I ( Sw)
  • the output is being maintained by the energy stored in the output inductor Lo .
  • the output current I(Lo) continues to flow through secondary winding TS1, secondary switch S5 and rectifier D5.
  • reflected load current (Lo) / N continues to flow in the transformer primary, which together with primary magnetizing current Imag is conducted by D4 and auxiliary switch S3.
  • the transformer Tl turns ratio is defined as N:l.
  • gate drive VG4 turns ON the auxiliary switch S4, clamping the transformer primary to essentially zero volts.
  • the reflected load current and magnetizing current now circulate through the transformer primary and auxiliary switches S4 and S3 in a clockwise direction.
  • the transformer flux is clamped since:
  • Mode 4 (T3 - T4) Mode 4 is initiated when control signal VG3 turns
  • T4 - T3 ⁇ ( C1 + C2) * 71/2 ⁇ /
  • This time duration is a little longer than that of mode 2 since I(Sw) is smaller at time “T3" than at time "Tl", depending on the value of Lo .
  • the charging interval is completed when the voltage across Cl is clamped to VI by the body diode D2 across the primary switch S2.
  • Gate drive VG2 drives the primary switch S2 ON, when the voltage across it is essentially zero ( ⁇ -1 volt) .
  • Energy is transferred from primary source VI to Vo, via secondary winding TS2.
  • control signal VG4 maintains auxiliary switch LS4 ON, while control signal VG3 maintains auxiliary switch S3 OFF.
  • the active clamp selectively blocks the flow of current during Mode 5.
  • Gate drive signal VG2 turns switch S2 OFF to terminate Mode 5 operation.
  • the load and magnetizing current I (Sw) flowing in S2 is commutated from its channel to its output capacitance C2.
  • the switch current I (Sw) charges the output capacitance C2 from zero volts and discharges the output capacitance Cl initially at VI volts in a linear ramp, together with all other parasitic capacitance connected to this node.
  • the body diode D3 of auxiliary switch S3 conducts, clamping the transformer primary to a small voltage ( ⁇ lvolt) .
  • the interval "T5-T6" is identical with the interval "T1-T2", given in Mode 2.
  • the output is maintained by the energy stored in the output inductor Lo .
  • the output current continues to flow through the secondary winding TS2 , secondary switch S6 and rectifier D6.
  • gate drive VG3 turns ON the auxiliary switch S3, clamping the transformer primary to essentially zero volts.
  • the reflected load current and primary magnetizing current now circulates through the channels of both auxiliary switches S3 and S4. Operation is identical to that described in Mode 3, with the exception that the current flows counter-clockwise through the transformer and auxiliary switches. No energy is drawn from the input source VI during Mode 7.
  • Mode 8 is initiated when control signal VG4 turns OFF auxiliary switch S4.
  • the active clamp across the transformer Tl is released and the primary current can continue to charge the parasitic capacitance C2 of primary switch S2 and discharge the parasitic capacitance Cl of primary switch SI.
  • the time to charge C2 from VI/2 to VI volts is identical to that given in mode 4 equations .
  • the charging interval is completed when the voltage across C2 is clamped to VI by the body diode DL1 across primary switch SI.
  • TS1 The voltages across the transformer secondary windings reverse polarity, TS1 is positive. However, the energy stored in the transformer primary is prevented from flowing to the secondary during mode 8 by the switch S5. In the preferred embodiment this is a saturable reactor but it could equally be a synchronous rectifier gated ON by a delayed control signal. The sequence is repeated by returning to Mode 1 operation.
  • the transformer core Tl can be gapped to increase the value of Imag and extend the load range for zero voltage switching. At sufficiently small loads, the voltage excursion during Mode 4/8 is no longer linear, but a sinusoid defined by the resonant circuit of (Lm + Lk) inductance and (Cl+C2+node capacitance) together with an initial driving current function Imag flowing in the circuit inductances . For zero voltage switching to be maintained, the energy stored in the magnetic structure must equal or exceed the energy to charge the circuit capacitance through half the input voltage.
  • V ⁇ /2 J r/Cr * ⁇ ( Sw)
  • the resonant circuit has an oscillation period
  • Tr 2 * ⁇ JLr * Cr .
  • the maximum time delay "TD" required by the control circuit is equated to one quarter of the resonant sinusoid period.
  • control can be designed to include a variable delay TD that changes with the input line and/or the output load.
  • FIG. 3 shows another embodiment of the invention.
  • a bifilar winding has been added to the transformer Tl .
  • This has been wound tightly coupled to the primary winding and with the same turns as the primary winding to illustrate the principle. However, in general this winding may have a different turns ratio to the primary or it may be coupled to a secondary winding.
  • the laws of current and voltage transformation apply. It may also be included in any of the push-pull topologies described within.
  • the active clamp consisting of auxiliary switches S3 and S4 are connected in series across the bifilar winding with the correct phase relationship to the primary winding of a half bridge converter 1.
  • the source connections of S3 and S4 are now common and may be connected to any reference point in the converter on either the primary or secondary side.
  • FIG. 5 Another embodiment of the invention is shown in Figure 5 with the active clamp across a single secondary winding of a current doubler scheme.
  • the transformer is configured as a half bridge but is not limited to this topology.
  • the discussion relating to Figure 4 pertains .
  • the active clamp described in this patent may be applied to other push-pull topologies.
  • the invention is a full bridge zero voltage switched converter shown in Figure 6. In this arrangement two primary switches are replaced by four primary switches. Each diagonal pair are denoted by SI or S2. Control signal VGl is isolated and drives each of the two SI primary switches and control signal VG2 is isolated and drives each of the two S2 primary switches.
  • SI Service or S2
  • Control signal VGl is isolated and drives each of the two SI primary switches
  • control signal VG2 is isolated and drives each of the two S2 primary switches.
  • the operation is identical with the earlier discussion. The only exception is that now both voltage nodes VNl and VN2 , on either side of the transformer primary are driven rail to rail in opposite phase
  • ZVS-PS full bridge There is prior art in this case, which is known as the zero voltage switched phase-shifted full bridge. (ZVS-PS full bridge) .
  • ZVS-PS full bridge In the case of the ZVS-PS bridge, the circuit operation is almost identical but with some significant exceptions.
  • Each leg of the bridge (known as the right and left phase legs) and driven with a push-pull drive. Control is achieved by varying the phase shift between the right and left drives .
  • the leakage inductance is not sufficient to achieve ZVS operation over an extended load range without the necessity of adding an additional inductor is series with the transformer's primary leakage inductance.
  • the magnetic energy required to effect the phase transitions is stored by the clamping action of either the upper primary switches or the lower primary switches in the bridge. This requires additional power being dissipated in these switches.
  • phase transitions are from one rail to the other.
  • the node capacitance on the right and left phase legs are charged/discharged to the input bus VI.
  • the drive signals to the primary switches are the same as a conventional "hard switched" full bridge. There is no significant difference in the right and left hand phase transitions.
  • the control function is satisfied with a single delay time .
  • the magnetic energy storage is accomplished with two additional switches.
  • the additional power to effect this is dissipated in the auxiliary switches and not in the primary switches.
  • phase transitions are from the mid-point to either bus.
  • the node capacitance on the right and left phase legs are charged/discharged to half the input bus.
  • the magnetic energy to accomplish this is one quarter that required by the ZVS-PS bridge.
  • the EMI noise spectrum may also be lower because the transition amplitude is halved.
  • the concept of adding an active clamp may be extended from a half bridge and a full bridge to a three phase bridge as used in motor control applications.
  • the invention is a ZVS three phase bridge as illustrated in Figure 7 and is obtained by placing three active clamps across the phase arms of the motor controller.
  • the control signals for the active clamps have to be extended to three phases .
  • a center-tapped push-pull converter is an old topology in power conversion terms, used primarily for low power and low input voltage applications .
  • the active clamp may be added to this topology.
  • the invention is a ZVS center- tapped push-pull converter. For illustration the voltage fed converter topology is shown in Figure 8.
  • the transformer Tl consists of two primary windings TPl and TP2 , two secondary windings TS1 and TS2 , phased as shown in Figure 8.
  • the turns ratio between each primary and secondary winding is N:l.
  • the leakage inductances, referred to the primary are denoted Lkl and Lk2.
  • the primary switches are denoted as SI and S2.
  • Two active clamps, for illustration are positioned across each half of the transformer primary.
  • Two of the auxiliary switches are referenced S3 and two additional auxiliary switches are referenced S4. It is also possible to operate this structure with one auxiliary clamp as shown in Figure 9, with some performance degradation.
  • the timing relationships between the drive signals to the four switches are the same as illustrated in Figure 2 together with the main current and voltage waveforms of the converter. A description of the operating modes of the converter is presented below. The major differences in operation, arising from the topology having two, not one, primary windings are discussed.
  • the gate drive signal VGl turns primary switch SI ON to initiate Mode 1 operation. Power is drawn from the input
  • the primary switch current I(Sw) in Figure 2f has a positive slope because the primary magnetizing is increasing in a linear ramp, as is the current flowing through the output Lo .
  • the equations for Mode 1 were presented in the ZVS half bridge discussion.
  • Mode 2 (LT1 - T2) Mode 1 is completed when the gate drive signal VGl turns OFF primary switch SI. At this instant, both primary windings have to conduct primary current. The primary current I(Sw) is halved. The primary switch current 0.5* I(Sw) now flows through both primary windings TPl and TP2 , because transformer action requires that the amp-turns equality below be satisfied
  • T2 - T1 ⁇ ( C1 + C2) / / ( C3 + C4 ) ⁇ * V ⁇ / ⁇ 0.5 *
  • control signal VG4 turns auxiliary switch S4 ON, under zero voltage conditions. Reflected load current and primary magnetizing current is circulated anticlockwise through the transformer primary windings TP2 , TPl and the channels of S3 and S4. The output current continues to flow through TS1, S5 and D5 , maintained by the energy stored in the output inductor Lo. During this mode, no energy is provided by the input source. The current through the output inductor Lo has a negative slope defined by the equation given in the ZVS half bridge discussion. Resonant ringing is terminated if two active clamps are employed. However if a single clamp is used, parasitic ringing will continue during this interval, and dissipative snubbing techniques must be employed. (Mode 4 (T3 - T4 )
  • control signal VG3 turns auxiliary switch S3 OFF.
  • the energy stored in the magnetic structure of transformer Tl is released and can continue to charge the capacitance of SI to twice the source voltage and discharge the capacitance of S2 to zero volts.
  • the voltage across the secondary windings reverse polarity, TS2 is Now positive.
  • the energy is selectively blocked from flowing to the secondary by the secondary switch S6.
  • the charging interval is given by the equation below.
  • T4 - T3 ⁇ ( C1 +C2) / / ( C3+C4 ) ⁇ * V ⁇ / ⁇ 0.5 *
  • Control signal VG2 turns ON the primary switch S2 under zero voltage conditions.
  • the current initially negative becomes positive as power flows from the input DC source VI through primary TP2 and switch S2 via the secondary winding
  • Control signal VG2 terminates the ON period of primary switch S2 and allows the circuit capacitances to be charged across S2 and discharged across switch SI as described in Mode 2.
  • Mode 7 ( T6 - T7 )
  • Control signal VG3 turns ON auxiliary switch S3, clamping the energy and flux in the transformer Tl structure.
  • (Sw) is circulating clockwise through TPl, TP2, S4 and S3.
  • Control signal VG4 turns auxiliary switch S4 OFF.
  • the active clamp is released, allowing the stored magnetic energy to continue to charge the capacitance across S2 to twice the input voltage and to discharge the voltage across SI to zero.
  • the cycle is repeated by returning to Mode 1 operation.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Un convertisseur C.C.-C.C. pleine onde est exploité à l'aide de deux commutateurs primaires aux bornes d'une batterie de condensateurs constituée de deux condensateurs en série. L'enroulement primaire d'un transformateur d'isolation est connecté entre le point médian de la batterie de condensateurs et le point médian des commutateurs primaires. Un circuit de fixation de niveau comprenant une combinaison en série de deux commutateurs auxiliaires est connecté aux bornes de l'enroulement primaire. A certains moments au cours de chaque période de commutation, le circuit de fixation de niveau maintient l'énergie stockée dans le transformateur. Tous les commutateurs sont exploités au moyen d'un circuit logique de commande de sorte qu'aucun commutateur primaire ne soit EN MARCHE en même temps. Un délai prédéterminé est prévu entre la mise à l'ARRET de chaque commutateur auxiliaire et la mise en marche du commutateur primaire suivant approprié. Au cours de cette période prédéterminée, l'énergie de magnétisation du transformateur est dégagée de sorte que les capacités parasites du circuit soient chargées/déchargées et que des conditions de commutation au zéro de la tension soient obtenues pour les commutateurs primaires. La décharge de courant dans le secondaire du transformateur pendant cette période prédéterminée est limitée soit par des réacteurs saturables en série avec les redresseurs à transfert direct du secondaire ou par des redresseurs commandés de manière sélective.
PCT/US1998/017264 1997-08-20 1998-08-20 Commutation de convertisseur des deux alternances a la tension zero Ceased WO1999009639A2 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US91519997A 1997-08-20 1997-08-20
US08/915,199 1997-08-20
US12329798A 1998-07-28 1998-07-28
US09/123,297 1998-07-28

Publications (1)

Publication Number Publication Date
WO1999009639A2 true WO1999009639A2 (fr) 1999-02-25

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001091274A1 (fr) * 2000-05-26 2001-11-29 Cleansun Pty Ltd Systeme de conversion de puissance
GB2484173A (en) * 2010-08-18 2012-04-04 Texas Instruments Inc Half Bridge power converter with selectively driven series auxiliary transformer
JP2013188090A (ja) * 2012-03-09 2013-09-19 Fuji Electric Co Ltd ハーフブリッジ型ｄｃ／ｄｃコンバータ
CN103401430A (zh) * 2013-08-21 2013-11-20 常州瑞华电力电子器件有限公司 对称半桥式软开关直流变换器
KR101350323B1 (ko) 2011-10-28 2014-02-13 전주대학교 산학협력단 양방향 직류-직류 컨버터
CN106549595A (zh) * 2016-10-31 2017-03-29 武汉华中数控股份有限公司 一种全桥电路
RU2738852C1 (ru) * 2020-06-10 2020-12-17 Андрей Витальевич Шепелин Двунаправленное устройство обнуления напряжения квазирезонансного типа

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001091274A1 (fr) * 2000-05-26 2001-11-29 Cleansun Pty Ltd Systeme de conversion de puissance
GB2484173A (en) * 2010-08-18 2012-04-04 Texas Instruments Inc Half Bridge power converter with selectively driven series auxiliary transformer
KR101350323B1 (ko) 2011-10-28 2014-02-13 전주대학교 산학협력단 양방향 직류-직류 컨버터
JP2013188090A (ja) * 2012-03-09 2013-09-19 Fuji Electric Co Ltd ハーフブリッジ型ｄｃ／ｄｃコンバータ
CN103401430A (zh) * 2013-08-21 2013-11-20 常州瑞华电力电子器件有限公司 对称半桥式软开关直流变换器
CN106549595A (zh) * 2016-10-31 2017-03-29 武汉华中数控股份有限公司 一种全桥电路
RU2738852C1 (ru) * 2020-06-10 2020-12-17 Андрей Витальевич Шепелин Двунаправленное устройство обнуления напряжения квазирезонансного типа

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