WO2001046761A2 - Emulateur d'un systeme de commande destine a un processus de fabrication - Google Patents

Emulateur d'un systeme de commande destine a un processus de fabrication Download PDF

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Publication number
WO2001046761A2
WO2001046761A2 PCT/US2000/042782 US0042782W WO0146761A2 WO 2001046761 A2 WO2001046761 A2 WO 2001046761A2 US 0042782 W US0042782 W US 0042782W WO 0146761 A2 WO0146761 A2 WO 0146761A2
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WO
WIPO (PCT)
Prior art keywords
control system
emulator
process control
fabrication process
gui
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/US2000/042782
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English (en)
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WO2001046761A3 (fr
Inventor
Serge Nikulin
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Applied Materials Inc
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Applied Materials Inc
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Anticipated expiration legal-status Critical
Publication of WO2001046761A3 publication Critical patent/WO2001046761A3/fr
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Program control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23447—Uses process simulator to develop, simulate faults, fault tree
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23452—Simulate sequence on display to control program, test functions
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23456—Model machine for simulation
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/24—Pc safety
    • G05B2219/24061—Simulator, generates input signals, shows output signals of logic
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/26—Pc applications
    • G05B2219/2602—Wafer processing

Definitions

  • the present invention relates to device fabrication and more particularly to an emulator for emulating a fabrication process control system employed during semiconductor device fabrication, flat panel display fabrication and the like.
  • Numerous fabrication processes are employed during the fabrication of semiconductor devices. Such processes include deposition, etching, annealing, patterning, etc. Typically, numerous semiconductor device fabrication processes are performed within a single fabrication tool
  • the transfer chamber of the fabrication tool contains a wafer handler that transfers wafers to and from the processing chambers.
  • control system comprises hardware (e.g., microprocessors, video adapters, input/output devices, clocks, etc.) and software (i.e., control software) which control the operation of the fabrication tool (e.g., loading semiconductor wafers i.ito the fabrication tool, transferring semiconductor wafers various processing chambers within the fabrication tool, etc.), as well as the operation of the various processing chambers within the tool (e.g., process gas flow rates, wafer biases, etch or deposition times, etc . ) .
  • hardware e.g., microprocessors, video adapters, input/output devices, clocks, etc.
  • software i.e., control software
  • control software within such a system e.g., Applied Materials' Legacy software
  • the control software within such a system conventionally is executable only via the fabrication tool. Therefore, the creation, maintenance and/or analysis of new recipes and process sequences to be performed within the fabrication tool, the training of new users, and the analysis of system constants (e.g., wafer size), history logs (e.g., wafer history, faults, etc.) and event logs (e.g., start-up, shutdown, alarm conditions, etc.) can only be performed by employing the fabrication tool. Valuable fabrication tool production time thereby is consumed during these tasks. Accordingly, a need exists for a method and apparatus for executing the control software of a fabrication tool without requiring the use of the fabrication tool .
  • the inventive emulator includes (1) a graphical user interface (GUI) emulator portion adapted to emulate a GUI of a fabrication process control system; (2) a central processing unit (CPU) emulator portion adapted to communicate with the GUI emulator portion and adapted to emulate a CPU of the fabrication process control system; and (3) a hardware emulator portion adapted to communicate with the GUI emulator portion and with the CPU emulator portion, and adapted to emulate at least one hardware device employed by the fabrication process control system.
  • GUI graphical user interface
  • CPU central processing unit
  • a hardware emulator portion adapted to communicate with the GUI emulator portion and with the CPU emulator portion, and adapted to emulate at least one hardware device employed by the fabrication process control system.
  • Other embodiments also are provided.
  • embodiments of the inventive emulator may allow the actual control software of a fabrication tool to be executed by the emulator.
  • the emulator may run on a computer separate and/or remote from the fabrication tool without requiring use of the fabrication tool.
  • Control software e.g., recipe and sequence files
  • the emulator may run on a computer separate and/or remote from the fabrication tool without requiring use of the fabrication tool.
  • Control software e.g., recipe and sequence files
  • system constants e.g., wafer size
  • history logs e.g., wafer history
  • event logs e.g., start-up, shut-down, alarm conditions, faults, etc.
  • system constants e.g., wafer size
  • history logs e.g., wafer history
  • event logs e.g., start-up, shut-down, alarm conditions, faults, etc.
  • the emulator may be used as a training tool without concern of damage to the fabrication tool by an inexperienced user.
  • Fabrication tool throughput analysis and optimization similarly may be performed off-line from the fabrication tool. Multitudinous fabrication tool operations thereby may be performed without consuming valuable production time.
  • Numerous hardware components within a fabrication tool may be emulated by the inventive emulator.
  • the inventive emulator may emu Late factory automation interfaces, light pen interf ices, video adapters (e.g., VGA adapters), address spaces, RAM, ROM, dual universal asynchronous receiver-transmitters (DUARTs) , clocks, system console interfaces (e.g., LED panels), digital or analog inputs/outputs, various controllers and the like.
  • FIG. 1 is a schematic diagram of a CenturaTM fabrication tool manufactured by Applied Materials, Inc.
  • FIG. 2 is a schematic diagram of a computer adapted to execute a fabrication process control system emulator in accordance with the present invention
  • FIG. 3 is a schematic diagram of an inventive control system emulator configured in accordance with the present invention
  • FIG. 4 is a schematic diagram of an exemplary graphical user interface for the control system emulator of FIG. 3;
  • FIG. 5 is a schematic diagram of an instruction code execution scheme that may be employed by the control system emulator of FIG. 3;
  • FIG. 6 illustrates an exemplary memory banking scheme that may be employed by the control system emulator of FIG. 3;
  • FIG. 7 is a flowchart of an exemplary control flow of the control system emulator of FIG. 3;
  • FIG. 8 is a flowchart of an exemplary control flow of the CPU emulator portion of FIG. 3; and FIG. 9A and FIG. 9B are flowcharts of the control flow of exemplary opcode instruction functions for memory get and put operations, respectively, that may be executed by the control system emulator of FIG. 3.
  • FIG. 1 illustrates a CenturaTM fabrication tool 10 manufactured by Applied Materials, Inc.
  • the CenturaTM comprises a plurality of processing chamber 12a-c coupled to a transfer chamber 14.
  • the CenturaTM is provided with two loadlocks 16a-b for loading wafers into and out of the transfer chamber 14 via a wafer handler (not shown) located within the transfer chamber 14.
  • the wafer handler may transfer semiconductor wafers between the loadlocks 16a-b and the processing chambers 12a- c, as is well known in the art.
  • CenturaTM is located behind a cleanroom wall 18 through which the doors of the loadlocks 16a-b extend.
  • the CenturaTM is provided with a fabrication process control system (“control system”) that includes hardware (e.g., microprocessors, video adapters, input/output devices, clocks, etc.) and software (i.e., control software ⁇ .
  • control system includes hardware (e.g., microprocessors, video adapters, input/output devices, clocks, etc.) and software (i.e., control software ⁇ .
  • a user To interact with the control system of the CenturaTM (e.g., for creation, maintenance and/or analysis of new recipes and process sequences, for training purposes, for analysis of system constants, etc.), a user typically employs a cathode-ray-tube (CRT) monitor 20 that is controllable via a lightpen 22 as shown in FIG. 1.
  • CTR cathode-ray-tube
  • the creation, maintenance and/or analysis of new recipes and process sequences to be performed within the fabrication tool, the training of new users, and the analysis of system constants (e.g., wafer size), history logs (e.g., wafer history, faults, etc.) and event logs (e.g., start-up, shut -down, alarm conditions, etc.) can only be performed by employing the fabrication tool. Valuable fabrication tool production time thereby is consumed during these tasks.
  • these tasks may be performed on a computer system such as on the personal computer 60 shown in FIG. 2 (e.g., a laptop, a desktop or another similar computer) that stores and executes a computer program code representation of the inventive emulator (as described below) .
  • Valuable fabrication tool production time thereby is not consumed during these tasks.
  • FIG. 3 is a schematic diagram of an inventive control system emulator 100 configured m accordance with the present invention.
  • the control system emulator 100 may comprise a computer program product carried by a medium readable by a computer (e.g., a carrier wave signal, a floppy disc, a hard drive, a random access memory, etc.) and that is executable by a computer (e.g., such as the computer 60 of FIG. 2) .
  • the control system emulator 100 includes a graphical user interface (GUI) emulator portion 102, a computer processing unit (CPU) emulator portion 104 and a hardware emulator portion 106 as shown in FIG. 3.
  • GUI graphical user interface
  • CPU computer processing unit
  • FIG. 3 Other configurations also may be employed.
  • GUI emulator portion 102 the CPU emulator portion 104 and the hardware emulator portion 106 are shown schematically as separate units for convenience only and may comprise intermingled computer program code .
  • the GUI emulator portion 102 comprises computer program code which emulates the user interface of the control system being emulated. For example, if the control system of an Applied Materials, Inc. CenturaTM is being emulated, the GUI emulator portion 102 preferably emulates the user interface used by the CenturaTM (e.g., the Mizar GUI 108 as shown in FIG. 3 and FIG. 4 including both hardware interfaces such as a hardware panel of LEDs 108a and software interfaces such as a software interface 108b) .
  • the Mizar GUI 108 as shown in FIG. 3 and FIG. 4 including both hardware interfaces such as a hardware panel of LEDs 108a and software interfaces such as a software interface 108b
  • the GUI emulator portion 102 also may comprise a GUI debugger window 110 that allows for low level debugging and a GUI terminal window 112 that allows for ⁇ . real time operating system interface (e.g., Applied MateriaLs' Boss operating system) .
  • the GUI debugger window 110 may interface with the CPU emulator portion 104, and allow a software developer to "freeze" execution and CPU state of the emulated CPU (e.g., for analysis purposes) .
  • the GUI terminal window 112 may provide a serial interface that allows real time monitoring of emulated fabrication tool operations for configuration purposes (e.g., similar to the serial interface provided on the CenturaTM for providing real time process information to process engineers) .
  • GUI emulator portion 102 the particular computer program code used to implement the GUI emulator portion 102 depends on which GUI is being emulated (e.g., the Mizar GUI of the CenturaTM, or some other GUI) , and that, in general, a person of ordinary skill in the art can develop computer program code necessary to emulate any GUI (or any CPU or hardware) of any fabrication process control system.
  • the Mizar GUI 108 may be embodied, for example, using external calling programs (e.g., drive-by-calls) , and read and write operations may be employed, for example, using the functions described below with reference to FIGS. 9A and 9B.
  • the CPU emulator portion 104 comprises computer program code which emulates the particular CPU which controls the control system being emulated.
  • the CPU emulator portion 104 comprises the Motorola 68040 CPU emulator, and in one embodiment of the invention emulates the entire set of 68040 instructions excluding memory management unit (MMU) instructions. Alternatively, a portion of the set of 68040 instructions may be emulated, and/or the MMU instructions may be emulated.
  • the CPU emulator portion 104 interfaces with the GUI emulator portion 102, allowing the GUI emulator portion 102 to transmit information therebetween such as initialization information (e.g., a display of diagnostic start-up information), a reset signal (e.g., to reset the CPU), debug signals (e.g., interrupts), etc.
  • initialization information e.g., a display of diagnostic start-up information
  • a reset signal e.g., to reset the CPU
  • debug signals e.g., interrupts
  • the hardware emulator portion 106 comprises computer program code which emulates the various hardware (e.g., bus devices) associated with the control system being emulated.
  • Exemplary emulatable hardware includes factory automation interfaces, light pen interfaces, video adapters (e.g., VGA adapters), address spaces, RAM, ROM, dual universal asynchronous receiver-transmitters (DUARTs) , clocks, system console interfaces (e.g., LED panels), digital or analog inputs/outputs, various controllers and the like.
  • factory automation interfaces e.g., light pen interfaces, video adapters (e.g., VGA adapters), address spaces, RAM, ROM, dual universal asynchronous receiver-transmitters (DUARTs) , clocks, system console interfaces (e.g., LED panels), digital or analog inputs/outputs, various controllers and the like.
  • the hardware emulator portion 106 comprises computer program code which emulates, for example, the basic components of the Synergy-V452TM board produced by Synergy Microsystems' of San Diego, California (e.g., RAM 114, ROM 116, clock 118, serial I/O 120, LEDs 122, A16-A24 address space as represented by reference numerals 124 and 126, etc.), a video VGA adapter (e.g., with two DUARTs and 128 Kbyte CMOS memory) that forms part of the Mizar board 128, as well as a 16 Mbyte RAM, a 128 Kbyte ROM, standard DUARTs (e.g., with a heart-beat counter), a real-time clock, an LED panel, a shared memory to interface other CPUs in the system to the Motorola 68040 processor, device net devices, HSMS devices, Synergy's ethernet/SCSI/serial equipment (ESSE) address space, etc. (all of which are represented generally by reference numeral
  • the control system emulator 100 may further emulate serial data transfers between the GUI terminal window 112 and the hardware emulator portion 106, LED information (e.g., information regarding whether the LEDs within an emulated console should be ON or OFF) which is transmitted between the MIZAR GUI 108 and the hardware emulator portion 106, interrupts and exceptions generated by the hardware emulator portion 106 and communicated to the CPU emulator portion 104, light pen touches from the MIZAR GUI 108 to the hardware emulator portion 106, video data transfers between the MIZAR GUI 108 and the hardware emulator portion 106, and external I/O simulators (e.g., Semi Equipment Communication Standard (SECS) Simpro produced by G.W. Associates of Santa Clara County, California) .
  • SECS Semi Equipment Communication Standard
  • the operating system of the control system emulator 100 is based on the operating system employed by the control system being emulated (e.g., Applied Materials' BOSS E4.8 operating system) .
  • the control system emulator 100 emulates sufficient hardware and software to allow the control system emulator 100 to execute Applied Materials' Legacy software on a personal computer (e.g., the computer 60 of FIG. 2).
  • control system emulator 100 may execute the actual control software which controls the control system being emulated.
  • the control system emulator 100 may execute control software instruction-by- instruction or in any other suitable manner (e.g., a multi-processor system may be employed to affect the execution of instructions in parallel) .
  • a C++ function is created for each instruction op-code employed within the CPU emulator portion 104. It will be understood that any other computer language may be similarly employed such as assembly, Visual Basic, etc.
  • a Motorola 68040 M68K
  • instructions can be identified by the first 16 bits of each op-code instruction because all M68K instructions have a length of at least 16 bits.
  • an OxFFFF length array of pointers to emulating functions e.g., C++ functions
  • the first sixteen bits of each M68K op-code instruction are used to address an array location containing a pointer to a function which emulates the M68K op-code instruction.
  • Each emulating function determines the full length of the respective opcode instruction (e.g., if the op-code instruction requires additional data bits) and reads any required data that follows the op-code instruction. Each emulating function then performs any operations associated with the op-code instruction.
  • an assembler instruction MOVE . B DO, Dl (identified by reference numeral 502 in FIG. 5) is to be executed by the control system emulator 100.
  • the instruction MOVE . B DO, Dl corresponds to opcode 0x1200 (identified by reference numeral 504 in FIG. 5) .
  • the first sixteen bits of the opcode 0x1200 are examined and are used to address an array location (identified by reference numeral 506 m FIG. 5) containing a pointer to the appropriate emulating function (identified by reference numeral 508 m FIG. 5) .
  • control software which contains a set bit (BSET) instruction (e.g., 08C0 00XX in op-code form)
  • BSET set bit
  • the array address 08C0 contains a pointer to a function which emulates the BSET command: vo ⁇ d_08C0 (U_LONG opcode) /*BSET*/
  • control system emulator 100 calls this function each time it receives an op-code instruction having
  • the M68K CPU employs a 32 bit address or a 4 Gbyte memory space. Accordingly, in an embodiment of the control system emulator 100 wherein the M68K CPU is emulated, the control system emulator 100 should be able to emulate a 4 Gbyte memory space. Because many personal computers lack sufficient memory space for directly emulating a 4 Gbyte memory space, a "memory-banking" scheme may be employed by the control system emulator 100.
  • FIG. 6 illustrates an exemplary memory banking scheme 400 that may be employed by the control system emulator 100.
  • the M68K 4 Gbyte memory space is represented by reference numeral 602.
  • the control system emulator 100 may be provided with a memory bank array 604 of 65,536 (64x1024 or 64K) elements which contains pointers to various memory get and memory put functions 606.
  • the upper sixteen bits of each 32 bit address of the M68K CPU are used to address the memory bank array of 65,536 elements and to access the contents of the 64 Kbyte blocks of memory.
  • Each addressable location of the 64 Kbyte blocks of memory is provided with a pointer to a memory support routine which handles the memory get and put functions associated with the address space identified by the original 32 bit address. Accordingly, the memory- banking scheme allows memory processing functions of the entire 4 Gbyte memory space of the M68K CPU to be managed via one memory bank array of 65,536 elements.
  • FIG. 7 is a flowchart of an exemplary control flow 700 of the control system emulator 100.
  • the MIZAR GUI 108 the GUI debugger window 110 and the GUI terminal window 112 are initialized
  • the hardware/device emulators (within the hardware emulator portion 106) are initialized
  • m step 703 the CPU emulator portion 104 is initialized.
  • the control system emulator 100 may create and size the Mizar GUI window, the GUI debugger window and the GUI terminal window.
  • the control system emulator 100 also may create the thread for the CPU emulator 108.
  • the control system emulator 100 may load all needed devices (e.g., all needed device code), and then call initialization procedures for each device.
  • the control system emulator 100 also may assign memory support routines to a memory bank array (as described previously with reference to FIG. 6).
  • the A16 memory device (FIG. 3) may assign its memory support routines to memory bank array items beginning from item OxFFFD to OxFFFF .
  • every device may "register" its own setup dialogs (e.g., to allow each device to be "fine-tuned” later) .
  • Each device may also indicate whether it will ever produce hardware interrupts (e.g., so that the control system emulator 100 knows to periodically check the state of the device) .
  • the control system emulator 100 may initialize all internal tables (e.g., the array of pointers to functions as described previously w .th reference to FIG. 5) .
  • the control system emulator 100 aliso may place the 68K emulator in a RESET state (e.g., wherein all CPU flags are zeroed, initial program counters are set to predefined values, the initial stack pointer is assigned a ROM base address, etc.) .
  • steps 701-703 may be performed in any order.
  • GUI task management may include, for example, performing main user interface functions, scanning the memory of each device (e.g., within the hardware emulator portion 106) and displaying the contents as an image, receiving mouse clicks, translating the mouse clicks into light pen touches and sending the mouse clicks to the hardware emulator portion 106, etc.
  • GUI task management with regard to the GUI debugger window 110 may include, for example, allowing a user to stop emulation at any moment and analyze the state of the CPU and devices and emulated hardware.
  • GUI task management may include receiving and displaying signals from an emulated serial channel of the hardware emulator portion 106, receiving user keyboard input and sending the keyboard input to the hardware emulator portion 106 via the emulated serial channel, etc.
  • Management of emulator tasks (step 705) is described below with reference to FIG. 8.
  • FIG. 8 is a flowchart of an exemplary control flow 800 of the CPU emulator portion 104 during step 705 of the process 700 of FIG. 7.
  • step 705/process 800 represents an infinite loop which constantly fetches, interprets and executes op-code instructions provided to the control system emulator 100 (e.g., from control software that runs on a fabrication tool and that is executed by the emulator) and handles internal events (e.g., trace, debug, interrupt, reset or stop commands from the GUI emulator portion 102 or from the emulated hardware) and external events (e.g., device interrupts) as shown.
  • the process 800 begins in step 801 wherein the CPU emulator portion 104 sets a counter (COUNT) to zero.
  • COUNT counter
  • the CPU emulator portion 104 determines whether an internal event has occurred. For example, the CPU emulator portion 104 may determine whether a CPU internal flag has been raised indicating that an interrupt, a trace, a debug request, a reset request, a stop request or the like has occurred. If an internal event has occurred, in step 803, the CPU emulator portion 104 processes the internal event (e.g., by calling the corresponding interrupt or other routine within the available emulated functions described previously with reference to FIG. 5) , and the process 800 then proceeds to step 804. Otherwise, if no internal event has occurred (as determined in step 802), the process 800 proceeds to step 804.
  • the internal event e.g., by calling the corresponding interrupt or other routine within the available emulated functions described previously with reference to FIG. 5
  • step 804 the CPU emulator portion 104 fetches the first two bytes of instruction opcode from the computer than is executing the inventive control system emulator 100. Thereafter, in step 805 the CPU emulator portion 104 executes the opcode's function (as described below with reference to FIGS. 9A and 9B) .
  • step 806 the CPU emulator portion 104 increments COUNT; and m step 807, the CPU emulator portion 104 determines if COUNT has reached a pre-determmed number N.
  • N represents a factor used by the inventive control system emulator 100 to match t or approximately match) the speed of an M68K CPU to the speed of the CPU of the computer on which the inventive conzrol system emulator 100 is executed.
  • the CPUs of most personal computers operate significantly faster than the M68K CPU.
  • the emulator 100 typically must delay the polling of emulated devices/hardware (as described below) for several clock cycles. This delay may be achieved by performing steps 802-807 "N" times.
  • N may be determined based on a "rough” or an "average” estimate of CPU speed, or N may be determined at initialization of the emulator by performing a calibration procedure that determines the actual speed of the CPU executing the inventive emulator 100, and by calculating N based thereon.
  • the N count loop (steps 801, 806 and 807) may be eliminated, and the CPU executing the inventive emulator 100 may check the emulated devices/hardware for interrupts at the appropriate time (e.g., by using the CPU's own counters and interrupts) .
  • step 807 in FIG. 8 if COUNT has not reached N, the process 800 returns to step 802 to determine if an internal event has occurred (as described above) ; otherwise, if COUNT has reached N, the process 800 proceeds to step 808.
  • the CPU emulator portion 104 determines whether an external event has occurred (e.g., whether a device interrupt has occurred) .
  • the CPU emulator portion 104 may calculate/perform emulating functions for a pre-determmed time period (e.g., 10 msec) before polling external devices (emulated via the hardware emulator portion 106) regarding their state (e.g., to determine if any devices have generated an interrupt) .
  • external devices emulated via the hardware emulator portion 106) may directly indicate an interrupt state without being polled.
  • step 808 the CPU emulator portion 104 determines that an external event has not occurred, the process 800 returns to step 802 to determine if an internal event has occurred (as described above) ; otherwise, if an external event has occurred, the process 800 proceeds to step 809 wherein the CPU emulator portion 104 processes the external event (e.g., processes the interrupt). Following step 809, the process 800 returns to step 801 to reset COUNT to zero and then to determine if an internal event has occurred in step 802 (as described above) .
  • FIG. 9A and FIG. 9B are flowcharts of the control flow of exemplary op-code instruction functions for memory get (process 900 in FIG. 9A) and memory put operations (process 1000 in FIG.
  • FIGS. 9A and 9B respectively, that may be executed by the control system emulator 100 of FIG. 3 (e.g., during step 805 of the process 800 of FIG. 8) .
  • the control flow of FIGS. 9A and 9B is described with reference to the CenturaTM and the Mizar GUI. However, it will be understood that similar processes may be performed for other fabrication tools and/or for other GUIs.
  • m step 901 the GUI emulator portion 102 generates a get instruction (e.g., dev ⁇ ce_mem_get_long (address) ) .
  • step 902 the CPU emulator portion 104 determines whether the get instruction is a request for light pen position (e.g., whether the address represents a MIZAR_PEN_CONFIRM request) . If so, in step 903, the hardware emulator portion 106 returns light pen position information to the GUI emulator portion 102; otherwise the process 900 proceeds to step 904.
  • the get instruction is a request for light pen position (e.g., whether the address represents a MIZAR_PEN_CONFIRM request) . If so, in step 903, the hardware emulator portion 106 returns light pen position information to the GUI emulator portion 102; otherwise the process 900 proceeds to step 904.
  • step 904 the CPU emulator portion 104 determines whether the get instruction is a request for Mizar status (e.g., whether the address represents a MIZAR_VDC_STC request) . If so, in step 905, the hardware emulator portion 106 returns Mizar status information (e.g., whether the cursor is ⁇ nabled/disabled, etc.) to the GUI emulator portion 102; otherwise the process 900 proceeds to step 906.
  • the get instruction is a request for Mizar status (e.g., whether the address represents a MIZAR_VDC_STC request) . If so, in step 905, the hardware emulator portion 106 returns Mizar status information (e.g., whether the cursor is ⁇ nabled/disabled, etc.) to the GUI emulator portion 102; otherwise the process 900 proceeds to step 906.
  • Mizar status information e.g., whether the cursor is ⁇ nabled/disabled, etc.
  • step 906 the CPU emulator portion 104 determines whether the get instruction is a request for the contents of the Mizar interrupt register (e.g., whether the address represents a MIZAR_D1ADDR_SR request) . If so, in step 907, the hardware emulator portion 106 returns the contents of the Mizar interrupt register to the GUI emulator portion 102; otherwise the process 900 proceeds to step 908. In step 908, the CPU emulator portion 104 determines whether the get instruction is a request for the contents of the Mizar control register (e.g., whether the address represents a MIZAR_D1ADDR_IPCR request) . If so, in step 909, the hardware emulator portion 106 returns the contents of the Mizar control register to the GUI emulator portion 102; otherwise the process 900 proceeds to step 910.
  • the get instruction is a request for the contents of the Mizar interrupt register (e.g., whether the address represents a MIZAR_D1ADDR_SR request) . If so, in step 909, the hardware emulator portion 106 returns the contents of
  • step 910 the CPU emulator portion 104 determines whether the get instruction is a request for the contents of the Mizar status register A (e.g., whether the address represents a MIZAR_D1ADDR_SRA request) . If so, m step 911, the hardware emulator portion 106 returns the contents of the Mizar status register A to the GUI emulator portion 102; otherwise the process 900 proceeds to step 912 wherein an incorrect address error is returned to the GUI emulator portion 102.
  • the get instruction is a request for the contents of the Mizar status register A (e.g., whether the address represents a MIZAR_D1ADDR_SRA request) . If so, m step 911, the hardware emulator portion 106 returns the contents of the Mizar status register A to the GUI emulator portion 102; otherwise the process 900 proceeds to step 912 wherein an incorrect address error is returned to the GUI emulator portion 102.
  • step 1001 the GUI emulator portion 102 generates a put instruction (e.g., dev ⁇ ce_mem_put_long (address, value)).
  • the CPU emulator portion 104 determines whether the put instruction is a command to affect the set up of the Mizar display (e.g., a command to change cursor shape, such as an address that represents a MIZAR__VDC_STC command) . If so, in step 1003, the hardware emulator portion 106 changes the display/cursor size of the emulated Mizar display (e.g., based on the put value) ; otherwise the process 1000 proceeds to step 1004.
  • the put instruction e.g., dev ⁇ ce_mem_put_long (address, value)
  • the CPU emulator portion 104 determines whether the put instruction is a command to affect the set up of the Mizar display (e.g., a command to change cursor shape, such as an address that represents a MIZAR__VDC_STC command) . If so, in
  • step 1004 the CPU emulator portion 104 determines whether the put instruction is a command to set the Mizar interrupt mode (e.g., whether the address represents a MIZAR_D1ADDR_MR command) . If so, in step 1005, the hardware emulator portion 106 sets the Mizar interrupt mode (e.g., based on the put value) ; otherwise the process 1000 proceeds to step 1006 wherein an incorrect address error is returned to the GUI emulator portion 102. Numerous other get and put operations may be similarly performed.
  • the put instruction is a command to set the Mizar interrupt mode (e.g., whether the address represents a MIZAR_D1ADDR_MR command) . If so, in step 1005, the hardware emulator portion 106 sets the Mizar interrupt mode (e.g., based on the put value) ; otherwise the process 1000 proceeds to step 1006 wherein an incorrect address error is returned to the GUI emulator portion 102. Numerous other get and put operations may be similarly performed.
  • control software e.g., recipe and sequence files
  • control software may be created, edited and maintained using the inventive emulator and thereafter the control software may be employed to control a fabrication tool.
  • system constants e.g., wafer size
  • history logs e.g., wafer history
  • event logs e.g., start-up, shut-down, alarm conditions, faults, etc.
  • data regarding one or more fabrication processes performed with a fabrication tool may be captured via the fabrication tool and analyzed offline via the inventive emulator.
  • the emulator may be used as a training tool without concern of damage to the fabrication tool by an inexperienced user. Fabrication tool throughput analysis and optimization similarly may be performed off-line from the fabrication tool. Numerous fabrication tool operations thereby may be performed without consuming valuable production time. Additionally, m certain embodiments of the invention, the actual control software that controls a fabrication tool may be executed using the inventive emulator 100 (e.g., the control software of the fabrication tool will have no ability detect whether it is being executed by the fabrication tool or by the emulator) .
  • control system emulator 100 has been described primarily with respect to the Motorola M68K CPU, it will be understood that any other processor may be similarly employed and emulated (e.g., a Motorola Power PC Processor (PPC) , an Intel Processor, etc.)).
  • PC Power PC Processor

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Abstract

L'invention concerne un émulateur pouvant simuler des fonctions à la fois logicielles et matérielles d'un système de commande destiné à un processus de fabrication. Dans un premier mode de réalisation, cet émulateur comprend (1) une portion émulatrice d'interface graphique utilisateur (GUI), conçue pour émuler une interface graphique utilisateur d'un système de commande de processus de fabrication, (2) une portion émulatrice d'une unité centrale de traitement (CPU), conçue pour communiquer avec la portion émulatrice de l'interface et pour émuler une unité centrale de traitement du système de commande du processus de fabrication, et (3) une portion émulatrice de matériel, conçue pour communiquer avec la portion émulatrice d'interface et avec la portion émulatrice de l'unité centrale de traitement, et conçue pour émuler au moins un dispositif matériel employé dans le système de commande du processus de fabrication. L'invention concerne également d'autres modes de réalisation de cet émulateur.
PCT/US2000/042782 1999-12-14 2000-12-13 Emulateur d'un systeme de commande destine a un processus de fabrication Ceased WO2001046761A2 (fr)

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US17062799P 1999-12-14 1999-12-14
US60/170,627 1999-12-14

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6782343B2 (en) 2001-02-28 2004-08-24 Asm International N.V. Resource consumption calculator
WO2005047997A1 (fr) * 2003-11-13 2005-05-26 Siemens Aktiengesellschaft Procede de simulation d'un systeme d'automatisation
JP2010508649A (ja) * 2006-08-03 2010-03-18 ラム リサーチ コーポレーション 自動化試験および特性決定データ分析の方法および構成
US8151814B2 (en) 2009-01-13 2012-04-10 Asm Japan K.K. Method for controlling flow and concentration of liquid precursor

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0563341A1 (fr) * 1991-10-23 1993-10-06 Hughes Training, Inc Simulateur de traitement industriel automatise
DE19650328A1 (de) * 1996-12-04 1998-06-18 Siemens Ag Visualisierungseinrichtung für eine Anlage der Grundstoffindustrie, insbesondere ein Stahlwerk

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6782343B2 (en) 2001-02-28 2004-08-24 Asm International N.V. Resource consumption calculator
US6907362B2 (en) 2001-02-28 2005-06-14 Asm International N.V. Resource consumption calculator
WO2005047997A1 (fr) * 2003-11-13 2005-05-26 Siemens Aktiengesellschaft Procede de simulation d'un systeme d'automatisation
JP2010508649A (ja) * 2006-08-03 2010-03-18 ラム リサーチ コーポレーション 自動化試験および特性決定データ分析の方法および構成
EP2076784A4 (fr) * 2006-08-03 2011-09-28 Lam Res Corp Procédés et disposition d'analyse de données de caractérisation et de test automatisés
US8151814B2 (en) 2009-01-13 2012-04-10 Asm Japan K.K. Method for controlling flow and concentration of liquid precursor

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