WO2002013403A1 - Procede et systeme pour l'antiparasitage dans un circuit recepteur - Google Patents

Procede et systeme pour l'antiparasitage dans un circuit recepteur Download PDF

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Publication number
WO2002013403A1
WO2002013403A1 PCT/EP2001/009002 EP0109002W WO0213403A1 WO 2002013403 A1 WO2002013403 A1 WO 2002013403A1 EP 0109002 W EP0109002 W EP 0109002W WO 0213403 A1 WO0213403 A1 WO 0213403A1
Authority
WO
WIPO (PCT)
Prior art keywords
pulse
signal
bandpass filter
received signal
rectangular pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2001/009002
Other languages
German (de)
English (en)
Inventor
Matthias Eichin
Alexander Kurz
Karl-Ulrich Stahl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Germany GmbH
Melexis GmbH
Vishay Semiconductor GmbH
Original Assignee
Atmel Germany GmbH
Melexis GmbH
Vishay Semiconductor GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Germany GmbH, Melexis GmbH, Vishay Semiconductor GmbH filed Critical Atmel Germany GmbH
Priority to KR10-2003-7001777A priority Critical patent/KR100504624B1/ko
Priority to EP01960618A priority patent/EP1238468B1/fr
Priority to US10/344,141 priority patent/US7236743B2/en
Priority to JP2002518638A priority patent/JP2004506375A/ja
Publication of WO2002013403A1 publication Critical patent/WO2002013403A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/22—Circuits for receivers in which no local oscillation is generated
    • H04B1/24—Circuits for receivers in which no local oscillation is generated the receiver comprising at least one semiconductor device having three or more electrodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H04B10/697—Arrangements for reducing noise and distortion
    • H04B10/6972—Arrangements for reducing noise and distortion using passive filtering

Definitions

  • the invention relates to a method for interference suppression by means of a quality-adjustable bandpass filter in a receiver circuit for carrier-modulated reception signals according to the preamble of claim 1 and a circuit arrangement for performing this method.
  • IC integrated circuits
  • remote control receivers such as the U2548 from TEMIC Semicond ⁇ ctor GmbH
  • Their size is approximately 1.8 mm 2 .
  • these circuits have connection devices for the input signal, the output signal, the supply voltage, the ground lead and a number of adjustment devices.
  • the functioning of such a circuit consists in that the signal received by a photodetector, generally a photodiode, the received signal, is fed into an input circuit.
  • the input circuit has a transimpedance amplifier that amplifies pulsating input current signals and converts them into voltage signals. These voltage signals are then processed in a signal processing system.
  • the signal conditioning has a control amplifier, a limiter and a bandpass filter.
  • the task of the control amplifier is to amplify the output voltage from the transimpedance amplifier in accordance with the control specification.
  • the limiter has it Task to limit the signal swing in order to avoid overloading the bandpass filter.
  • the bandpass filter enables the selectivity of the receiver and limits its bandwidth.
  • the signals at the output of the bandpass filter are evaluated in a demodulator as an evaluation circuit. This demodulator consists of comparators, an integrator and Schmitt trigger and generates a switching signal for a driver transistor acting as a switch, whereby a digital control signal, for example a microcontroller, is made available for further processing.
  • This known circuit also contains a gain control, by means of which the gain of the receiver is adjusted in accordance with an interference field, as a result of which a high sensitivity for the received signals is achieved, but at the same time interference effects, for example caused by extraneous light, are largely suppressed, so that this is possible as far as possible no output pulses are generated by the driver transistor.
  • this known circuit has the disadvantage that when new technologies are used, its circuit area is reduced, as a result of which, due to switching processes in the output region of the receiver, in particular due to the driver transistor, faults, for example in the form of oscillator vibrations, due to the now effective capacitive couplings and drop in ground potential within of the circuit, which cannot be removed by the gain control.
  • the object of the invention is therefore to provide a method of the type mentioned at the outset, in which the self-induced disturbances mentioned can be suppressed without having the disadvantages described in the prior art.
  • a control signal tqr for reducing the quality of the bandpass filter is derived, depending on a further phase-shifted rectangular pulse is generated on the flanks of the first rectangular pulse, which preferably adjoins the first rectangular pulse in terms of time.
  • the square-wave pulse generated by the demodulator is derived from the bandpass-filtered received signal by first generating pulse sequences from this received signal by quantization, which are then integrated into an integral value, with this integral value being returned if there are no pulse sequences.
  • automatic gain control of the received signal by means of a control amplifier is provided, to which the received signal is fed before the bandpass filtering.
  • the regulation takes place depending on the signal size of the received signal and the ambient conditions - in particular the interference environment - of the receiver circuit.
  • this gain regulation is switched inactive during the demodulation of a bandpass-filtered reception signal - that is, during the reception of a valid data bit.
  • a third rectangular pulse, whose pulse width is longer than that of the first rectangular pulse, is preferably generated in order to switch the automatic gain control to inactive with respect to the first rectangular pulse (output signal of the demodulator).
  • the output signal of the demodulator (first square pulse), the control signal for reducing the bandpass filter (second square pulse) and the control signal (third square pulse) for inactive switching of the automatic gain control are derived both during integration and during feedback ,
  • Such a receiver circuit for carrying out the method according to the invention is produced as a monolithic circuit which only requires a photodiode in order to be able to work as a receiver for infrared remote controls and can already demodulate very small currents in the range of a few hundred picoamps, but this is one high transimpedance in the order of 300 M ⁇ required.
  • the driver transistor at the output of the demodulator switches the full logic level swing (e.g. 5V) at a maximum current of up to a few mA ' s.
  • FIG. 1 a block diagram of a receiver circuit according to the invention
  • FIG. 2 a block diagram of a demodulator used in the receiver circuit according to FIG. 1
  • FIG. 3 a logic diagram to explain the functioning of the
  • FIG. 4 a block diagram of an integrator used in the receiver circuit according to FIG. 1,
  • Figure 5 a logic diagram to explain the operation of the integrator according to Figure 4, - and
  • FIG. 6 a basic circuit diagram of a gyratory bandpass filter used in the receiver circuit according to FIG. 1. ,
  • FIG. 1 shows a block diagram of a receiver circuit 10 and its surroundings.
  • the carrier-modulated data emitted by an optical transmitter diode 6 are received as infrared pulse packets by a photodiode 5.
  • These infrared pulse packets impinging on the photodiode 5 with a carrier frequency of, for example, 38 kHz are trical current signals converted to SIN. They are present at the input terminal 11 of the receiver circuit 10.
  • These electrical current signals SIN are fed to an input circuit 1 operating as a transimpedance amplifier, which amplifies the current signals SIN and converts them into voltage signals.
  • the converted voltage must be large enough to make the noise component in subsequent signal processing stages negligible.
  • these voltage signals are amplified again by means of a control amplifier 21, limited by a limiter 22 and then filtered in a bandpass filter 23, this bandpass filter 23 also having a control input in addition to its analog input, with which the quality of the bandpass filter between two values can be switched.
  • the signal limitation by means of the limiter 22 is therefore necessary in order to avoid overmodulation of the subsequent bandpass filter 23 and to avoid pulse-shaped interferences, e.g. B. get into the receiver via a supply connection V s .
  • the bandpass filtered signal B ou t by a demodulator 31 demodulates and placed via a driver transistor 32 with associated load resistor 32 as an output signal SOUT to a microcontroller 7 for further processing.
  • the demodulator 31 also generates a control signal tqr, which is fed to the control input of the bandpass filter 23 via a line 72.
  • the quality of the bandpass filter 23 is hereby briefly reduced following a switching operation of the driver transistor 32 in order to prevent the triggering of an oscillator oscillation due to the switching operation carried out with the driver transistor 32, so as to counteract interference coupling in the receiver circuit designed as an integrated circuit.
  • the bandpass filter 23, which operates on a carrier frequency of the useful signals and enables the selectivity of the circuit, has a quality factor of 10, for example, which can be reduced to 1 on account of the control signal tqr, as will be explained further below.
  • the receiver circuit 10 has a control circuit 4 which supplies control signals to the control amplifier 21 and which in turn receives the output signal B out of the bandpass filter 23 via a line 75 and a signal D stoP-agc generated by the demodulator via a line 74 as input signals.
  • the function of this control circuit 4 is to optimize the signal / noise ratio by changing the gain of the input signal SIN depending on the size of the input signal.
  • the control circuit 4 is constructed from a control logic part (AGC) 41 and a digital-to-analog converter (DAC) 42.
  • the control logic part 41 separates the useful signal from the interference signals and sets the gain for the useful signals to the highest possible level, with which a high sensitivity for the useful signals is achieved. At the same time, interference from external light, for example, is reduced.
  • the digital-to-analog converter 42 converts the digital amplifier information generated by the control logic part 41 into an analog control voltage for the control amplifier 21.
  • the mode of operation of the demodulator 31 is explained in more detail below with reference to FIG. 2 and the associated pulse diagram according to FIG. 3, in particular the correlation between the output signal D ou t of the demodulator 31 switching the driver transistor 32 and the control signal which lowers the quality of the bandpass filter 23 Dt qr are shown.
  • the output signal B 0 u ⁇ coming from the bandpass filter 23 is digitized with a comparator 311, the threshold voltage 319 of which represents a fixed reference value which, however, can also be set in a signal-dependent manner over several stages compared to the band filter quiescent level.
  • the digital signals of the comparator 311 as pulse sequences Comp S j g are integrated in an analog integrator circuit 313.
  • This integrator 313 knows the states CHARGING or DISCHARGING up to the modulation limits 0% or 100%, as a result of which a limited integral voltage curve (see pulse diagram 313 in FIG. 3) is generated as an output signal lnt ou t.
  • the square wave signal 318, the signal D s t 0 p-agc (317) and the inverted signal D ou t are rounded with a NAND gate L3 to generate the control signal Dt qr (72).
  • the positive edge of the square-wave signal 72 is thus generated when the D ou t signal assumes its low level, while its negative edge coincides in time with that of the square-wave signal 318.
  • the analog integrator 313 used in the demodulator 31 integrates the digitized pulse sequences Comp S ig and can do this in a simple manner, as exemplified below in connection with FIGS the associated pulse diagram according to Figure 5 will be realized.
  • the pulse sequence Comp S j g shown by way of example in FIG. 5 contains pulses of different durations with different pulse pauses and is supplied to a trigger and hold element T which, when a first pulse occurs, switches on a current source Q which uses a current 11 to integrate an integration capacitor C.
  • the holding function of the trigger and holding element T is used, with which, after a certain period of time, which can be selected as a function of frequency according to 1, 6 / fo, the integration is interrupted due to a lack of impulse and an integration is started at the same speed by now the Current sink S is switched on to discharge the integration capacitor Cj nt .
  • Such a hold function is shown with the pulse diagram Hold1, 6 / f 0 and shows that the pulse pause between the first two pulses at times ti and t 2 is bridged, i.e. during this pulse pause it is integrated further, but not completely after the one second pulse, namely between times t 2 and t 3 .
  • the trigger and hold element T switches to the current sink S for the purpose of discharging the integration capacitor C in t with a current l 2 until the time tj, at which the next pulse for integration occurs, which until the maximum integration value of 100% is reached at the time t 5 is continued, although there are still further pulses and the holding time 1, 6f 0 only ends at time t ⁇ . Subsequently, integration is continued until time t, at which the integration value of the integrator output signal lnt ou t has reached its output value of 0% again.
  • FIG. 6 An exemplary construction of a quality-adjustable bandpass filter 23 is shown in FIG. 6 and can be used in the receiver circuit according to FIG. 1.
  • the bandpass filter shown represents a 2nd order gyratory filter whose general transfer function F (s) is given by the following formula:
  • the analog signal delimited by the limiter 22 is fed to the positive input of a summer 231 with three inputs (2 positive inputs and one negative input) via an input connection E of the bandpass filter.
  • the sum signal formed from the signals present at the three inputs is amplified by a factor ⁇ o with an amplifier 232 and passed on to a limiting integrator 233 which simulates a capacitance.
  • the filter By reducing the quality during the high level of the D tqr signal - i.e. during the switch-off torque of the driver transistor 32 and for a short time thereafter - the filter is brought into a state of lower energy absorption capacity, so that the interference caused by the driver transistor 32 takes shape a jump at the bandpass entrance can subside faster.
  • the time period in which the control signal D tqr is active must be as long as the disturbance of the driver transistor 32 continues in the circuit parts upstream of the bandpass filter 23. A negative influence on the demodulation of useful signals is excluded here, since the time for interference suppression is considerably shorter than the pause time of a bit sequence of the useful signals.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Noise Elimination (AREA)
  • Optical Communication System (AREA)
  • Circuits Of Receivers In General (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un procédé pour l'antiparasitage au moyen d'un filtre passe-bande à qualité réglable dans un circuit récepteur pour des signaux de réception à modulation de porteuse (Sin), le signal de réception filtré passe-bande (Bout) étant démodulé et une opération de commutation étant déclenchée à l'aide du signal de réception démodulé (Dout). Les circuits récepteurs connus présentent toutefois l'inconvénient que, en raison des petites dimensions de la surface du circuit, des perturbations, par exemple sous forme de variations d'oscillateur dues à des couplages capacitifs, sont causées par des opérations de commutation dans la zone de sortie du récepteur, notamment par des transistors d'attaque. Ces perturbations ne peuvent pas être éliminées par un réglage du gain fourni dans le circuit. Selon l'invention, on élimine de telles perturbations intrinsèques en corrélant une réduction de qualité du filtre passe-bande avec l'opération de commutation causant la perturbation. Le procédé selon l'invention convient avant tout à la constitution de circuits destinés à des récepteurs infrarouges, qui présentent ainsi une petite taille et peuvent être produits sans composants externes et donc à moindre coût.
PCT/EP2001/009002 2000-08-08 2001-08-03 Procede et systeme pour l'antiparasitage dans un circuit recepteur Ceased WO2002013403A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR10-2003-7001777A KR100504624B1 (ko) 2000-08-08 2001-08-03 수신기 회로 내 잡음억제를 위한 방법 및 장치
EP01960618A EP1238468B1 (fr) 2000-08-08 2001-08-03 Procede et systeme pour l'antiparasitage dans un circuit recepteur
US10/344,141 US7236743B2 (en) 2000-08-08 2001-08-03 Method and arrangement for noise rejection in a receiver circuit
JP2002518638A JP2004506375A (ja) 2000-08-08 2001-08-03 受信機回路において妨害を抑圧する方法および装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10038616.4 2000-08-08
DE10038616A DE10038616B4 (de) 2000-08-08 2000-08-08 Verfahren und Anordnung zur Störunterdrückung in einer Empfängerschaltung

Publications (1)

Publication Number Publication Date
WO2002013403A1 true WO2002013403A1 (fr) 2002-02-14

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Application Number Title Priority Date Filing Date
PCT/EP2001/009002 Ceased WO2002013403A1 (fr) 2000-08-08 2001-08-03 Procede et systeme pour l'antiparasitage dans un circuit recepteur

Country Status (7)

Country Link
US (1) US7236743B2 (fr)
EP (1) EP1238468B1 (fr)
JP (1) JP2004506375A (fr)
KR (1) KR100504624B1 (fr)
CN (1) CN100442673C (fr)
DE (1) DE10038616B4 (fr)
WO (1) WO2002013403A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009156063A1 (fr) * 2008-06-23 2009-12-30 Vishay Semiconductor Gmbh Circuit récepteur d’infrarouges
WO2010060536A1 (fr) * 2008-11-26 2010-06-03 Vishay Semiconductor Gmbh Circuit récepteur infrarouge
US8260155B2 (en) 2006-07-18 2012-09-04 Sharp Kabushiki Kaisha Carrier detection circuit, method for controlling carrier detection circuit, and infrared signal processing circuit having the carrier detection circuit
RU2618616C1 (ru) * 2015-12-21 2017-05-04 Открытое Акционерное Общество "Научно-Исследовательский И Проектно-Конструкторский Институт Информатизации, Автоматизации И Связи На Железнодорожном Транспорте" Устройство подавления импульсных помех на входе локомотивного приемника АЛС

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8094591B1 (en) * 2002-03-19 2012-01-10 Good Technology, Inc. Data carrier detector for a packet-switched communication network
US7822349B2 (en) * 2002-08-01 2010-10-26 Inncom International, Inc. Digital iterative gain control
DE102005017004B4 (de) * 2005-04-07 2010-01-14 Atmel Automotive Gmbh Demodulations-und Regelkonzept, insbesondere für IR-Empfänger
JP4290721B2 (ja) * 2006-11-15 2009-07-08 シャープ株式会社 バンドパスフィルタ回路、並びに赤外線信号処理回路
JP4283301B2 (ja) 2006-11-15 2009-06-24 シャープ株式会社 バンドパスフィルタ回路、バンドエリミネートフィルタ回路、並びに赤外線信号処理回路
US8787774B2 (en) * 2007-10-10 2014-07-22 Luxtera, Inc. Method and system for a narrowband, non-linear optoelectronic receiver
DE102009056461A1 (de) 2009-12-01 2011-06-09 Vishay Semiconductor Gmbh Infrarot-Empfängerschaltung
EP2373009A3 (fr) * 2010-03-31 2014-05-28 Sony Corporation Appareil de récepteur de signaux de télévision avec détection des signaux sonores
US8565711B2 (en) * 2010-06-03 2013-10-22 Broadcom Corporation SAW-less receiver including an IF frequency translated BPF
US8655299B2 (en) * 2010-06-03 2014-02-18 Broadcom Corporation Saw-less receiver with RF frequency translated BPF
CN103066984B (zh) * 2012-12-20 2015-07-15 西安电子科技大学 不受频率影响的动态脉冲积分电路
DE102015212845A1 (de) 2015-07-09 2017-01-12 Forschungszentrum Jülich GmbH Filterschaltung zur Unterdrückung einer Signalverzerrung
CN106205528B (zh) * 2016-07-19 2019-04-16 深圳市华星光电技术有限公司 一种goa电路及液晶显示面板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4553049A (en) * 1983-10-07 1985-11-12 International Business Machines Corporation Oscillation prevention during testing of integrated circuit logic chips
DE4232377A1 (de) * 1992-09-26 1994-03-31 Andromeda Gmbh Infrarot-Datenübertragungs-Verfahren mit erhöhter Zuverlässigkeit

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3537654C2 (de) * 1985-10-23 1995-09-21 Daimler Benz Aerospace Ag Verfahren zur Reduzierung von Störungen bei der Filterung von Empfangssignalen bei Kanal-Umschaltvorgängen in Empfängern
DE3818749A1 (de) * 1988-05-30 1989-12-21 H U C Elektronik Gmbh Fm-empfangsteil
JP2783578B2 (ja) * 1989-02-21 1998-08-06 キヤノン株式会社 スペクトラム拡散通信装置
US5002612A (en) * 1989-07-19 1991-03-26 Biospherics Incorporated Process for manufacturing tagatose
CA2077257C (fr) * 1989-07-19 2002-02-19 James R. Beadle Procede de fabrication du tagatose
DE4005272A1 (de) 1990-02-20 1991-08-22 Bosch Gmbh Robert Verfahren zur zf-bandbreitenumschaltung sowie zf-bandbreitenumschaltvorrichtung
NZ239733A (en) * 1990-09-21 1994-04-27 Ericsson Ge Mobile Communicat Mobile telephone diversity reception with predetect signal combination
US6057135A (en) * 1992-01-16 2000-05-02 Kraft Foods, Inc. Process for manufacturing D-tagatose
JP2822975B2 (ja) * 1996-04-09 1998-11-11 日本電気株式会社 受信機
JP3178382B2 (ja) 1997-09-12 2001-06-18 松下電器産業株式会社 高周波装置
US6879817B1 (en) * 1999-04-16 2005-04-12 Parkervision, Inc. DC offset, re-radiation, and I/Q solutions using universal frequency translation technology
US20040151237A1 (en) * 2000-05-31 2004-08-05 Bitrage, Inc. Satellite communications system
US6991923B2 (en) * 2001-07-16 2006-01-31 Arla Foods Amba Process for manufacturing of tagatose

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4553049A (en) * 1983-10-07 1985-11-12 International Business Machines Corporation Oscillation prevention during testing of integrated circuit logic chips
DE4232377A1 (de) * 1992-09-26 1994-03-31 Andromeda Gmbh Infrarot-Datenübertragungs-Verfahren mit erhöhter Zuverlässigkeit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"TPS831", TOSHIBA DATA SHEET, 10 December 1997 (1997-12-10), XP002184335 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8260155B2 (en) 2006-07-18 2012-09-04 Sharp Kabushiki Kaisha Carrier detection circuit, method for controlling carrier detection circuit, and infrared signal processing circuit having the carrier detection circuit
WO2009156063A1 (fr) * 2008-06-23 2009-12-30 Vishay Semiconductor Gmbh Circuit récepteur d’infrarouges
US8447192B2 (en) 2008-06-23 2013-05-21 Vishay Semiconductor Gmbh Infrared receiver circuit
WO2010060536A1 (fr) * 2008-11-26 2010-06-03 Vishay Semiconductor Gmbh Circuit récepteur infrarouge
US8744027B2 (en) 2008-11-26 2014-06-03 Vishay Semiconductor Gmbh Infrared receiver circuit
RU2618616C1 (ru) * 2015-12-21 2017-05-04 Открытое Акционерное Общество "Научно-Исследовательский И Проектно-Конструкторский Институт Информатизации, Автоматизации И Связи На Железнодорожном Транспорте" Устройство подавления импульсных помех на входе локомотивного приемника АЛС

Also Published As

Publication number Publication date
JP2004506375A (ja) 2004-02-26
DE10038616A1 (de) 2002-02-28
CN1404657A (zh) 2003-03-19
KR20030020453A (ko) 2003-03-08
US7236743B2 (en) 2007-06-26
EP1238468A1 (fr) 2002-09-11
EP1238468B1 (fr) 2003-10-22
CN100442673C (zh) 2008-12-10
DE10038616B4 (de) 2012-07-12
US20030171108A1 (en) 2003-09-11
KR100504624B1 (ko) 2005-08-01

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