WO2002065699A3 - Procede et dispositif pour assurer un transfert de donnees regule sur un bus bifilaire - Google Patents

Procede et dispositif pour assurer un transfert de donnees regule sur un bus bifilaire Download PDF

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Publication number
WO2002065699A3
WO2002065699A3 PCT/EP2002/001204 EP0201204W WO02065699A3 WO 2002065699 A3 WO2002065699 A3 WO 2002065699A3 EP 0201204 W EP0201204 W EP 0201204W WO 02065699 A3 WO02065699 A3 WO 02065699A3
Authority
WO
WIPO (PCT)
Prior art keywords
bus
address
stations
ensuring
data transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2002/001204
Other languages
German (de)
English (en)
Other versions
WO2002065699A2 (fr
Inventor
Daniel Muessli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to AU2002250892A priority Critical patent/AU2002250892A1/en
Publication of WO2002065699A2 publication Critical patent/WO2002065699A2/fr
Publication of WO2002065699A3 publication Critical patent/WO2002065699A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control
    • H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]
    • H04L12/4135—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD] using bit-wise arbitration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control
    • H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)

Abstract

L'invention concerne un procédé selon lequel un transfert de données régulé est assuré sur un bus bifilaire avec un nombre quelconque de stations (St1, St2, St3) en tant que capteurs et/ou actionneurs. Un appareil d'alimentation de bus central (NG) donne une impulsion de départ (P1) sur le bus (Bus). Après un laps de temps défini (ta), toutes les stations (St1, St2, St3) qui ont un message à envoyer envoient leur adresse (SA1, SA2, SA3) par bits sur le bus, en court-circuitant le bus par un commutateur, en fonction de l'adresse (SA1, SA2, SA3). Toutes les stations (St1, St2, St3) reliées au bus captent le signal du bus. L'électronique d'évaluation de chaque station (St1, St2, St3) compare par bits le signal réceptionné par le bus avec sa propre adresse (SA1, SA2, SA3) et, en cas de différence, interrompt la transmission de sa propre adresse (SA1). Les autres stations (St2, St3) poursuivent ce processus jusqu'à ce que la dernière station (St3) envoie ses données sur le bus.
PCT/EP2002/001204 2001-02-14 2002-02-06 Procede et dispositif pour assurer un transfert de donnees regule sur un bus bifilaire Ceased WO2002065699A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002250892A AU2002250892A1 (en) 2001-02-14 2002-02-06 Method and device for ensuring a regulated data transfer on a two-wire bus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2001106846 DE10106846A1 (de) 2001-02-14 2001-02-14 Verfahren und Vorrichtung zum Sicherstellen eines geregelten Datentransfers auf einem Zweidraht-Bus
DE10106846.8 2001-02-14

Publications (2)

Publication Number Publication Date
WO2002065699A2 WO2002065699A2 (fr) 2002-08-22
WO2002065699A3 true WO2002065699A3 (fr) 2002-11-14

Family

ID=7674015

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/001204 Ceased WO2002065699A2 (fr) 2001-02-14 2002-02-06 Procede et dispositif pour assurer un transfert de donnees regule sur un bus bifilaire

Country Status (3)

Country Link
AU (1) AU2002250892A1 (fr)
DE (1) DE10106846A1 (fr)
WO (1) WO2002065699A2 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4745596A (en) * 1985-07-16 1988-05-17 Honda Giken Kogyo Kabushiki Kaisha Multiplex communication system
US4887262A (en) * 1987-03-30 1989-12-12 U.S. Philips Corporation Single-channel bus system for multi-master use with bit cell synchronization, and master station comprising a bit cell synchronization element suitable for this purpose
EP0756402A1 (fr) * 1995-07-25 1997-01-29 Cho, Jin-young Système distribué d'arbitrage sériel
EP0940950A2 (fr) * 1998-03-06 1999-09-08 STMicroelectronics GmbH Interface nodale dans un réseau de données

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4745596A (en) * 1985-07-16 1988-05-17 Honda Giken Kogyo Kabushiki Kaisha Multiplex communication system
US4887262A (en) * 1987-03-30 1989-12-12 U.S. Philips Corporation Single-channel bus system for multi-master use with bit cell synchronization, and master station comprising a bit cell synchronization element suitable for this purpose
EP0756402A1 (fr) * 1995-07-25 1997-01-29 Cho, Jin-young Système distribué d'arbitrage sériel
EP0940950A2 (fr) * 1998-03-06 1999-09-08 STMicroelectronics GmbH Interface nodale dans un réseau de données

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ETSCHBERGER KONRAD: "CAN Controller-Area-Network Grundlagen, Protokolle, Bausteine, Anwendungen", 1994, CRL HANSER VERLAG MÜNCHEN WIEN, GERMANY, XP002210677 *

Also Published As

Publication number Publication date
AU2002250892A1 (en) 2002-08-28
WO2002065699A2 (fr) 2002-08-22
DE10106846A1 (de) 2002-09-05

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