WO2006010734A1 - Composant a semi-conducteurs et procede d'exploitation dudit composant a semi-conducteurs, comme commutateur electronique - Google Patents

Composant a semi-conducteurs et procede d'exploitation dudit composant a semi-conducteurs, comme commutateur electronique Download PDF

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Publication number
WO2006010734A1
WO2006010734A1 PCT/EP2005/053536 EP2005053536W WO2006010734A1 WO 2006010734 A1 WO2006010734 A1 WO 2006010734A1 EP 2005053536 W EP2005053536 W EP 2005053536W WO 2006010734 A1 WO2006010734 A1 WO 2006010734A1
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Prior art keywords
semiconductor
semiconductor region
region
operating
electrode
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German (de)
English (en)
Inventor
Hans-Günter ECKEL
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Siemens AG
Siemens Corp
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Siemens AG
Siemens Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/211—Gated diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps

Definitions

  • the invention relates to a semiconductor device and a ⁇ Ver drive for operating the semiconductor device as elektroni ⁇ shear switch, in particular in a converter, preferably in an indirect converter.
  • DC link converters are special converters which first rectify an AC input voltage or an AC input current of a specific amplitude and frequency in a rectifier, then smooth the rectified voltage or the rectified current in an intermediate circuit and finally in a subsequently connected inverter in an AC output voltage or an AC output current of a certain amplitude and frequency transform.
  • intermediate voltage converter or DC-DC converter
  • the inverter operates with an impressed voltage and the DC link generally has a capacitance connected in parallel.
  • current ⁇ intermediate-circuit converter the inverter operates with an impressed current and the intermediate circuit generally comprises a series-connected inductor.
  • Inverters generally have controllable semiconductor switching elements.
  • DC DC link converters require semiconductor switches which can be energized in both directions and can pick up or block voltage in one direction. Although in principle this may be the unipolar MOSFETs (Metal-Oxide-Semiconductor-Field-Effect-Tran- sistor) accomplish.
  • MOSFETs Metal-Oxide-Semiconductor-Field-Effect-Tran- sistor
  • bipolar power components in particular Bipo ⁇ lartransistoren, IGBT (Insulated Gate Bipolar Transistor), GTO (gate T_urn-off thyristor) or IGCT (Integrated Gate Commutated Thyristor), in use, due to their lower forward voltage and higher blocking capability over MOSFETs.
  • the mentioned known bipolar power semiconductor components conduct the current only in one direction.
  • the bipolar semiconductor switching elements freewheeling diodes are connected in anti-parallel, ie parallel in the direction opposite to the forward direction of the semiconductor switching element ⁇ direction, which can conduct the current in the other direction.
  • PIN diodes and, for smaller voltages, Schottky diodes based on silicon (Si) and, for larger voltages, Schottky diodes based on silicon carbide (SiC) have been used as freewheeling diodes.
  • the reverse recovery behavior of the freewheeling diode limits ⁇ ever but the permissible closing speed of the semiconductor switch ⁇ . Before the diode can absorb voltage, the storage charge must be cleared. This causes loss ⁇ performance in both the diode as ter in the Halbleiterschal-. By a sufficiently slow turn-on speed of the semiconductor switch, the safe operation of the free ⁇ running diode can be ensured. However, this limits the Be ⁇ operating frequency of the inverter and the resulting loss ⁇ power leads to increased cooling costs or to an enlarged chip area of the power semiconductors.
  • the invention is based on the object of specifying a semiconductor component which can conduct a current in both directions even without an antiparallel freewheeling diode.
  • a semi-conductor device ⁇ having the features of claim 1.
  • the semiconductor component comprises in claim 1, a first semiconductor region, at least one ⁇ in at least ei nem transition region immediately adjacent to the first Halbleiterge ⁇ Bidding adjacent second semiconductor region of a given conductivity type and at least one third semiconductor region ei ⁇ nes predetermined, to the conduction type of the second Halbleiterge ⁇ Biets opposite Conduction type and at least one semiconductor device.
  • At least one first operating electrode of the semiconductor component is electrically contacted with the first semiconductor region.
  • the first semiconductor region, the two ⁇ te semiconductor region and the third semiconductor region are electrically connected in series at least a first driving electrode between the Be ⁇ and arranged at least a second operating electrode.
  • the semiconductor device is electrically insulated ter which from the third semiconductor region between the second semiconducting ⁇ and connected in the second operating electrode.
  • the semiconductor device inhibits or prevents a current flow between the second semiconductor region and the second operating electrode in the conducting direction of the pn junction between the second semiconductor region and third Halbleiterge ⁇ Bidding, ie when this pn junction in the forward or is polarized in the forward direction, and can a current flow in the reverse direction of this pn junction to, ie in the same direction in which blocks this pn junction or poled in Sperr ⁇ direction.
  • the semiconducting ⁇ can teran eleven a charge carrier flow of Majorticiansladungs ⁇ carriers of the second semiconductor region (electrons in n-type conduction and holes for p-type conduction in the second semiconductor region) in the current direction of the second operating electrode for sau ⁇ th semiconductor region by, locks on the other hand such a Majorticians ⁇ charge carrier flow in the reverse flow direction from the second semiconductor region for the second operating electrode.
  • the semiconductor device further comprising we ⁇ a control electrode to which a variable STEU ⁇ erpotential (control voltage) or a variable control Ström can be applied or applied, the or the first semiconductor region at least in at least one lying or arranged between the first operating electrode and the second semiconductor region or channel channel region, in a first operating state in a Lei ⁇ tion type of the second semiconductor region opposite Lei Brings or sets tion ⁇ type and in at least one wide ⁇ ren, second operating state, brings or set in the same conductivity type to the conductivity type of the second semiconductor region.
  • a control electrode to which a variable STEU ⁇ erpotential (control voltage) or a variable control Ström can be applied or applied, the or the first semiconductor region at least in at least one lying or arranged between the first operating electrode and the second semiconductor region or channel channel region, in a first operating state in a Lei ⁇ tion type of the second semiconductor region opposite Lei Brings or sets tion ⁇ type and in at least one wide ⁇ ren
  • the first semiconductor region is of a predetermined conductivity type, preferably of the opposite conductivity type to the second semiconductor region.
  • the first semiconductor region comprises at least a first subarea and at least a second subarea, wherein the first subarea adjoins the second semiconductor region and the second subarea does not adjoin the second semiconductor region, the first subarea and the second subarea first operating electrode adjacent or kontak ⁇ advantage of this and the first partial region a semiconductor region with the second half ⁇ opposite conductivity type and the second partial region have a same second conduction type semiconductor region.
  • the semiconductor device preferably comprises at least one Schottky junction and / or at least one Schottky diode and / or at least one pn junction and / or at least one pn diode, each electrically antiparallel (or: parallel and in the opposite forward direction) Polarity) is connected to the pn junction formed between the second semiconductor region and the third semiconductor region between the first (n) operating electrode (s) and the second (n) operating ⁇ electrode (s).
  • the Halblei ⁇ comprises teran eleven at least one fourth semiconductor region of a predetermined, equal to the conduction type of the second semiconductor region conductivity type, said fourth semiconductor region e lectric between the second semiconductor region and which we ⁇ antes a second operating electrode is connected and to the second semiconductor region adjacent, and preferably ⁇ we ante ante ips a conductor region and at least a fifth semiconducting ⁇ teruter, wherein the semiconductor region is electrically disposed between the fourth semiconductor region and fifth semiconductor region, and preferably further comprises at least a sixth semiconductor region, said fifth semiconductor region is electrically connected between the conductor region and the sixth semiconductor region.
  • one or the Schottky junction may be formed between the conductor region and the fifth semiconductor region, and / or the pn junction may be formed between the fifth semiconductor region and the sixth semiconductor region, wherein the polarity is set to the opposite polarity switched pn junction is the fifth semiconductor region of the opposite conductivity type as the second Halbleit ⁇ area and the sixth semiconductor region of the same Lei ⁇ tion type as the second semiconductor region.
  • a pn junction is formed, which is in a blocking state or an on state depending on the polarity of the operating voltage applied between the two operating electrodes.
  • the charge ⁇ may carrier concentration or the impurity concentration in egg nem remote from the first semiconductor region and / or administration to the third semiconductor region and the semiconductor device, particularly into ⁇ the fourth semiconductor region, adjacent part ⁇ , preferably by at least one Factor 2, be lower.
  • At least two states with different charge carrier concentrations in the first semiconductor region can also be adjustable and in one of these states a lower forward resistance and a higher storage charge are present in the transition region between the first semiconductor region and the second semiconductor region than in another of these states ,
  • a particularly advantageous application is the semiconductor component according to the invention as an electronic switch, in particular in a power converter, inverter or DC-DC converter.
  • An advantageous method for operating a semiconductor component according to the invention as an electronic switch, in particular in a converter, preferably in a DC-link converter comprises the method steps: a) application of an operating voltage to the semiconductor component between the first operating electrode and the second operating electrode, b) at least temporarily determining the polarity of the anlie ⁇ constricting operating voltage or of the current flowing operating current component through the Halbleiter ⁇ , c) putting the semiconductor device into a freshlyschal- ended state or a state in which it receives the anlie ⁇ constricting operating voltage in a reverse direction, in that the semiconductor component is brought into its first operating state by application of the corresponding control potential or control current to the control electrode (s) and the pn junction between the or each first semiconductor region and the second semiconductor region is reversely poled, d ) displacement of the semiconductor device into an on scarf ⁇ ended condition for conducting an operating current between the operating electrode by dl) bringing the semiconductor device to its ten ers ⁇ operating state at a first polarity of the operating current or the
  • FIG. 1 shows a semiconductor component in a section
  • FIG. 2 shows the semiconductor component according to FIG. 1 in a first operating state
  • FIGS. 1 to 5 shows a control head of a semiconductor device in ver ⁇ tikaler structure and Figure 7 shows a control head of a semiconductor device of planar structure in each case in a schematic representation. Corresponding parts and sizes are provided in FIGS. 1 to 5 with the same reference numerals.
  • the semiconductor component H shown in FIGS. 1 to 3 at least in a section comprises a first operating electrode
  • a second operating electrode 3 an insulator region 4, egg ⁇ ne or more control electrodes 5, a first Halbleiterge ⁇ Bidding 6, a second semiconductor region 7, a third semiconducting ⁇ ter which 8, another insulator region 9, a fourth HaIb- conductor region 10 a semiconductor region 11, a fifth semiconductor ⁇ area 12 and a sixth semiconductor region. 13
  • An operating voltage U B is applied to the two operating electrodes 2 and 3, which is typically between 100 V and 1000 V, for example in a DC-link converter.
  • a control potential is applied, which corresponds to a control voltage U s as a potential difference between the potential at the control electrode 5 and the first operating electrode 2.
  • the first operating electrode 2 is directly adjacent to a surface 62 of the first semiconductor region 6 and kontak ⁇ advantage of this as ohmic contact. Chen on adjacent surface-64, the first semiconductor region 6 of the at least one insulator region 4 is covered, the electrode on the first operation ⁇ 2 extends and moreover the second half conductor area 7 covered at the free surface 74.
  • the control electrode (s) 5 is or are on the insulator area 4 at its from the first Halbleiter ⁇ area 6 is arranged facing away from the outer surface and covers over ⁇ or cover at least the first semiconductor region 6, between the or each control electrode 5 and the first Be ⁇ drive electrode 2 is held over the insulator region 4 a sufficient distance to the electrical insulation.
  • the second semiconductor region (or base) 7 adjoins, on the one hand, the third semiconductor region 8 in a transition region 78 and the fourth semiconductor region 10 in a transition region 80.
  • the third semiconductor region 8 connects the second semiconductor region 7 to the second operating electrode 3.
  • the fourth semiconductor region 10, the conductor region 11, the fifth semiconductor region 12 and the sixth semiconductor region 13 are electrically connected in series in this order between the transition region 80 at the second semiconductor region 7 and the second operating ⁇ electrode.
  • the conductor area 11 forms with the underlying, five ⁇ th semiconductor region 12 forms a Schottky contact or a Schottky diode.
  • the series circuit of the fourth semiconductor region 10, the conductor region 11, the schottky contact 81, the fifth half ⁇ semiconductor region 12 and the sixth semiconductor region 13 forms a semiconductor device, which is electrically insulated via the insulating region 9 of the third semiconductor region.
  • the operating electrode 3 is electrically connected to the third semiconductor region 8 at its end facing away from the transition region 78
  • the second semiconductor region 7, the fourth semiconductor region 10, the fifth semiconductor region 12 and the sixth semiconducting ⁇ ter are of the same conductivity type, in the illustrated embodiment of Figures 1 to 3 the n-conductivity type.
  • the third semiconductor region 8 is of the opposite conduction type ⁇ , in the exemplary embodiment, the p-conductivity type.
  • the La ⁇ carrier concentrations can be adjusted differently, generally by adding different Dotier ⁇ substance concentrations or dopants.
  • the third semiconductor region 8 is doped p +, has therefore a higher Löcherkon ⁇ concentration on the fourth semiconductor region 10 is doped n + and the sixth semiconductor region doped 13 also n +, while the fifth semiconductor region 12 n ⁇ so low n, is doped.
  • the second semiconductor region 7 is divided 7B in the embodiment shown in two partial areas 7A and wherein the first sub-region lying between the second part area 7B and the first semiconductor region 6 7A n ⁇ is doped and which has considerably larger dimensions in the Stromrich ⁇ tung as the second subregion 7B, the second part ⁇ administration is however 7B highly doped (n +) in the Sprintgangsge ⁇ Bidding 78 to the third semiconductor region 8 and in the supernatant ⁇ transition region 79 transition region of the insulator region 9 and in the over-80 to the fourth Semiconductor region 10 adjacent.
  • the higher-doped second sub-area 7B serves as a field stop or buffer layer (buffer), but can also be omitted.
  • the first half ⁇ conductor region 6 of both the n-type conductivity so also p-Lei ⁇ tion type as well as intrinsic, ie without Fremdstoffdotie- tion formed , for example, be doped p ⁇ be.
  • the conductivity type of the first semiconductor region 6 can now be connected to the one or more by means of the control voltage U s
  • Control electrode (s) 5 by charge carrier depletion or enrichment at least in a continuous channel region between see first operating electrode 2 and second semiconductor region 7 are changed or inverted.
  • the carrier concentration that is, the concentration of the majority charge carriers, so in n-type conductivity of the electrons and p-conductivity type of the Lö ⁇ cher, via the control voltage U s at the or Steuerelekt ⁇ rode (s) 5 adjusted, if is desired.
  • U s Ui
  • the first semiconductor region 6 is the p-wave ⁇ tung type assumes ( "p-type control head").
  • formed in the transition area 67 between the first semiconductor region 6 and the second semiconductor region 7 and the first sub-region 7A is a pn junction.
  • the pn junction 67 is between the first semiconductor region 6 and the second semiconductor region 7 in its forward direction.
  • the depletion zone or barrier layer of the pn junction is thus flooded with charge carriers and the pn junction has a low electrical resistance.
  • the oppositely poled or switched pn junction between the third semiconductor region 8 and the second semiconductor region 7 is poled in the reverse direction and has a barrier layer or depletion zone which is enlarged by charge carrier depletion and has a high electrical resistance.
  • a schematically indicated current path for an operating current I B between the first operating electrode 2 and the second operating electrode 3 extends initially as a current path 20 through the first semiconductor region 6 and the second semiconducting ⁇ ter designed 7 and then divides itself or branches into two current paths 21 and 22, wherein the first current path 21 via the pn junction 78 of the second semiconductor region 7 leads to the second operating electrode 9 through the third semiconductor region 8 and the second current path 22 leads to the second operating electrode 9 via the series connection of the fourth semiconductor region 10, conductor region 11, fifth semiconductor region 12 and sixth semiconductor region 13.
  • the semiconductor device H behaves in the first Radiozu ⁇ stand according to FIG 2 as a classic diode (PN diode or PIN diode) and thus operates at positive polarity of Be operating voltage U B in the passage, so allows a flow of current from the first operating electrode 2 to the second Radioselekt ⁇ rode 3, and locks in negative polarity of the operating ⁇ voltage U B , that is from the second operating electrode 3 to the first operating electrode 2 no current flow.
  • PN diode or PIN diode PN diode or PIN diode
  • the control voltages Ui and U 2 are typically between 5 V and 15 V.
  • the first semiconductor region 6 is of the same conductivity type, that is to say of the n-conductivity type, like the second semiconductor region 7.
  • the transition region 67 is thus between the first semiconductor region 6 and the second semiconductor ⁇ ter which 7 no pn junction more, but a transition be- look the same conductive semiconductor regions electrically for the current path 20 does not represent a significant electrical resistance.
  • Transition 78 between the second semiconductor region 7 and the third semiconductor region 8 in its blocking state is de-energized and a current flow occurs via the current path 20 and the current path 22.
  • the pn junction 78 is poled in the forward direction between the second semiconductor region 7 and the third semiconductor region 8 and the current path 21 is available for current conduction the charge carrier transport through the pn junction 78 is bipolar.
  • the second current path 22, however, is not energized because the Schottky contact 81 blocks.
  • the semiconductor component H In the second operating state of the semiconductor component H can thus in both current directions, that is, at positive and negative operating voltage U B, conduct current, but als ⁇ due to the low on-resistance substantially kei ⁇ ne voltage record.
  • the semiconductor device H is bipolar, ie holes and electrons contribute to the charge transport, and thus has a relatively low forward voltage.
  • the p-type semiconductor region drit ⁇ te 8 emitted thereby in the second Trozu ⁇ was holes to a bipolar charge carrier transport in the flow of current from the cathode 3 to the anode 2, that is at a negative operating voltage, to enable.
  • Anode 2 to the cathode 3, the semiconductor device in the region of the second semiconductor region 7 (n-base) is unipolar, so has a relatively high forward voltage.
  • the Schottky contact 81 in the current path 22 it is also possible to integrate a pn diode, for example, by forming the fifth semiconductor region 12 of the opposite conductivity type as the sixth semiconductor region 13, ie p + doping here, and thereby together with the one here n-doped sixth semiconductor region 12 forms a pn junction in the current path 22, which is connected in antiparallel to the pn junction 67 and the analog passage and blocking ⁇ behavior as the Schottky contact 81 has, ie in particular ⁇ special in the second operating state at negative operating voltage U B blocks.
  • the first operating electrode 2 with the second semiconductor tera 7, are generated, as is usually the case with MOS structures.
  • the second semiconducting ⁇ ter is formed with a substrate or wafer or chip.
  • the first semiconductor region 6 is grown as a layer, generally epitaxially, on the substrate, and then patterned so that the illustrated mesa structure ent ⁇ stands, which can be referred to as a control head and the ers ⁇ th semiconductor region 6, the insulator layer 4 and the control ⁇ electrode (s) 5 includes.
  • the further semiconductor are terhale 8 and 10 to 10, 12 and 13 is also applied as layers, said third semiconductor region 8 is formed as Runaway ⁇ immediate layer and the 9 separate series circuits Bidding by Isola Torge ⁇ from fourth Halbleiterge ⁇ Provided 10, conductor region 11, fifth semiconductor region 12 and sixth semiconductor region 13 in the form of n-type islands within the p-layer for the third semiconductor region 8 are formed.
  • the semiconductor regions may all consist of the same semiconductor or of different semiconductors.
  • Semiconductors are mainly silicon (Si), but also Si liciumcarbid (SiC) or gallium arsenide (GaAs), or (in particular ⁇ ) IV-IV semiconductors, III-V semiconductors or II-VI semiconductor or diamond into consideration.
  • the doping of the individual semiconductor regions can be done gen layers or the wafer during the generation of jeweili ⁇ , but also nachträg ⁇ Lich by diffusion or ion implantation.
  • Typical doping Substances are for example for the P-doping with silicon or silicon carbide boron (B) and aluminum (Al) and for the n-doping in silicon arsenic (As), phosphorus (P) or antimony (Sb) and in other semiconductors corresponding known doping elements.
  • the electrode metals but other electrical ⁇ cal conductor such as polysilicon are primarily considered, such as aluminum.
  • the insulator regions consist of an oxide, in particular a silicon oxide, so that the control heads are generally designed as MOS structures.
  • a planar topology or a trench topology in particular a MOS structure, is also possible in a manner known per se.
  • a planar arrangement instead of the vertical arrangement of the regions 10, 11, 12 and 13 of the semiconductor device, a planar arrangement can also be selected.
  • Figures 6 and 7 show embodiments of control heads of the semiconductor device, in which the first half-conductor region 6 ⁇ p-conductive in a first partial area 6A and one or two second n-type sub-regions is divided 6B.
  • the first sub-area 6A forms the second semiconducting ⁇ ter which 7 the pn junction 67 and extends between the examples the second part areas 6B to the first operating electrode 2.
  • the one or more second (s) subregions 6B is adjacent or against limits on the one hand to the Insulator 4 and on the other hand to the first operating electrode 2 and is or are separated by the first sub-area 6A each of the second semiconductor region 7.
  • control electrode (s) 5 By means of a control potential or control current applied to control electrode (s) 5, charge carrier inversion along insulator region 4 and control electrode (s) 5 in first partial region 6A can now form an n-channel between each second partial region 6B and the second semiconductor region 7 are generated, generally in the second operating state, so that a continuous n-type connection between the first operating electrode 2 and the second Semiconductor region 7 is created and the pn junction 67 is "bridged".
  • FIG. 6 shows a vertical topology in which the channel (s) between the second partial area (s) 6B and the second semiconductor area 7 runs essentially vertically.
  • the control head is also formed in the manner of a mesa structure.
  • FIG. 7 shows a planar topology in which the subregions 6A and 6B in the second semiconductor region 7 form a common planar surface and are formed by diffusion, e.g. in the manner of a DD-MOS, or ion implantation of corresponding dopants in the second semiconductor region 7 can be generated.
  • the semiconductor device H is in all embodiments be ⁇ vorzugt used as an electronic switch. If the switch is to lock and to pick up voltage, it is set to the first operating state. When the switch current is to run from the first operating electrode 2 to the second rode Millelekt ⁇ 3, it is also in the first operation state ⁇ set. If the switch is to carry current from the second operating electrode 3 to the first operating electrode 2, it is set to the second operating state. Due to be ⁇ ner functionality of these bidirectional electronic switch which is realized by the semiconductor device H, instead of the usual anti-parallel connection of a ab ⁇ switchable power semiconductor, and a freewheeling diode comparable applies to. In general, the current direction or polarity is taken into account.
  • the ge with the semiconductor device formed ⁇ H switch is therefore as follows driven or operated ben:
  • the first operating state is set by setting the control voltage Ui.
  • switch is to conduct and the current is positive (I B> 0 A): It is a ⁇ of the control voltage Ui filters set the first operating state.
  • the second operating state is set by setting the control voltage U 2 .
  • the current is measured and checked when a zero occurs ⁇ passage or a change in polarity to zwi ⁇ rule the two operating states and back so that between the switching states no. 2 and no. 3 and forth to NEN kön ⁇ .
  • the voltage at the switch that is to say the semiconductor component H, can also be evaluated in the conducting state as an alternative.
  • the voltage is indeed much lower in fürfall than in Sperrzu ⁇ stood, but not exactly zero.
  • the activation of the switch is then preferably as follows:
  • the switch should pick up voltage:
  • the first operating state is set, that is to say the control voltage Ui is applied.
  • the switch should conduct and the voltage is positive (U B > 0 V): ES is the first operating state is ⁇ sets by applying the control voltage Ui.
  • control connection for the control electrode (s) can be divided into two separate control connections.
  • a part of the control heads or control electrodes is connected to the first control connection and the further part to the second control connection. Is then in the vicinity of the current zero-crossing one of the control terminals so connected or demonstrates that moving associated control heads the first operating state, ie the state "p control head” take, and the other Steueran ⁇ circuit so that the control heads to at ⁇ second operating state, so assume "n-control head".
  • the control via the control electrode (s) 5 may also be ge ⁇ uses to adjust besides the states "p-type control head" and "n-control unit” or the level of the carrier concentration in the first semiconductor region. 6 In this way, it is additionally possible to set a state with a low forward voltage, but a high storage charge, on the one hand, and a further state of a high forward voltage, but a low storage charge, on the other hand. In the stationary state, the state with a low forward voltage and shortly before the transition to the blocking state, the state with a low storage charge is then selected in order to positively influence the recovery behavior (reverse recovery).
  • the electronic switch realized with the semiconductor component H is preferably used in a voltage source converter.
  • the voltage source converter comprises a rectifier 30, which converts an input voltage U E into a DC voltage at a frequency f E , a DC intermediate voltage circuit 31 for the converted DC voltage, which comprises a capacitor 33 for smoothing, and an inverter 32, which supplies the DC voltage of the Intermediate circuit 31 by means of two thyristors Tl and T2 and two thyristors Tl and T2 respectively antiparallel connected diodes Dl and D2 by an appropriate control in an output AC voltage U A with a frequency f A transforms.
  • the frequency f A of the AC output voltage U A can be controlled or adjusted.
  • FIG. 5 now shows a voltage source converter according to the invention, in which, instead of the anti-parallel circuit, in each case one thyristor T1 and one diode D1 or T2 and D2 each have a semiconductor component H or H 'in the inverter 32 as in the known converter according to FIG are provided.
  • the two semiconductor elements H and H 'ar ⁇ BEITEN as bi-directional switch as described above and are connected in anti-series.
  • the first operating electrode of the semiconductor device H ' is denoted by 2', the second operating ⁇ electrode with 3 'and the control electrode (s) with 5' designated net.
  • the semiconductor components H and H ' are as switches via an associated control potential U s and U s - to the jewei ⁇ time control electrodes 5 and 5' are connected.
  • the voltage source converter according to the invention can be a two-point converter or a three-point converter or another multipoint converter.
  • the number of phases is arbitrary.

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Abstract

L'invention concerne un composant à semi-conducteurs comprenant au moins urne première zone semi-conductrice (6), au moins une deuxième zone semi-conductrice (7) qui jouxte directement la première zone semi-conductrice (6), dans une zone de transition (67), au moins une troisième zone semi-conductrice (8) d'un type de conduction (p ou n) prédéfini, opposé au type de conduction de la deuxième zone semi-conductrice (7), au moins une première électrode de service (2), qui est en contact électrique avec la première zone semi-conductrice (6), ainsi qu'au moins une deuxième électrode de service (3), la première zone semi-conductrice (6), la deuxième zone semi-conductrice (7) et la troisième zone semi-conductrice (8) étant commutées électriquement en série entre les deux électrodes de service (2 et 3), au moins un système semi-conducteur (10, 11, 12, 13, 81) qui est disposé de manière isolée électriquement par rapport à la troisième zone semi-conductrice (8), entre la deuxième zone semi-conductrice (7) et la deuxième électrode de service (3) et qui permet le passage d'un flux de courant entre la deuxième zone semi-conductrice (7) et la deuxième électrode de service (3) dans le sens de blocage d'une jonction p-n (78) formée entre la deuxième zone semi-conductrice (7) et la troisième zone semi-conductrice (8), tout en empêchant sensiblement le passage dans le sens de passage de cette jonction p-n. La première zone semi-conductrice (6), du moins dans au moins une zone de canal disposée entre la première électrode de service (2) et la deuxième zone semi-conductrice (7), adopte un type de conduction (p ou n) opposé au type de conduction (n ou p) de la deuxième zone semi-conductrice (7), en fonction d'un potentiel de commande (Us) ou d'un courant de commande présent au niveau de la ou des électrode(s) de commande (5), dans un premier état de service, et adopte un même type de conduction (n ou p) que celui de la deuxième zone semi-conductrice (7), dans au moins un deuxième état de service.
PCT/EP2005/053536 2004-07-27 2005-07-21 Composant a semi-conducteurs et procede d'exploitation dudit composant a semi-conducteurs, comme commutateur electronique Ceased WO2006010734A1 (fr)

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DE102004036278.5 2004-07-27
DE102004036278A DE102004036278B4 (de) 2004-07-27 2004-07-27 Halbleiterbauelement und Verfahren zum Betreiben des Halbleiterbauelements als elektronischer Schalter

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CN103137472A (zh) * 2011-11-25 2013-06-05 上海华虹Nec电子有限公司 结合快复管的igbt器件制造方法
CN111146292A (zh) * 2020-01-17 2020-05-12 电子科技大学 一种具有集成续流二极管的纵向GaN MOS

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US7888775B2 (en) 2007-09-27 2011-02-15 Infineon Technologies Ag Vertical diode using silicon formed by selective epitaxial growth

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DE10308313B4 (de) * 2003-02-26 2010-08-19 Siemens Ag Halbleiterdiode, elektronisches Bauteil, Spannungszwischenkreisumrichter und Steuerverfahren

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US6323509B1 (en) * 1999-01-07 2001-11-27 Mitsubishi Denki Kabushiki Kaisha Power semiconductor device including a free wheeling diode and method of manufacturing for same
US6605830B1 (en) * 1999-01-07 2003-08-12 Mitsubishi Denki Kaisha Power semiconductor device including an IGBT with a MOS transistor as a current suppressing device incorporated therein

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CN103137472A (zh) * 2011-11-25 2013-06-05 上海华虹Nec电子有限公司 结合快复管的igbt器件制造方法
CN111146292A (zh) * 2020-01-17 2020-05-12 电子科技大学 一种具有集成续流二极管的纵向GaN MOS

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